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authorScott Jiang <scott.jiang.linux@gmail.com>2012-11-20 13:49:36 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-12-26 07:33:44 -0500
commit45b82596be0214f161c8176bd3e18f779e36eccd (patch)
tree15f8f8faec4191f6d4df58af8f4b52b131ef36e0 /include
parentfab0e8fa432e42d7b5c91a3d4c8af053f291a65a (diff)
[media] v4l2: blackfin: add EPPI3 support
Bf60x soc has a new PPI called Enhanced PPI version 3. HD video is supported now. To achieve this, we redesign ppi params and add dv timings feature. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/media/blackfin/bfin_capture.h5
-rw-r--r--include/media/blackfin/ppi.h33
2 files changed, 30 insertions, 8 deletions
diff --git a/include/media/blackfin/bfin_capture.h b/include/media/blackfin/bfin_capture.h
index 2038a8a3f8aa..56b9ce4472fc 100644
--- a/include/media/blackfin/bfin_capture.h
+++ b/include/media/blackfin/bfin_capture.h
@@ -9,6 +9,7 @@ struct ppi_info;
9struct bcap_route { 9struct bcap_route {
10 u32 input; 10 u32 input;
11 u32 output; 11 u32 output;
12 u32 ppi_control;
12}; 13};
13 14
14struct bfin_capture_config { 15struct bfin_capture_config {
@@ -30,8 +31,8 @@ struct bfin_capture_config {
30 unsigned long ppi_control; 31 unsigned long ppi_control;
31 /* ppi interrupt mask */ 32 /* ppi interrupt mask */
32 u32 int_mask; 33 u32 int_mask;
33 /* horizontal blanking clocks */ 34 /* horizontal blanking pixels */
34 int blank_clocks; 35 int blank_pixels;
35}; 36};
36 37
37#endif 38#endif
diff --git a/include/media/blackfin/ppi.h b/include/media/blackfin/ppi.h
index 8f72f8a0b3d0..65c467576b31 100644
--- a/include/media/blackfin/ppi.h
+++ b/include/media/blackfin/ppi.h
@@ -21,22 +21,42 @@
21#define _PPI_H_ 21#define _PPI_H_
22 22
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <asm/blackfin.h>
25#include <asm/bfin_ppi.h>
24 26
27/* EPPI */
25#ifdef EPPI_EN 28#ifdef EPPI_EN
26#define PORT_EN EPPI_EN 29#define PORT_EN EPPI_EN
30#define PORT_DIR EPPI_DIR
27#define DMA32 0 31#define DMA32 0
28#define PACK_EN PACKEN 32#define PACK_EN PACKEN
29#endif 33#endif
30 34
35/* EPPI3 */
36#ifdef EPPI0_CTL2
37#define PORT_EN EPPI_CTL_EN
38#define PORT_DIR EPPI_CTL_DIR
39#define PACK_EN EPPI_CTL_PACKEN
40#define DMA32 0
41#define DLEN_8 EPPI_CTL_DLEN08
42#define DLEN_16 EPPI_CTL_DLEN16
43#endif
44
31struct ppi_if; 45struct ppi_if;
32 46
33struct ppi_params { 47struct ppi_params {
34 int width; 48 u32 width; /* width in pixels */
35 int height; 49 u32 height; /* height in lines */
36 int bpp; 50 u32 hdelay; /* delay after the HSYNC in pixels */
37 unsigned long ppi_control; 51 u32 vdelay; /* delay after the VSYNC in lines */
38 u32 int_mask; 52 u32 line; /* total pixels per line */
39 int blank_clocks; 53 u32 frame; /* total lines per frame */
54 u32 hsync; /* HSYNC length in pixels */
55 u32 vsync; /* VSYNC length in lines */
56 int bpp; /* bits per pixel */
57 int dlen; /* data length for ppi in bits */
58 u32 ppi_control; /* ppi configuration */
59 u32 int_mask; /* interrupt mask */
40}; 60};
41 61
42struct ppi_ops { 62struct ppi_ops {
@@ -51,6 +71,7 @@ struct ppi_ops {
51enum ppi_type { 71enum ppi_type {
52 PPI_TYPE_PPI, 72 PPI_TYPE_PPI,
53 PPI_TYPE_EPPI, 73 PPI_TYPE_EPPI,
74 PPI_TYPE_EPPI3,
54}; 75};
55 76
56struct ppi_info { 77struct ppi_info {