diff options
author | Dan Williams <dan.j.williams@intel.com> | 2007-02-13 11:13:04 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-17 10:04:53 -0500 |
commit | 4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch) | |
tree | f20c9c4eba18dd915f07185cee5ededf33e28c02 /include | |
parent | f80dff9da07d81da16e3b842118d47b9febf9c01 (diff) |
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-iop13xx/iop13xx.h | 26 | ||||
-rw-r--r-- | include/asm-arm/arch-iop13xx/irqs.h | 17 | ||||
-rw-r--r-- | include/asm-arm/arch-iop13xx/system.h | 2 | ||||
-rw-r--r-- | include/asm-arm/hardware/iop3xx.h | 27 |
4 files changed, 0 insertions, 72 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index a88522a0ff8e..e7430593d6fb 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h | |||
@@ -12,32 +12,6 @@ void iop13xx_init_irq(void); | |||
12 | void iop13xx_init_time(unsigned long tickrate); | 12 | void iop13xx_init_time(unsigned long tickrate); |
13 | unsigned long iop13xx_gettimeoffset(void); | 13 | unsigned long iop13xx_gettimeoffset(void); |
14 | 14 | ||
15 | /* handle cp6 access | ||
16 | * to do: handle access in entry-armv5.S and unify with | ||
17 | * the iop3xx implementation | ||
18 | * note: use iop13xx_cp6_enable_irq_save and iop13xx_cp6_irq_restore (irq.h) | ||
19 | * when interrupts are enabled | ||
20 | */ | ||
21 | static inline unsigned long iop13xx_cp6_save(void) | ||
22 | { | ||
23 | u32 temp, cp_flags; | ||
24 | |||
25 | asm volatile ( | ||
26 | "mrc p15, 0, %1, c15, c1, 0\n\t" | ||
27 | "orr %0, %1, #(1 << 6)\n\t" | ||
28 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
29 | : "=r" (temp), "=r"(cp_flags)); | ||
30 | |||
31 | return cp_flags; | ||
32 | } | ||
33 | |||
34 | static inline void iop13xx_cp6_restore(unsigned long cp_flags) | ||
35 | { | ||
36 | asm volatile ( | ||
37 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
38 | : : "r" (cp_flags) ); | ||
39 | } | ||
40 | |||
41 | /* CPUID CP6 R0 Page 0 */ | 15 | /* CPUID CP6 R0 Page 0 */ |
42 | static inline int iop13xx_cpu_id(void) | 16 | static inline int iop13xx_cpu_id(void) |
43 | { | 17 | { |
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h index 442e35a40359..5c6fac2a4004 100644 --- a/include/asm-arm/arch-iop13xx/irqs.h +++ b/include/asm-arm/arch-iop13xx/irqs.h | |||
@@ -3,8 +3,6 @@ | |||
3 | 3 | ||
4 | #ifndef __ASSEMBLER__ | 4 | #ifndef __ASSEMBLER__ |
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | #include <asm/system.h> /* local_irq_save */ | ||
7 | #include <asm/arch/iop13xx.h> /* iop13xx_cp6_* */ | ||
8 | 6 | ||
9 | /* INTPND0 CP6 R0 Page 3 | 7 | /* INTPND0 CP6 R0 Page 3 |
10 | */ | 8 | */ |
@@ -41,21 +39,6 @@ static inline u32 read_intpnd_3(void) | |||
41 | asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); | 39 | asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); |
42 | return val; | 40 | return val; |
43 | } | 41 | } |
44 | |||
45 | static inline void | ||
46 | iop13xx_cp6_enable_irq_save(unsigned long *cp_flags, unsigned long *irq_flags) | ||
47 | { | ||
48 | local_irq_save(*irq_flags); | ||
49 | *cp_flags = iop13xx_cp6_save(); | ||
50 | } | ||
51 | |||
52 | static inline void | ||
53 | iop13xx_cp6_irq_restore(unsigned long *cp_flags, | ||
54 | unsigned long *irq_flags) | ||
55 | { | ||
56 | iop13xx_cp6_restore(*cp_flags); | ||
57 | local_irq_restore(*irq_flags); | ||
58 | } | ||
59 | #endif | 42 | #endif |
60 | 43 | ||
61 | #define INTBASE 0 | 44 | #define INTBASE 0 |
diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h index ee3a62530af2..127827058e1f 100644 --- a/include/asm-arm/arch-iop13xx/system.h +++ b/include/asm-arm/arch-iop13xx/system.h | |||
@@ -48,12 +48,10 @@ static inline void arch_reset(char mode) | |||
48 | /* | 48 | /* |
49 | * Reset the internal bus (warning both cores are reset) | 49 | * Reset the internal bus (warning both cores are reset) |
50 | */ | 50 | */ |
51 | u32 cp_flags = iop13xx_cp6_save(); | ||
52 | write_wdtcr(IOP13XX_WDTCR_EN_ARM); | 51 | write_wdtcr(IOP13XX_WDTCR_EN_ARM); |
53 | write_wdtcr(IOP13XX_WDTCR_EN); | 52 | write_wdtcr(IOP13XX_WDTCR_EN); |
54 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); | 53 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); |
55 | write_wdtcr(0x1000); | 54 | write_wdtcr(0x1000); |
56 | iop13xx_cp6_restore(cp_flags); | ||
57 | 55 | ||
58 | for(;;); | 56 | for(;;); |
59 | } | 57 | } |
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index c91b546e20ef..47fcbf6f52d3 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h | |||
@@ -283,33 +283,6 @@ void iop_init_cp6_handler(void); | |||
283 | extern struct platform_device iop3xx_i2c0_device; | 283 | extern struct platform_device iop3xx_i2c0_device; |
284 | extern struct platform_device iop3xx_i2c1_device; | 284 | extern struct platform_device iop3xx_i2c1_device; |
285 | 285 | ||
286 | extern inline void iop3xx_cp6_enable(void) | ||
287 | { | ||
288 | u32 temp; | ||
289 | |||
290 | asm volatile ( | ||
291 | "mrc p15, 0, %0, c15, c1, 0\n\t" | ||
292 | "orr %0, %0, #(1 << 6)\n\t" | ||
293 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
294 | "mrc p15, 0, %0, c15, c1, 0\n\t" | ||
295 | "mov %0, %0\n\t" | ||
296 | "sub pc, pc, #4\n\t" | ||
297 | : "=r" (temp) ); | ||
298 | } | ||
299 | |||
300 | extern inline void iop3xx_cp6_disable(void) | ||
301 | { | ||
302 | u32 temp; | ||
303 | |||
304 | asm volatile ( | ||
305 | "mrc p15, 0, %0, c15, c1, 0\n\t" | ||
306 | "bic %0, %0, #(1 << 6)\n\t" | ||
307 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
308 | "mrc p15, 0, %0, c15, c1, 0\n\t" | ||
309 | "mov %0, %0\n\t" | ||
310 | "sub pc, pc, #4\n\t" | ||
311 | : "=r" (temp) ); | ||
312 | } | ||
313 | #endif | 286 | #endif |
314 | 287 | ||
315 | 288 | ||