diff options
| author | Steven Rostedt <rostedt@goodmis.org> | 2007-10-17 12:04:38 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-17 14:16:28 -0400 |
| commit | 3f4ed1511dc8c71073bb7d220ee62eedd8e8aeec (patch) | |
| tree | 9df53f2c54adbc7d831f7b7c47ef3cc5bec8777e /include | |
| parent | d2ccc3fdde1a860b970109ad78865b7e44d3fc0c (diff) | |
x86: Add parenthesis to IRQ vector macros
It is not good taste to have macros with additions that do not have
parenthesises around them. This patch parethesizes the IRQ vector
macros for x86_64 arch.
Note, this caused me a bit of heart-ache debugging lguest64.
[ tglx: arch/x86 adaptation ]
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-x86/hw_irq_64.h | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/include/asm-x86/hw_irq_64.h b/include/asm-x86/hw_irq_64.h index dc0a953da6a6..a470d59da678 100644 --- a/include/asm-x86/hw_irq_64.h +++ b/include/asm-x86/hw_irq_64.h | |||
| @@ -40,22 +40,22 @@ | |||
| 40 | /* | 40 | /* |
| 41 | * Vectors 0x30-0x3f are used for ISA interrupts. | 41 | * Vectors 0x30-0x3f are used for ISA interrupts. |
| 42 | */ | 42 | */ |
| 43 | #define IRQ0_VECTOR FIRST_EXTERNAL_VECTOR + 0x10 | 43 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) |
| 44 | #define IRQ1_VECTOR IRQ0_VECTOR + 1 | 44 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) |
| 45 | #define IRQ2_VECTOR IRQ0_VECTOR + 2 | 45 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) |
| 46 | #define IRQ3_VECTOR IRQ0_VECTOR + 3 | 46 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) |
| 47 | #define IRQ4_VECTOR IRQ0_VECTOR + 4 | 47 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) |
| 48 | #define IRQ5_VECTOR IRQ0_VECTOR + 5 | 48 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) |
| 49 | #define IRQ6_VECTOR IRQ0_VECTOR + 6 | 49 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) |
| 50 | #define IRQ7_VECTOR IRQ0_VECTOR + 7 | 50 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) |
| 51 | #define IRQ8_VECTOR IRQ0_VECTOR + 8 | 51 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) |
| 52 | #define IRQ9_VECTOR IRQ0_VECTOR + 9 | 52 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) |
| 53 | #define IRQ10_VECTOR IRQ0_VECTOR + 10 | 53 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) |
| 54 | #define IRQ11_VECTOR IRQ0_VECTOR + 11 | 54 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) |
| 55 | #define IRQ12_VECTOR IRQ0_VECTOR + 12 | 55 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) |
| 56 | #define IRQ13_VECTOR IRQ0_VECTOR + 13 | 56 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) |
| 57 | #define IRQ14_VECTOR IRQ0_VECTOR + 14 | 57 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) |
| 58 | #define IRQ15_VECTOR IRQ0_VECTOR + 15 | 58 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) |
| 59 | 59 | ||
| 60 | /* | 60 | /* |
| 61 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | 61 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff |