diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-20 14:03:22 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-20 14:03:22 -0500 |
commit | 3aad3f03b2b6d2d977b985c49274cdb78a1593e5 (patch) | |
tree | e2955fe687fcd9c26f82d57a3c818e05406964ed /include | |
parent | 10b6339e93244156fac901560117e94bf9dca120 (diff) | |
parent | 095c3752e673c0ba039a2f67fd867297fde75ae7 (diff) |
Merge tag 'spi-for-linus' of git://git.secretlab.ca/git/linux
Pull SPI changes from Grant Likely:
"Changes to both core spi code and spi device drivers. The driver
changes are the usual set of bug fixes and platform enablement.
Core code changes include:
- More intelligent assignment of SPI bus numbers when using DT
- Common mechanism for using gpios as CS lines
- Pull checks for bits_per_word and transfer speed out of drivers and
into core code
- Ensure temporary DMA buffers are DMA safe"
* tag 'spi-for-linus' of git://git.secretlab.ca/git/linux: (50 commits)
spi: Document cs_gpios and cs_gpio in kernel-doc
spi/of: Fix initialization of cs_gpios array
spi/pxa2xx: add support for Lynxpoint SPI controllers
spi/pxa2xx: add support for Intel Low Power Subsystem SPI
spi/pxa2xx: add support for SPI_LOOP
spi/pxa2xx: add support for runtime PM
spi/pxa2xx: add support for DMA engine
spi/pxa2xx: break out the private DMA API usage into a separate file
spi/ath79: add shutdown handler
spi/mips-lantiq: set SPI_MASTER_HALF_DUPLEX flag
spi/mips-lantiq: make use of spi_finalize_current_message
spi/bcm63xx: work around inability to keep CS up
spi/davinci: use request_threaded_irq() to fix deadlock
spi/orion: Use module_platform_driver()
spi/bcm63xx: reject transfers unable to transfer
spi: Ensure memory used for spi_write_then_read() is DMA safe
spi/spi-mpc512x-psc: init mode bits supported by the driver
spi/mpc512x-psc: don't use obsolet cell-index property
spi: Remove erroneous __init, __exit and __exit_p() references in drivers
spi/s3c64xx: fix checkpatch warnings and error
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/platform_data/spi-omap2-mcspi.h | 3 | ||||
-rw-r--r-- | include/linux/pxa2xx_ssp.h | 18 | ||||
-rw-r--r-- | include/linux/spi/pxa2xx_spi.h | 108 | ||||
-rw-r--r-- | include/linux/spi/spi.h | 5 | ||||
-rw-r--r-- | include/linux/spi/spi_gpio.h | 4 |
5 files changed, 38 insertions, 100 deletions
diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h index a65572d53211..c100456eab17 100644 --- a/include/linux/platform_data/spi-omap2-mcspi.h +++ b/include/linux/platform_data/spi-omap2-mcspi.h | |||
@@ -22,6 +22,9 @@ struct omap2_mcspi_dev_attr { | |||
22 | 22 | ||
23 | struct omap2_mcspi_device_config { | 23 | struct omap2_mcspi_device_config { |
24 | unsigned turbo_mode:1; | 24 | unsigned turbo_mode:1; |
25 | |||
26 | /* toggle chip select after every word */ | ||
27 | unsigned cs_per_word:1; | ||
25 | }; | 28 | }; |
26 | 29 | ||
27 | #endif | 30 | #endif |
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h index f36632061c66..467cc6307b62 100644 --- a/include/linux/pxa2xx_ssp.h +++ b/include/linux/pxa2xx_ssp.h | |||
@@ -155,6 +155,14 @@ | |||
155 | #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ | 155 | #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ |
156 | #define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */ | 156 | #define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */ |
157 | 157 | ||
158 | /* LPSS SSP */ | ||
159 | #define SSITF 0x44 /* TX FIFO trigger level */ | ||
160 | #define SSITF_TxLoThresh(x) (((x) - 1) << 8) | ||
161 | #define SSITF_TxHiThresh(x) ((x) - 1) | ||
162 | |||
163 | #define SSIRF 0x48 /* RX FIFO trigger level */ | ||
164 | #define SSIRF_RxThresh(x) ((x) - 1) | ||
165 | |||
158 | enum pxa_ssp_type { | 166 | enum pxa_ssp_type { |
159 | SSP_UNDEFINED = 0, | 167 | SSP_UNDEFINED = 0, |
160 | PXA25x_SSP, /* pxa 210, 250, 255, 26x */ | 168 | PXA25x_SSP, /* pxa 210, 250, 255, 26x */ |
@@ -164,6 +172,7 @@ enum pxa_ssp_type { | |||
164 | PXA168_SSP, | 172 | PXA168_SSP, |
165 | PXA910_SSP, | 173 | PXA910_SSP, |
166 | CE4100_SSP, | 174 | CE4100_SSP, |
175 | LPSS_SSP, | ||
167 | }; | 176 | }; |
168 | 177 | ||
169 | struct ssp_device { | 178 | struct ssp_device { |
@@ -206,6 +215,15 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg) | |||
206 | return __raw_readl(dev->mmio_base + reg); | 215 | return __raw_readl(dev->mmio_base + reg); |
207 | } | 216 | } |
208 | 217 | ||
218 | #ifdef CONFIG_ARCH_PXA | ||
209 | struct ssp_device *pxa_ssp_request(int port, const char *label); | 219 | struct ssp_device *pxa_ssp_request(int port, const char *label); |
210 | void pxa_ssp_free(struct ssp_device *); | 220 | void pxa_ssp_free(struct ssp_device *); |
221 | #else | ||
222 | static inline struct ssp_device *pxa_ssp_request(int port, const char *label) | ||
223 | { | ||
224 | return NULL; | ||
225 | } | ||
226 | static inline void pxa_ssp_free(struct ssp_device *ssp) {} | ||
227 | #endif | ||
228 | |||
211 | #endif | 229 | #endif |
diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h index c73d1445c77e..82d5111cd0c2 100644 --- a/include/linux/spi/pxa2xx_spi.h +++ b/include/linux/spi/pxa2xx_spi.h | |||
@@ -28,6 +28,15 @@ struct pxa2xx_spi_master { | |||
28 | u32 clock_enable; | 28 | u32 clock_enable; |
29 | u16 num_chipselect; | 29 | u16 num_chipselect; |
30 | u8 enable_dma; | 30 | u8 enable_dma; |
31 | |||
32 | /* DMA engine specific config */ | ||
33 | int rx_chan_id; | ||
34 | int tx_chan_id; | ||
35 | int rx_slave_id; | ||
36 | int tx_slave_id; | ||
37 | |||
38 | /* For non-PXA arches */ | ||
39 | struct ssp_device ssp; | ||
31 | }; | 40 | }; |
32 | 41 | ||
33 | /* spi_board_info.controller_data for SPI slave devices, | 42 | /* spi_board_info.controller_data for SPI slave devices, |
@@ -35,6 +44,7 @@ struct pxa2xx_spi_master { | |||
35 | */ | 44 | */ |
36 | struct pxa2xx_spi_chip { | 45 | struct pxa2xx_spi_chip { |
37 | u8 tx_threshold; | 46 | u8 tx_threshold; |
47 | u8 tx_hi_threshold; | ||
38 | u8 rx_threshold; | 48 | u8 rx_threshold; |
39 | u8 dma_burst_size; | 49 | u8 dma_burst_size; |
40 | u32 timeout; | 50 | u32 timeout; |
@@ -50,103 +60,5 @@ struct pxa2xx_spi_chip { | |||
50 | 60 | ||
51 | extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info); | 61 | extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info); |
52 | 62 | ||
53 | #else | ||
54 | /* | ||
55 | * This is the implemtation for CE4100 on x86. ARM defines them in mach/ or | ||
56 | * plat/ include path. | ||
57 | * The CE4100 does not provide DMA support. This bits are here to let the driver | ||
58 | * compile and will never be used. Maybe we get DMA support at a later point in | ||
59 | * time. | ||
60 | */ | ||
61 | |||
62 | #define DCSR(n) (n) | ||
63 | #define DSADR(n) (n) | ||
64 | #define DTADR(n) (n) | ||
65 | #define DCMD(n) (n) | ||
66 | #define DRCMR(n) (n) | ||
67 | |||
68 | #define DCSR_RUN (1 << 31) /* Run Bit */ | ||
69 | #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch */ | ||
70 | #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable */ | ||
71 | #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ | ||
72 | #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ | ||
73 | #define DCSR_ENDINTR (1 << 2) /* End Interrupt */ | ||
74 | #define DCSR_STARTINTR (1 << 1) /* Start Interrupt */ | ||
75 | #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt */ | ||
76 | |||
77 | #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable */ | ||
78 | #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ | ||
79 | #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ | ||
80 | #define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ | ||
81 | #define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ | ||
82 | #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ | ||
83 | #define DCSR_EORINTR (1 << 9) /* The end of Receive */ | ||
84 | |||
85 | #define DRCMR_MAPVLD (1 << 7) /* Map Valid */ | ||
86 | #define DRCMR_CHLNUM 0x1f /* mask for Channel Number */ | ||
87 | |||
88 | #define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor */ | ||
89 | #define DDADR_STOP (1 << 0) /* Stop */ | ||
90 | |||
91 | #define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ | ||
92 | #define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ | ||
93 | #define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ | ||
94 | #define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ | ||
95 | #define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ | ||
96 | #define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ | ||
97 | #define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ | ||
98 | #define DCMD_BURST8 (1 << 16) /* 8 byte burst */ | ||
99 | #define DCMD_BURST16 (2 << 16) /* 16 byte burst */ | ||
100 | #define DCMD_BURST32 (3 << 16) /* 32 byte burst */ | ||
101 | #define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ | ||
102 | #define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ | ||
103 | #define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ | ||
104 | #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ | ||
105 | |||
106 | /* | ||
107 | * Descriptor structure for PXA's DMA engine | ||
108 | * Note: this structure must always be aligned to a 16-byte boundary. | ||
109 | */ | ||
110 | |||
111 | typedef enum { | ||
112 | DMA_PRIO_HIGH = 0, | ||
113 | DMA_PRIO_MEDIUM = 1, | ||
114 | DMA_PRIO_LOW = 2 | ||
115 | } pxa_dma_prio; | ||
116 | |||
117 | /* | ||
118 | * DMA registration | ||
119 | */ | ||
120 | |||
121 | static inline int pxa_request_dma(char *name, | ||
122 | pxa_dma_prio prio, | ||
123 | void (*irq_handler)(int, void *), | ||
124 | void *data) | ||
125 | { | ||
126 | return -ENODEV; | ||
127 | } | ||
128 | |||
129 | static inline void pxa_free_dma(int dma_ch) | ||
130 | { | ||
131 | } | ||
132 | |||
133 | /* | ||
134 | * The CE4100 does not have the clk framework implemented and SPI clock can | ||
135 | * not be switched on/off or the divider changed. | ||
136 | */ | ||
137 | static inline void clk_disable(struct clk *clk) | ||
138 | { | ||
139 | } | ||
140 | |||
141 | static inline int clk_enable(struct clk *clk) | ||
142 | { | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static inline unsigned long clk_get_rate(struct clk *clk) | ||
147 | { | ||
148 | return 3686400; | ||
149 | } | ||
150 | |||
151 | #endif | 63 | #endif |
152 | #endif | 64 | #endif |
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index f62918946d86..30e9c50a5e20 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h | |||
@@ -57,6 +57,8 @@ extern struct bus_type spi_bus_type; | |||
57 | * @modalias: Name of the driver to use with this device, or an alias | 57 | * @modalias: Name of the driver to use with this device, or an alias |
58 | * for that name. This appears in the sysfs "modalias" attribute | 58 | * for that name. This appears in the sysfs "modalias" attribute |
59 | * for driver coldplugging, and in uevents used for hotplugging | 59 | * for driver coldplugging, and in uevents used for hotplugging |
60 | * @cs_gpio: gpio number of the chipselect line (optional, -EINVAL when | ||
61 | * when not using a GPIO line) | ||
60 | * | 62 | * |
61 | * A @spi_device is used to interchange data between an SPI slave | 63 | * A @spi_device is used to interchange data between an SPI slave |
62 | * (usually a discrete chip) and CPU memory. | 64 | * (usually a discrete chip) and CPU memory. |
@@ -258,6 +260,9 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) | |||
258 | * @unprepare_transfer_hardware: there are currently no more messages on the | 260 | * @unprepare_transfer_hardware: there are currently no more messages on the |
259 | * queue so the subsystem notifies the driver that it may relax the | 261 | * queue so the subsystem notifies the driver that it may relax the |
260 | * hardware by issuing this call | 262 | * hardware by issuing this call |
263 | * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS | ||
264 | * number. Any individual value may be -EINVAL for CS lines that | ||
265 | * are not GPIOs (driven by the SPI controller itself). | ||
261 | * | 266 | * |
262 | * Each SPI master controller can communicate with one or more @spi_device | 267 | * Each SPI master controller can communicate with one or more @spi_device |
263 | * children. These make a small bus, sharing MOSI, MISO and SCK signals | 268 | * children. These make a small bus, sharing MOSI, MISO and SCK signals |
diff --git a/include/linux/spi/spi_gpio.h b/include/linux/spi/spi_gpio.h index 369b3d7d5b95..1634ce31c06d 100644 --- a/include/linux/spi/spi_gpio.h +++ b/include/linux/spi/spi_gpio.h | |||
@@ -62,8 +62,8 @@ | |||
62 | */ | 62 | */ |
63 | struct spi_gpio_platform_data { | 63 | struct spi_gpio_platform_data { |
64 | unsigned sck; | 64 | unsigned sck; |
65 | unsigned mosi; | 65 | unsigned long mosi; |
66 | unsigned miso; | 66 | unsigned long miso; |
67 | 67 | ||
68 | u16 num_chipselect; | 68 | u16 num_chipselect; |
69 | }; | 69 | }; |