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authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-17 18:17:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-17 18:17:10 -0400
commit29e92f483603d97dd1d2bafcb32101287dfac4ad (patch)
tree87c267216117bef6b1c5752c459643f91fc50b80 /include
parent08c18964a247b412acab56599a643e6f73e1ec5a (diff)
parentdfb0ae091479240c19bef4382026671776ca204e (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] pxa: spitz wants PXA27x UDC definitions [ARM] pxa: fix pxafb build when cpufreq is enabled [ARM] fix parenthesis in include/asm-arm/arch-omap/control.h [ARM] colibri: fix support for DM9000 ethernet device [ARM] arm/kernel/arthur.c: add MODULE_LICENSE [ARM] 5037/1: Orion: fix DNS323/Kurobox Pro PCI initialisation [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode [ARM] export copy_page [ARM] 5026/1: locomo: add .settype for gpio and several small fixes ARM: OMAP: Fixed comments on global PRM register usage ARM: OMAP: Add PARENT_CONTROLS_CLOCK flag to dpll5_m2_ck ARM: OMAP: PRCM fixes to ssi clock handling ARM: OMAP: Add fuctional clock enabler for iva2 ARM: OMAP: Fix 34xx to use correct shift values for gpio2-6 fclks ARM: OMAP: Keymap fix for palmte and palmz71 ARM: OMAP: Fix Unbalanced enable for IRQ in omap mailbox ARM: OMAP: DMA: Fix incorrect channel linking ARM: OMAP: Warn on disabling clocks with no users ARM: OMAP: Add calls to omap2_set_globals_*() ARM: OMAP: Update MMC header to fix compile
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-omap/common.h4
-rw-r--r--include/asm-arm/arch-omap/control.h2
-rw-r--r--include/asm-arm/arch-omap/mmc.h24
-rw-r--r--include/asm-arm/arch-sa1100/irqs.h2
-rw-r--r--include/asm-arm/hardware/locomo.h19
5 files changed, 32 insertions, 19 deletions
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h
index 224e009e5296..36a3b62d4d8d 100644
--- a/include/asm-arm/arch-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
47} 47}
48#endif 48#endif
49 49
50void omap2_set_globals_242x(void);
51void omap2_set_globals_243x(void);
52void omap2_set_globals_343x(void);
53
50#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 54#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h
index 9944bb5d5330..59c0686f8be7 100644
--- a/include/asm-arm/arch-omap/control.h
+++ b/include/asm-arm/arch-omap/control.h
@@ -80,7 +80,7 @@
80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) 80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064)
81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) 81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c)
82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) 82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070)
83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074 83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074)
84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) 84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080)
85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) 85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084)
86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) 86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088)
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h
index c9588f49eb52..7cfc5f258560 100644
--- a/include/asm-arm/arch-omap/mmc.h
+++ b/include/asm-arm/arch-omap/mmc.h
@@ -15,21 +15,16 @@
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/mmc/host.h> 16#include <linux/mmc/host.h>
17 17
18#include <asm/arch/board.h>
19
18#define OMAP_MMC_MAX_SLOTS 2 20#define OMAP_MMC_MAX_SLOTS 2
19 21
20struct omap_mmc_platform_data { 22struct omap_mmc_platform_data {
21 struct omap_mmc_conf conf; 23 struct omap_mmc_conf conf;
22 24
23 unsigned enabled:1;
24 /* number of slots on board */ 25 /* number of slots on board */
25 unsigned nr_slots:2; 26 unsigned nr_slots:2;
26 /* nomux means "standard" muxing is wrong on this board, and that 27
27 * board-specific code handled it before common init logic.
28 */
29 unsigned nomux:1;
30 /* 4 wire signaling is optional, and is only used for SD/SDIO and
31 * MMCv4 */
32 unsigned wire4:1;
33 /* set if your board has components or wiring that limits the 28 /* set if your board has components or wiring that limits the
34 * maximum frequency on the MMC bus */ 29 * maximum frequency on the MMC bus */
35 unsigned int max_freq; 30 unsigned int max_freq;
@@ -40,6 +35,11 @@ struct omap_mmc_platform_data {
40 * not supported */ 35 * not supported */
41 int (* init)(struct device *dev); 36 int (* init)(struct device *dev);
42 void (* cleanup)(struct device *dev); 37 void (* cleanup)(struct device *dev);
38 void (* shutdown)(struct device *dev);
39
40 /* To handle board related suspend/resume functionality for MMC */
41 int (*suspend)(struct device *dev, int slot);
42 int (*resume)(struct device *dev, int slot);
43 43
44 struct omap_mmc_slot_data { 44 struct omap_mmc_slot_data {
45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); 45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
@@ -56,13 +56,19 @@ struct omap_mmc_platform_data {
56 56
57 const char *name; 57 const char *name;
58 u32 ocr_mask; 58 u32 ocr_mask;
59
60 /* Card detection IRQs */
61 int card_detect_irq;
62 int (* card_detect)(int irq);
63
64 unsigned int ban_openended:1;
65
59 } slots[OMAP_MMC_MAX_SLOTS]; 66 } slots[OMAP_MMC_MAX_SLOTS];
60}; 67};
61 68
62extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); 69extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
63 70
64/* called from board-specific card detection service routine */ 71/* called from board-specific card detection service routine */
65extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected);
66extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); 72extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
67 73
68#endif 74#endif
diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h
index d7940683efb1..7bf80484bb77 100644
--- a/include/asm-arm/arch-sa1100/irqs.h
+++ b/include/asm-arm/arch-sa1100/irqs.h
@@ -141,7 +141,7 @@
141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) 141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) 142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) 143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
144#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) 144#define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20)
145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) 145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
146 146
147/* 147/*
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index adab77780ed3..fb0645de6f31 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -58,6 +58,11 @@
58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */ 58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59#define LOCOMO_SPICT 0x04 /* SPI mode control */ 59#define LOCOMO_SPICT 0x04 /* SPI mode control */
60#define LOCOMO_SPIST 0x08 /* SPI status */ 60#define LOCOMO_SPIST 0x08 /* SPI status */
61#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
62#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */
63#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
64#define LOCOMO_SPI_RFR (1) /* read buffer bit */
65
61#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */ 66#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
62#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */ 67#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
63#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */ 68#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
@@ -66,16 +71,12 @@
66#define LOCOMO_SPIRD 0x24 /* SPI receive data read */ 71#define LOCOMO_SPIRD 0x24 /* SPI receive data read */
67#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */ 72#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */
68#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */ 73#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */
69#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
70#define LOCOMO_SPI_OVRN (1 << 2) /* Over Run bit */
71#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
72#define LOCOMO_SPI_RFR (1) /* read buffer bit */
73 74
74/* GPIO */ 75/* GPIO */
75#define LOCOMO_GPD 0x90 /* GPIO direction */ 76#define LOCOMO_GPD 0x90 /* GPIO direction */
76#define LOCOMO_GPE 0x94 /* GPIO input enable */ 77#define LOCOMO_GPE 0x94 /* GPIO input enable */
77#define LOCOMO_GPL 0x98 /* GPIO level */ 78#define LOCOMO_GPL 0x98 /* GPIO level */
78#define LOCOMO_GPO 0x9c /* GPIO out data setteing */ 79#define LOCOMO_GPO 0x9c /* GPIO out data setting */
79#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */ 80#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */
80#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */ 81#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */
81#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */ 82#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */
@@ -96,6 +97,9 @@
96#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10) 97#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10)
97#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11) 98#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11)
98#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12) 99#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12)
100#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13)
101#define LOCOMO_GPIO_WRITE_PROT LOCOMO_GPIO(14)
102#define LOCOMO_GPIO_CARD_POWER LOCOMO_GPIO(15)
99 103
100/* Start the definitions of the devices. Each device has an initial 104/* Start the definitions of the devices. Each device has an initial
101 * base address and a series of offsets from that base address. */ 105 * base address and a series of offsets from that base address. */
@@ -122,7 +126,7 @@
122/* Audio controller */ 126/* Audio controller */
123#define LOCOMO_AUDIO 0x54 127#define LOCOMO_AUDIO 0x54
124#define LOCOMO_ACC 0x00 /* Audio clock */ 128#define LOCOMO_ACC 0x00 /* Audio clock */
125#define LOCOMO_PAIF 0x7C /* PCM audio interface */ 129#define LOCOMO_PAIF 0xD0 /* PCM audio interface */
126/* Audio clock */ 130/* Audio clock */
127#define LOCOMO_ACC_XON 0x80 131#define LOCOMO_ACC_XON 0x80
128#define LOCOMO_ACC_XEN 0x40 132#define LOCOMO_ACC_XEN 0x40
@@ -162,7 +166,7 @@ extern struct bus_type locomo_bus_type;
162#define LOCOMO_DEVID_AUDIO 3 166#define LOCOMO_DEVID_AUDIO 3
163#define LOCOMO_DEVID_LED 4 167#define LOCOMO_DEVID_LED 4
164#define LOCOMO_DEVID_UART 5 168#define LOCOMO_DEVID_UART 5
165#define LOCOMO_DEVID_SPI 6 169#define LOCOMO_DEVID_SPI 6
166 170
167struct locomo_dev { 171struct locomo_dev {
168 struct device dev; 172 struct device dev;
@@ -204,7 +208,6 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits);
204int locomo_gpio_read_output(struct device *dev, unsigned int bits); 208int locomo_gpio_read_output(struct device *dev, unsigned int bits);
205void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set); 209void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
206 210
207
208/* M62332 control function */ 211/* M62332 control function */
209void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); 212void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
210 213