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authorLennert Buytenhek <buytenh@wantstofly.org>2005-06-24 18:11:31 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-24 18:11:31 -0400
commit2966207c7e5945947c4db3a48aa4fa819807c5be (patch)
tree07b447cf7769ae4be861650c24841ea9c12895ee /include
parent7533fca8e866ee7355ca53f1216e3fa4c718f991 (diff)
[PATCH] ARM: 2748/1: ixp2000 implementation of the iomap api
Patch from Lennert Buytenhek A number of ixp2000 models have a bug where the byte lanes for PCI I/O transactions are swapped. We already work around this in our versions of {in,out}{b,w,l}, but we also need to perform these workarounds in a custom implementation of the new iomap API, provided in this patch. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-ixp2000/io.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index e5c742bc2330..5e56b47446e0 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -48,6 +48,78 @@
48#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) 48#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l)
49#define insl(p,d,l) __raw_readsl(___io(p),d,l) 49#define insl(p,d,l) __raw_readsl(___io(p),d,l)
50 50
51#define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE)
52
53#define ioread8(p) \
54 ({ \
55 unsigned int __v; \
56 \
57 if (__is_io_address(p)) { \
58 __v = __raw_readb(alignb(p)); \
59 } else { \
60 __v = __raw_readb(p); \
61 } \
62 \
63 __v; \
64 }) \
65
66#define ioread16(p) \
67 ({ \
68 unsigned int __v; \
69 \
70 if (__is_io_address(p)) { \
71 __v = __raw_readw(alignw(p)); \
72 } else { \
73 __v = le16_to_cpu(__raw_readw(p)); \
74 } \
75 \
76 __v; \
77 })
78
79#define ioread32(p) \
80 ({ \
81 unsigned int __v; \
82 \
83 if (__is_io_address(p)) { \
84 __v = __raw_readl(p); \
85 } else { \
86 __v = le32_to_cpu(__raw_readl(p)); \
87 } \
88 \
89 __v; \
90 })
91
92#define iowrite8(v,p) \
93 ({ \
94 if (__is_io_address(p)) { \
95 __raw_writeb((v), alignb(p)); \
96 } else { \
97 __raw_writeb((v), p); \
98 } \
99 })
100
101#define iowrite16(v,p) \
102 ({ \
103 if (__is_io_address(p)) { \
104 __raw_writew((v), alignw(p)); \
105 } else { \
106 __raw_writew(cpu_to_le16(v), p); \
107 } \
108 })
109
110#define iowrite32(v,p) \
111 ({ \
112 if (__is_io_address(p)) { \
113 __raw_writel((v), p); \
114 } else { \
115 __raw_writel(cpu_to_le32(v), p); \
116 } \
117 })
118
119#define ioport_map(port, nr) ___io(port)
120
121#define ioport_unmap(addr)
122
51 123
52#ifdef CONFIG_ARCH_IXDP2X01 124#ifdef CONFIG_ARCH_IXDP2X01
53/* 125/*