diff options
author | Kumba <kumba@gentoo.org> | 2006-06-18 02:16:53 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-19 12:39:26 -0400 |
commit | 2493921c284813b9f512c95d972a302cf82296cb (patch) | |
tree | cda347ae07400e2aa277b52ee5ba27d1b7b5588c /include | |
parent | 35189fad3cb5f6e3ab66c8321928a851de0cd2b1 (diff) |
[MIPS] Add Missing R4K Cache Macros to IP27 & IP32
Keeping in accordance with other machines, IP27 and IP32 lack a few
macros. IP27 lacks cpu_has_4kex & cpu_has_4k_cache macros while IP32
lacks just the cpu_has_4k_cache macro.
Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/mach-ip27/cpu-feature-overrides.h | 3 | ||||
-rw-r--r-- | include/asm-mips/mach-ip32/cpu-feature-overrides.h | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index 2d2f5b91e47f..19c2d135985b 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h | |||
@@ -31,6 +31,9 @@ | |||
31 | #define cpu_has_nofpuex 0 | 31 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 32 | #define cpu_has_64bits 1 |
33 | 33 | ||
34 | #define cpu_has_4kex 1 | ||
35 | #define cpu_has_4k_cache 1 | ||
36 | |||
34 | #define cpu_has_subset_pcaches 1 | 37 | #define cpu_has_subset_pcaches 1 |
35 | 38 | ||
36 | #define cpu_dcache_line_size() 32 | 39 | #define cpu_dcache_line_size() 32 |
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index 36070b5654ab..f0ef1ac9ecd7 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h | |||
@@ -38,6 +38,8 @@ | |||
38 | #define cpu_has_vtag_icache 0 | 38 | #define cpu_has_vtag_icache 0 |
39 | #define cpu_has_ic_fills_f_dc 0 | 39 | #define cpu_has_ic_fills_f_dc 0 |
40 | #define cpu_has_dsp 0 | 40 | #define cpu_has_dsp 0 |
41 | #define cpu_has_4k_cache 1 | ||
42 | |||
41 | 43 | ||
42 | #define cpu_has_mips32r1 0 | 44 | #define cpu_has_mips32r1 0 |
43 | #define cpu_has_mips32r2 0 | 45 | #define cpu_has_mips32r2 0 |