diff options
| author | Brian Norris <computersforpeace@gmail.com> | 2012-05-01 20:12:55 -0400 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-05-14 00:15:38 -0400 |
| commit | 1826dbccebc9a58a0b0c0a9b7c09e47b19d97398 (patch) | |
| tree | 098b450ef3c9a682846b9db44f1c201d233bf7dd /include | |
| parent | c00a0991d14dce8d714becc49ec8ae5db9c8ac98 (diff) | |
mtd: nand: kill NAND_NO_AUTOINCR option
No drivers use auto-increment NAND, so kill the NO_AUTOINCR option entirely.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mtd/nand.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 2829e8be3a62..627f0c575ac4 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
| @@ -161,8 +161,6 @@ typedef enum { | |||
| 161 | * Option constants for bizarre disfunctionality and real | 161 | * Option constants for bizarre disfunctionality and real |
| 162 | * features. | 162 | * features. |
| 163 | */ | 163 | */ |
| 164 | /* Chip can not auto increment pages */ | ||
| 165 | #define NAND_NO_AUTOINCR 0x00000001 | ||
| 166 | /* Buswidth is 16 bit */ | 164 | /* Buswidth is 16 bit */ |
| 167 | #define NAND_BUSWIDTH_16 0x00000002 | 165 | #define NAND_BUSWIDTH_16 0x00000002 |
| 168 | /* Device supports partial programming without padding */ | 166 | /* Device supports partial programming without padding */ |
| @@ -207,7 +205,6 @@ typedef enum { | |||
| 207 | (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) | 205 | (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) |
| 208 | 206 | ||
| 209 | /* Macros to identify the above */ | 207 | /* Macros to identify the above */ |
| 210 | #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR)) | ||
| 211 | #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) | 208 | #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) |
| 212 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) | 209 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) |
| 213 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) | 210 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) |
| @@ -216,7 +213,7 @@ typedef enum { | |||
| 216 | && (chip->page_shift > 9)) | 213 | && (chip->page_shift > 9)) |
| 217 | 214 | ||
| 218 | /* Mask to zero out the chip options, which come from the id table */ | 215 | /* Mask to zero out the chip options, which come from the id table */ |
| 219 | #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) | 216 | #define NAND_CHIPOPTIONS_MSK 0x0000ffff |
| 220 | 217 | ||
| 221 | /* Non chip related options */ | 218 | /* Non chip related options */ |
| 222 | /* This option skips the bbt scan during initialization. */ | 219 | /* This option skips the bbt scan during initialization. */ |
