video: s3c-fb: remove unnecessary brackets

Remove unnecessary brackets and the duplicated VIDTCON2 definition.

Also, header comment is modified, because EXYNOS series is supported and
<mach/regs-fb.h> is not available.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 97 insertions, 102 deletions

diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h
index 086525661c68..be7b853485b8 100644
--- a/include/video/samsung_fimd.h
+++ b/include/video/samsung_fimd.h
@@ -8,12 +8,8 @@
  * S3C Platform - new-style fimd and framebuffer register definitions
  *
  * This is the register set for the fimd and new style framebuffer interface
- * found from the S3C2443 onwards into the S3C2416, S3C2450 and the
- * S3C64XX series such as the S3C6400 and S3C6410.
- *
- * The file does not contain the cpu specific items which are based on
- * whichever architecture is selected, it only contains the core of the
- * register set. See <mach/regs-fb.h> to get the specifics.
+ * found from the S3C2443 onwards into the S3C2416, S3C2450, the
+ * S3C64XX series such as the S3C6400 and S3C6410, and EXYNOS series.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -22,10 +18,10 @@
 
 /* VIDCON0 */
 
-#define VIDCON0                                 (0x00)
+#define VIDCON0                                 0x00
 #define VIDCON0_INTERLACE                       (1 << 29)
 #define VIDCON0_VIDOUT_MASK                     (0x7 << 26)
-#define VIDCON0_VIDOUT_SHIFT                    (26)
+#define VIDCON0_VIDOUT_SHIFT                    26
 #define VIDCON0_VIDOUT_RGB                      (0x0 << 26)
 #define VIDCON0_VIDOUT_TV                       (0x1 << 26)
 #define VIDCON0_VIDOUT_I80_LDI0                 (0x2 << 26)
@@ -35,7 +31,7 @@
 #define VIDCON0_VIDOUT_WB_I80_LDI1              (0x7 << 26)
 
 #define VIDCON0_L1_DATA_MASK                    (0x7 << 23)
-#define VIDCON0_L1_DATA_SHIFT                   (23)
+#define VIDCON0_L1_DATA_SHIFT                   23
 #define VIDCON0_L1_DATA_16BPP                   (0x0 << 23)
 #define VIDCON0_L1_DATA_18BPP16                 (0x1 << 23)
 #define VIDCON0_L1_DATA_18BPP9                  (0x2 << 23)
@@ -44,7 +40,7 @@
 #define VIDCON0_L1_DATA_16BPP8                  (0x5 << 23)
 
 #define VIDCON0_L0_DATA_MASK                    (0x7 << 20)
-#define VIDCON0_L0_DATA_SHIFT                   (20)
+#define VIDCON0_L0_DATA_SHIFT                   20
 #define VIDCON0_L0_DATA_16BPP                   (0x0 << 20)
 #define VIDCON0_L0_DATA_18BPP16                 (0x1 << 20)
 #define VIDCON0_L0_DATA_18BPP9                  (0x2 << 20)
@@ -53,7 +49,7 @@
 #define VIDCON0_L0_DATA_16BPP8                  (0x5 << 20)
 
 #define VIDCON0_PNRMODE_MASK                    (0x3 << 17)
-#define VIDCON0_PNRMODE_SHIFT                   (17)
+#define VIDCON0_PNRMODE_SHIFT                   17
 #define VIDCON0_PNRMODE_RGB                     (0x0 << 17)
 #define VIDCON0_PNRMODE_BGR                     (0x1 << 17)
 #define VIDCON0_PNRMODE_SERIAL_RGB              (0x2 << 17)
@@ -61,14 +57,14 @@
 
 #define VIDCON0_CLKVALUP                        (1 << 16)
 #define VIDCON0_CLKVAL_F_MASK                   (0xff << 6)
-#define VIDCON0_CLKVAL_F_SHIFT                  (6)
-#define VIDCON0_CLKVAL_F_LIMIT                  (0xff)
+#define VIDCON0_CLKVAL_F_SHIFT                  6
+#define VIDCON0_CLKVAL_F_LIMIT                  0xff
 #define VIDCON0_CLKVAL_F(_x)                    ((_x) << 6)
 #define VIDCON0_VLCKFREE                        (1 << 5)
 #define VIDCON0_CLKDIR                          (1 << 4)
 
 #define VIDCON0_CLKSEL_MASK                     (0x3 << 2)
-#define VIDCON0_CLKSEL_SHIFT                    (2)
+#define VIDCON0_CLKSEL_SHIFT                    2
 #define VIDCON0_CLKSEL_HCLK                     (0x0 << 2)
 #define VIDCON0_CLKSEL_LCD                      (0x1 << 2)
 #define VIDCON0_CLKSEL_27M                      (0x3 << 2)
@@ -76,13 +72,13 @@
 #define VIDCON0_ENVID                           (1 << 1)
 #define VIDCON0_ENVID_F                         (1 << 0)
 
-#define VIDCON1                                 (0x04)
+#define VIDCON1                                 0x04
 #define VIDCON1_LINECNT_MASK                    (0x7ff << 16)
-#define VIDCON1_LINECNT_SHIFT                   (16)
+#define VIDCON1_LINECNT_SHIFT                   16
 #define VIDCON1_LINECNT_GET(_v)                 (((_v) >> 16) & 0x7ff)
 #define VIDCON1_FSTATUS_EVEN                    (1 << 15)
 #define VIDCON1_VSTATUS_MASK                    (0x3 << 13)
-#define VIDCON1_VSTATUS_SHIFT                   (13)
+#define VIDCON1_VSTATUS_SHIFT                   13
 #define VIDCON1_VSTATUS_VSYNC                   (0x0 << 13)
 #define VIDCON1_VSTATUS_BACKPORCH               (0x1 << 13)
 #define VIDCON1_VSTATUS_ACTIVE                  (0x2 << 13)
@@ -98,12 +94,12 @@
 
 /* VIDCON2 */
 
-#define VIDCON2                                 (0x08)
+#define VIDCON2                                 0x08
 #define VIDCON2_EN601                           (1 << 23)
 #define VIDCON2_TVFMTSEL_SW                     (1 << 14)
 
 #define VIDCON2_TVFMTSEL1_MASK                  (0x3 << 12)
-#define VIDCON2_TVFMTSEL1_SHIFT                 (12)
+#define VIDCON2_TVFMTSEL1_SHIFT                 12
 #define VIDCON2_TVFMTSEL1_RGB                   (0x0 << 12)
 #define VIDCON2_TVFMTSEL1_YUV422                (0x1 << 12)
 #define VIDCON2_TVFMTSEL1_YUV444                (0x2 << 12)
@@ -115,74 +111,73 @@
  * Might not be present in the S3C6410 documentation,
  * but tests prove it's there almost for sure; shouldn't hurt in any case.
  */
-#define PRTCON                                  (0x0c)
+#define PRTCON                                  0x0c
 #define PRTCON_PROTECT                          (1 << 11)
 
 /* VIDTCON0 */
 
-#define VIDTCON0                                (0x10)
+#define VIDTCON0                                0x10
 #define VIDTCON0_VBPDE_MASK                     (0xff << 24)
-#define VIDTCON0_VBPDE_SHIFT                    (24)
-#define VIDTCON0_VBPDE_LIMIT                    (0xff)
+#define VIDTCON0_VBPDE_SHIFT                    24
+#define VIDTCON0_VBPDE_LIMIT                    0xff
 #define VIDTCON0_VBPDE(_x)                      ((_x) << 24)
 
 #define VIDTCON0_VBPD_MASK                      (0xff << 16)
-#define VIDTCON0_VBPD_SHIFT                     (16)
-#define VIDTCON0_VBPD_LIMIT                     (0xff)
+#define VIDTCON0_VBPD_SHIFT                     16
+#define VIDTCON0_VBPD_LIMIT                     0xff
 #define VIDTCON0_VBPD(_x)                       ((_x) << 16)
 
 #define VIDTCON0_VFPD_MASK                      (0xff << 8)
-#define VIDTCON0_VFPD_SHIFT                     (8)
-#define VIDTCON0_VFPD_LIMIT                     (0xff)
+#define VIDTCON0_VFPD_SHIFT                     8
+#define VIDTCON0_VFPD_LIMIT                     0xff
 #define VIDTCON0_VFPD(_x)                       ((_x) << 8)
 
 #define VIDTCON0_VSPW_MASK                      (0xff << 0)
-#define VIDTCON0_VSPW_SHIFT                     (0)
-#define VIDTCON0_VSPW_LIMIT                     (0xff)
+#define VIDTCON0_VSPW_SHIFT                     0
+#define VIDTCON0_VSPW_LIMIT                     0xff
 #define VIDTCON0_VSPW(_x)                       ((_x) << 0)