diff options
| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2008-08-08 16:21:02 -0400 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2008-08-08 16:21:02 -0400 |
| commit | e4ddcb0a6bf04d53ce77b4eb87bbbb32c4261d11 (patch) | |
| tree | d27d2fea50a384d97aa2d0cf5c8657c916f761d4 /include/video | |
| parent | f2afa7711f8585ffc088ba538b9a510e0d5dca12 (diff) | |
| parent | 6e86841d05f371b5b9b86ce76c02aaee83352298 (diff) | |
Merge commit 'v2.6.27-rc1' into for-linus
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/atmel_lcdc.h | 2 | ||||
| -rw-r--r-- | include/video/ili9320.h | 201 | ||||
| -rw-r--r-- | include/video/neomagic.h | 17 | ||||
| -rw-r--r-- | include/video/platform_lcd.h | 21 | ||||
| -rw-r--r-- | include/video/trident.h | 77 |
5 files changed, 248 insertions, 70 deletions
diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h index ed64862c4e18..613173b5db69 100644 --- a/include/video/atmel_lcdc.h +++ b/include/video/atmel_lcdc.h | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #ifndef __ATMEL_LCDC_H__ | 22 | #ifndef __ATMEL_LCDC_H__ |
| 23 | #define __ATMEL_LCDC_H__ | 23 | #define __ATMEL_LCDC_H__ |
| 24 | 24 | ||
| 25 | #include <linux/workqueue.h> | ||
| 25 | 26 | ||
| 26 | /* Way LCD wires are connected to the chip: | 27 | /* Way LCD wires are connected to the chip: |
| 27 | * Some Atmel chips use BGR color mode (instead of standard RGB) | 28 | * Some Atmel chips use BGR color mode (instead of standard RGB) |
| @@ -37,6 +38,7 @@ struct atmel_lcdfb_info { | |||
| 37 | struct fb_info *info; | 38 | struct fb_info *info; |
| 38 | void __iomem *mmio; | 39 | void __iomem *mmio; |
| 39 | unsigned long irq_base; | 40 | unsigned long irq_base; |
| 41 | struct work_struct task; | ||
| 40 | 42 | ||
| 41 | unsigned int guard_time; | 43 | unsigned int guard_time; |
| 42 | struct platform_device *pdev; | 44 | struct platform_device *pdev; |
diff --git a/include/video/ili9320.h b/include/video/ili9320.h new file mode 100644 index 000000000000..e5d1622e3f33 --- /dev/null +++ b/include/video/ili9320.h | |||
| @@ -0,0 +1,201 @@ | |||
| 1 | /* include/video/ili9320.c | ||
| 2 | * | ||
| 3 | * ILI9320 LCD controller configuration control. | ||
| 4 | * | ||
| 5 | * Copyright 2007 Simtec Electronics | ||
| 6 | * Ben Dooks <ben@simtec.co.uk> | ||
| 7 | * | ||
| 8 | * http://armlinux.simtec.co.uk/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #define ILI9320_REG(x) (x) | ||
| 16 | |||
| 17 | #define ILI9320_INDEX ILI9320_REG(0x00) | ||
| 18 | |||
| 19 | #define ILI9320_OSCILATION ILI9320_REG(0x00) | ||
| 20 | #define ILI9320_DRIVER ILI9320_REG(0x01) | ||
| 21 | #define ILI9320_DRIVEWAVE ILI9320_REG(0x02) | ||
| 22 | #define ILI9320_ENTRYMODE ILI9320_REG(0x03) | ||
| 23 | #define ILI9320_RESIZING ILI9320_REG(0x04) | ||
| 24 | #define ILI9320_DISPLAY1 ILI9320_REG(0x07) | ||
| 25 | #define ILI9320_DISPLAY2 ILI9320_REG(0x08) | ||
| 26 | #define ILI9320_DISPLAY3 ILI9320_REG(0x09) | ||
| 27 | #define ILI9320_DISPLAY4 ILI9320_REG(0x0A) | ||
| 28 | #define ILI9320_RGB_IF1 ILI9320_REG(0x0C) | ||
| 29 | #define ILI9320_FRAMEMAKER ILI9320_REG(0x0D) | ||
| 30 | #define ILI9320_RGB_IF2 ILI9320_REG(0x0F) | ||
| 31 | |||
| 32 | #define ILI9320_POWER1 ILI9320_REG(0x10) | ||
| 33 | #define ILI9320_POWER2 ILI9320_REG(0x11) | ||
| 34 | #define ILI9320_POWER3 ILI9320_REG(0x12) | ||
| 35 | #define ILI9320_POWER4 ILI9320_REG(0x13) | ||
| 36 | #define ILI9320_GRAM_HORIZ_ADDR ILI9320_REG(0x20) | ||
| 37 | #define ILI9320_GRAM_VERT_ADD ILI9320_REG(0x21) | ||
| 38 | #define ILI9320_POWER7 ILI9320_REG(0x29) | ||
| 39 | #define ILI9320_FRAME_RATE_COLOUR ILI9320_REG(0x2B) | ||
| 40 | |||
| 41 | #define ILI9320_GAMMA1 ILI9320_REG(0x30) | ||
| 42 | #define ILI9320_GAMMA2 ILI9320_REG(0x31) | ||
| 43 | #define ILI9320_GAMMA3 ILI9320_REG(0x32) | ||
| 44 | #define ILI9320_GAMMA4 ILI9320_REG(0x35) | ||
| 45 | #define ILI9320_GAMMA5 ILI9320_REG(0x36) | ||
| 46 | #define ILI9320_GAMMA6 ILI9320_REG(0x37) | ||
| 47 | #define ILI9320_GAMMA7 ILI9320_REG(0x38) | ||
| 48 | #define ILI9320_GAMMA8 ILI9320_REG(0x39) | ||
| 49 | #define ILI9320_GAMMA9 ILI9320_REG(0x3C) | ||
| 50 | #define ILI9320_GAMMA10 ILI9320_REG(0x3D) | ||
| 51 | |||
| 52 | #define ILI9320_HORIZ_START ILI9320_REG(0x50) | ||
| 53 | #define ILI9320_HORIZ_END ILI9320_REG(0x51) | ||
| 54 | #define ILI9320_VERT_START ILI9320_REG(0x52) | ||
| 55 | #define ILI9320_VERT_END ILI9320_REG(0x53) | ||
| 56 | |||
| 57 | #define ILI9320_DRIVER2 ILI9320_REG(0x60) | ||
| 58 | #define ILI9320_BASE_IMAGE ILI9320_REG(0x61) | ||
| 59 | #define ILI9320_VERT_SCROLL ILI9320_REG(0x6a) | ||
| 60 | |||
| 61 | #define ILI9320_PARTIAL1_POSITION ILI9320_REG(0x80) | ||
| 62 | #define ILI9320_PARTIAL1_START ILI9320_REG(0x81) | ||
| 63 | #define ILI9320_PARTIAL1_END ILI9320_REG(0x82) | ||
| 64 | #define ILI9320_PARTIAL2_POSITION ILI9320_REG(0x83) | ||
| 65 | #define ILI9320_PARTIAL2_START ILI9320_REG(0x84) | ||
| 66 | #define ILI9320_PARTIAL2_END ILI9320_REG(0x85) | ||
| 67 | |||
| 68 | #define ILI9320_INTERFACE1 ILI9320_REG(0x90) | ||
| 69 | #define ILI9320_INTERFACE2 ILI9320_REG(0x92) | ||
| 70 | #define ILI9320_INTERFACE3 ILI9320_REG(0x93) | ||
| 71 | #define ILI9320_INTERFACE4 ILI9320_REG(0x95) | ||
| 72 | #define ILI9320_INTERFACE5 ILI9320_REG(0x97) | ||
| 73 | #define ILI9320_INTERFACE6 ILI9320_REG(0x98) | ||
| 74 | |||
| 75 | /* Register contents definitions. */ | ||
| 76 | |||
| 77 | #define ILI9320_OSCILATION_OSC (1 << 0) | ||
| 78 | |||
| 79 | #define ILI9320_DRIVER_SS (1 << 8) | ||
| 80 | #define ILI9320_DRIVER_SM (1 << 10) | ||
| 81 | |||
| 82 | #define ILI9320_DRIVEWAVE_EOR (1 << 8) | ||
| 83 | #define ILI9320_DRIVEWAVE_BC (1 << 9) | ||
| 84 | #define ILI9320_DRIVEWAVE_MUSTSET (1 << 10) | ||
| 85 | |||
| 86 | #define ILI9320_ENTRYMODE_AM (1 << 3) | ||
| 87 | #define ILI9320_ENTRYMODE_ID(x) ((x) << 4) | ||
| 88 | #define ILI9320_ENTRYMODE_ORG (1 << 7) | ||
| 89 | #define ILI9320_ENTRYMODE_HWM (1 << 8) | ||
| 90 | #define ILI9320_ENTRYMODE_BGR (1 << 12) | ||
| 91 | #define ILI9320_ENTRYMODE_DFM (1 << 14) | ||
| 92 | #define ILI9320_ENTRYMODE_TRI (1 << 15) | ||
| 93 | |||
| 94 | |||
| 95 | #define ILI9320_RESIZING_RSZ(x) ((x) << 0) | ||
| 96 | #define ILI9320_RESIZING_RCH(x) ((x) << 4) | ||
| 97 | #define ILI9320_RESIZING_RCV(x) ((x) << 8) | ||
| 98 | |||
| 99 | |||
| 100 | #define ILI9320_DISPLAY1_D(x) ((x) << 0) | ||
| 101 | #define ILI9320_DISPLAY1_CL (1 << 3) | ||
| 102 | #define ILI9320_DISPLAY1_DTE (1 << 4) | ||
| 103 | #define ILI9320_DISPLAY1_GON (1 << 5) | ||
| 104 | #define ILI9320_DISPLAY1_BASEE (1 << 8) | ||
| 105 | #define ILI9320_DISPLAY1_PTDE(x) ((x) << 12) | ||
| 106 | |||
| 107 | |||
| 108 | #define ILI9320_DISPLAY2_BP(x) ((x) << 0) | ||
| 109 | #define ILI9320_DISPLAY2_FP(x) ((x) << 8) | ||
| 110 | |||
| 111 | |||
| 112 | #define ILI9320_RGBIF1_RIM_RGB18 (0 << 0) | ||
| 113 | #define ILI9320_RGBIF1_RIM_RGB16 (1 << 0) | ||
| 114 | #define ILI9320_RGBIF1_RIM_RGB6 (2 << 0) | ||
| 115 | |||
| 116 | #define ILI9320_RGBIF1_CLK_INT (0 << 4) | ||
| 117 | #define ILI9320_RGBIF1_CLK_RGBIF (1 << 4) | ||
| 118 | #define ILI9320_RGBIF1_CLK_VSYNC (2 << 4) | ||
| 119 | |||
| 120 | #define ILI9320_RGBIF1_RM (1 << 8) | ||
| 121 | |||
| 122 | #define ILI9320_RGBIF1_ENC_FRAMES(x) (((x) - 1)<< 13) | ||
| 123 | |||
| 124 | #define ILI9320_RGBIF2_DPL (1 << 0) | ||
| 125 | #define ILI9320_RGBIF2_EPL (1 << 1) | ||
| 126 | #define ILI9320_RGBIF2_HSPL (1 << 3) | ||
| 127 | #define ILI9320_RGBIF2_VSPL (1 << 4) | ||
| 128 | |||
| 129 | |||
| 130 | #define ILI9320_POWER1_SLP (1 << 1) | ||
| 131 | #define ILI9320_POWER1_DSTB (1 << 2) | ||
| 132 | #define ILI9320_POWER1_AP(x) ((x) << 4) | ||
| 133 | #define ILI9320_POWER1_APE (1 << 7) | ||
| 134 | #define ILI9320_POWER1_BT(x) ((x) << 8) | ||
| 135 | #define ILI9320_POWER1_SAP (1 << 12) | ||
| 136 | |||
| 137 | |||
| 138 | #define ILI9320_POWER2_VC(x) ((x) << 0) | ||
| 139 | #define ILI9320_POWER2_DC0(x) ((x) << 4) | ||
| 140 | #define ILI9320_POWER2_DC1(x) ((x) << 8) | ||
| 141 | |||
| 142 | |||
| 143 | #define ILI9320_POWER3_VRH(x) ((x) << 0) | ||
| 144 | #define ILI9320_POWER3_PON (1 << 4) | ||
| 145 | #define ILI9320_POWER3_VCMR (1 << 8) | ||
| 146 | |||
| 147 | |||
| 148 | #define ILI9320_POWER4_VREOUT(x) ((x) << 8) | ||
| 149 | |||
| 150 | |||
| 151 | #define ILI9320_DRIVER2_SCNL(x) ((x) << 0) | ||
| 152 | #define ILI9320_DRIVER2_NL(x) ((x) << 8) | ||
| 153 | #define ILI9320_DRIVER2_GS (1 << 15) | ||
| 154 | |||
| 155 | |||
| 156 | #define ILI9320_BASEIMAGE_REV (1 << 0) | ||
| 157 | #define ILI9320_BASEIMAGE_VLE (1 << 1) | ||
| 158 | #define ILI9320_BASEIMAGE_NDL (1 << 2) | ||
| 159 | |||
| 160 | |||
| 161 | #define ILI9320_INTERFACE4_RTNE(x) (x) | ||
| 162 | #define ILI9320_INTERFACE4_DIVE(x) ((x) << 8) | ||
| 163 | |||
| 164 | /* SPI interface definitions */ | ||
| 165 | |||
| 166 | #define ILI9320_SPI_IDCODE (0x70) | ||
| 167 | #define ILI9320_SPI_ID(x) ((x) << 2) | ||
| 168 | #define ILI9320_SPI_READ (0x01) | ||
| 169 | #define ILI9320_SPI_WRITE (0x00) | ||
| 170 | #define ILI9320_SPI_DATA (0x02) | ||
| 171 | #define ILI9320_SPI_INDEX (0x00) | ||
| 172 | |||
| 173 | /* platform data to pass configuration from lcd */ | ||
| 174 | |||
| 175 | enum ili9320_suspend { | ||
| 176 | ILI9320_SUSPEND_OFF, | ||
| 177 | ILI9320_SUSPEND_DEEP, | ||
| 178 | }; | ||
| 179 | |||
| 180 | struct ili9320_platdata { | ||
| 181 | unsigned short hsize; | ||
| 182 | unsigned short vsize; | ||
| 183 | |||
| 184 | enum ili9320_suspend suspend; | ||
| 185 | |||
| 186 | /* set the reset line, 0 = reset asserted, 1 = normal */ | ||
| 187 | void (*reset)(unsigned int val); | ||
| 188 | |||
| 189 | unsigned short entry_mode; | ||
| 190 | unsigned short display2; | ||
| 191 | unsigned short display3; | ||
| 192 | unsigned short display4; | ||
| 193 | unsigned short rgb_if1; | ||
| 194 | unsigned short rgb_if2; | ||
| 195 | unsigned short interface2; | ||
| 196 | unsigned short interface3; | ||
| 197 | unsigned short interface4; | ||
| 198 | unsigned short interface5; | ||
| 199 | unsigned short interface6; | ||
| 200 | }; | ||
| 201 | |||
diff --git a/include/video/neomagic.h b/include/video/neomagic.h index a9e118a1cd16..38910da0ae59 100644 --- a/include/video/neomagic.h +++ b/include/video/neomagic.h | |||
| @@ -90,23 +90,6 @@ | |||
| 90 | #define PCI_CHIP_NM2360 0x0006 | 90 | #define PCI_CHIP_NM2360 0x0006 |
| 91 | #define PCI_CHIP_NM2380 0x0016 | 91 | #define PCI_CHIP_NM2380 0x0016 |
| 92 | 92 | ||
| 93 | |||
| 94 | struct xtimings { | ||
| 95 | unsigned int pixclock; | ||
| 96 | unsigned int HDisplay; | ||
| 97 | unsigned int HSyncStart; | ||
| 98 | unsigned int HSyncEnd; | ||
| 99 | unsigned int HTotal; | ||
| 100 | unsigned int VDisplay; | ||
| 101 | unsigned int VSyncStart; | ||
| 102 | unsigned int VSyncEnd; | ||
| 103 | unsigned int VTotal; | ||
| 104 | unsigned int sync; | ||
| 105 | int dblscan; | ||
| 106 | int interlaced; | ||
| 107 | }; | ||
| 108 | |||
| 109 | |||
| 110 | /* --------------------------------------------------------------------- */ | 93 | /* --------------------------------------------------------------------- */ |
| 111 | 94 | ||
| 112 | typedef volatile struct { | 95 | typedef volatile struct { |
diff --git a/include/video/platform_lcd.h b/include/video/platform_lcd.h new file mode 100644 index 000000000000..ad3bdfe743b2 --- /dev/null +++ b/include/video/platform_lcd.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* include/video/platform_lcd.h | ||
| 2 | * | ||
| 3 | * Copyright 2008 Simtec Electronics | ||
| 4 | * Ben Dooks <ben@simtec.co.uk> | ||
| 5 | * | ||
| 6 | * Generic platform-device LCD power control interface. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | struct plat_lcd_data; | ||
| 15 | struct fb_info; | ||
| 16 | |||
| 17 | struct plat_lcd_data { | ||
| 18 | void (*set_power)(struct plat_lcd_data *, unsigned int power); | ||
| 19 | int (*match_fb)(struct plat_lcd_data *, struct fb_info *); | ||
| 20 | }; | ||
| 21 | |||
diff --git a/include/video/trident.h b/include/video/trident.h index 200be2551681..b6ce19d1b61b 100644 --- a/include/video/trident.h +++ b/include/video/trident.h | |||
| @@ -4,9 +4,9 @@ | |||
| 4 | #endif | 4 | #endif |
| 5 | 5 | ||
| 6 | #if TRIDENTFB_DEBUG | 6 | #if TRIDENTFB_DEBUG |
| 7 | #define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a);mdelay(1000); | 7 | #define debug(f, a...) printk("%s:" f, __func__ , ## a); |
| 8 | #else | 8 | #else |
| 9 | #define debug(f,a...) | 9 | #define debug(f, a...) |
| 10 | #endif | 10 | #endif |
| 11 | 11 | ||
| 12 | #define output(f, a...) pr_info("tridentfb: " f, ## a) | 12 | #define output(f, a...) pr_info("tridentfb: " f, ## a) |
| @@ -24,7 +24,9 @@ | |||
| 24 | #define CYBER9397DVD 0x939A | 24 | #define CYBER9397DVD 0x939A |
| 25 | #define CYBER9520 0x9520 | 25 | #define CYBER9520 0x9520 |
| 26 | #define CYBER9525DVD 0x9525 | 26 | #define CYBER9525DVD 0x9525 |
| 27 | #define TGUI9440 0x9440 | ||
| 27 | #define TGUI9660 0x9660 | 28 | #define TGUI9660 0x9660 |
| 29 | #define PROVIDIA9685 0x9685 | ||
| 28 | #define IMAGE975 0x9750 | 30 | #define IMAGE975 0x9750 |
| 29 | #define IMAGE985 0x9850 | 31 | #define IMAGE985 0x9850 |
| 30 | #define BLADE3D 0x9880 | 32 | #define BLADE3D 0x9880 |
| @@ -39,36 +41,11 @@ | |||
| 39 | #define CYBERBLADEXPm8 0x9910 | 41 | #define CYBERBLADEXPm8 0x9910 |
| 40 | #define CYBERBLADEXPm16 0x9930 | 42 | #define CYBERBLADEXPm16 0x9930 |
| 41 | 43 | ||
| 42 | /* acceleration families */ | ||
| 43 | #define IMAGE 0 | ||
| 44 | #define BLADE 1 | ||
| 45 | #define XP 2 | ||
| 46 | |||
| 47 | #define is_image(id) | ||
| 48 | #define is_xp(id) ((id == CYBERBLADEXPAi1) ||\ | ||
| 49 | (id == CYBERBLADEXPm8) ||\ | ||
| 50 | (id == CYBERBLADEXPm16)) | ||
| 51 | |||
| 52 | #define is_blade(id) ((id == BLADE3D) ||\ | ||
| 53 | (id == CYBERBLADEE4) ||\ | ||
| 54 | (id == CYBERBLADEi7) ||\ | ||
| 55 | (id == CYBERBLADEi7D) ||\ | ||
| 56 | (id == CYBERBLADEi1) ||\ | ||
| 57 | (id == CYBERBLADEi1D) ||\ | ||
| 58 | (id == CYBERBLADEAi1) ||\ | ||
| 59 | (id == CYBERBLADEAi1D)) | ||
| 60 | |||
| 61 | /* these defines are for 'lcd' variable */ | 44 | /* these defines are for 'lcd' variable */ |
| 62 | #define LCD_STRETCH 0 | 45 | #define LCD_STRETCH 0 |
| 63 | #define LCD_CENTER 1 | 46 | #define LCD_CENTER 1 |
| 64 | #define LCD_BIOS 2 | 47 | #define LCD_BIOS 2 |
| 65 | 48 | ||
| 66 | /* display types */ | ||
| 67 | #define DISPLAY_CRT 0 | ||
| 68 | #define DISPLAY_FP 1 | ||
| 69 | |||
| 70 | #define flatpanel (displaytype == DISPLAY_FP) | ||
| 71 | |||
| 72 | /* General Registers */ | 49 | /* General Registers */ |
| 73 | #define SPR 0x1F /* Software Programming Register (videoram) */ | 50 | #define SPR 0x1F /* Software Programming Register (videoram) */ |
| 74 | 51 | ||
| @@ -88,33 +65,7 @@ | |||
| 88 | #define SKey 0x37 | 65 | #define SKey 0x37 |
| 89 | #define SPKey 0x57 | 66 | #define SPKey 0x57 |
| 90 | 67 | ||
| 91 | /* 0x3x4 */ | ||
| 92 | #define CRTHTotal 0x00 | ||
| 93 | #define CRTHDispEnd 0x01 | ||
| 94 | #define CRTHBlankStart 0x02 | ||
| 95 | #define CRTHBlankEnd 0x03 | ||
| 96 | #define CRTHSyncStart 0x04 | ||
| 97 | #define CRTHSyncEnd 0x05 | ||
| 98 | |||
| 99 | #define CRTVTotal 0x06 | ||
| 100 | #define CRTVDispEnd 0x12 | ||
| 101 | #define CRTVBlankStart 0x15 | ||
| 102 | #define CRTVBlankEnd 0x16 | ||
| 103 | #define CRTVSyncStart 0x10 | ||
| 104 | #define CRTVSyncEnd 0x11 | ||
| 105 | |||
| 106 | #define CRTOverflow 0x07 | ||
| 107 | #define CRTPRowScan 0x08 | ||
| 108 | #define CRTMaxScanLine 0x09 | ||
| 109 | #define CRTModeControl 0x17 | ||
| 110 | #define CRTLineCompare 0x18 | ||
| 111 | |||
| 112 | /* 3x4 */ | 68 | /* 3x4 */ |
| 113 | #define StartAddrHigh 0x0C | ||
| 114 | #define StartAddrLow 0x0D | ||
| 115 | #define Offset 0x13 | ||
| 116 | #define Underline 0x14 | ||
| 117 | #define CRTCMode 0x17 | ||
| 118 | #define CRTCModuleTest 0x1E | 69 | #define CRTCModuleTest 0x1E |
| 119 | #define FIFOControl 0x20 | 70 | #define FIFOControl 0x20 |
| 120 | #define LinearAddReg 0x21 | 71 | #define LinearAddReg 0x21 |
| @@ -173,3 +124,23 @@ | |||
| 173 | #define BiosMode 0x5c | 124 | #define BiosMode 0x5c |
| 174 | #define BiosReg 0x5d | 125 | #define BiosReg 0x5d |
| 175 | 126 | ||
| 127 | /* Graphics Engine */ | ||
| 128 | #define STATUS 0x2120 | ||
| 129 | #define OLDCMD 0x2124 | ||
| 130 | #define DRAWFL 0x2128 | ||
| 131 | #define OLDCLR 0x212C | ||
| 132 | #define OLDDST 0x2138 | ||
| 133 | #define OLDSRC 0x213C | ||
| 134 | #define OLDDIM 0x2140 | ||
| 135 | #define CMD 0x2144 | ||
| 136 | #define ROP 0x2148 | ||
| 137 | #define COLOR 0x2160 | ||
| 138 | #define BGCOLOR 0x2164 | ||
| 139 | #define SRC1 0x2100 | ||
| 140 | #define SRC2 0x2104 | ||
| 141 | #define DST1 0x2108 | ||
| 142 | #define DST2 0x210C | ||
| 143 | |||
| 144 | #define ROP_S 0xCC | ||
| 145 | #define ROP_P 0xF0 | ||
| 146 | #define ROP_X 0x66 | ||
