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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-08-15 08:59:49 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-10-12 05:13:40 -0400
commit96f60e37dc66091bde8d5de136ff6fda09f2d799 (patch)
tree2c2cc30a5ac7339730430369e27d33d4a8dd21ef /include/uapi
parent15c03dd4859ab16f9212238f29dd315654aa94f6 (diff)
DRM: Armada: Add Armada DRM driver
This patch adds support for the pair of LCD controllers on the Marvell Armada 510 SoCs. This driver supports: - multiple contiguous scanout buffers for video and graphics - shm backed cacheable buffer objects for X pixmaps for Vivante GPU acceleration - dual lcd0 and lcd1 crt operation - video overlay on each LCD crt via DRM planes - page flipping of the main scanout buffers - DRM prime for buffer export/import This driver is trivial to extend to other Armada SoCs. Included in this commit is the core driver with no output support; output support is platform and encoder driver dependent. Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/armada_drm.h45
1 files changed, 45 insertions, 0 deletions
diff --git a/include/uapi/drm/armada_drm.h b/include/uapi/drm/armada_drm.h
new file mode 100644
index 000000000000..8dec3fdc99c7
--- /dev/null
+++ b/include/uapi/drm/armada_drm.h
@@ -0,0 +1,45 @@
1/*
2 * Copyright (C) 2012 Russell King
3 * With inspiration from the i915 driver
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#ifndef DRM_ARMADA_IOCTL_H
10#define DRM_ARMADA_IOCTL_H
11
12#define DRM_ARMADA_GEM_CREATE 0x00
13#define DRM_ARMADA_GEM_MMAP 0x02
14#define DRM_ARMADA_GEM_PWRITE 0x03
15
16#define ARMADA_IOCTL(dir, name, str) \
17 DRM_##dir(DRM_COMMAND_BASE + DRM_ARMADA_##name, struct drm_armada_##str)
18
19struct drm_armada_gem_create {
20 uint32_t handle;
21 uint32_t size;
22};
23#define DRM_IOCTL_ARMADA_GEM_CREATE \
24 ARMADA_IOCTL(IOWR, GEM_CREATE, gem_create)
25
26struct drm_armada_gem_mmap {
27 uint32_t handle;
28 uint32_t pad;
29 uint64_t offset;
30 uint64_t size;
31 uint64_t addr;
32};
33#define DRM_IOCTL_ARMADA_GEM_MMAP \
34 ARMADA_IOCTL(IOWR, GEM_MMAP, gem_mmap)
35
36struct drm_armada_gem_pwrite {
37 uint64_t ptr;
38 uint32_t handle;
39 uint32_t offset;
40 uint32_t size;
41};
42#define DRM_IOCTL_ARMADA_GEM_PWRITE \
43 ARMADA_IOCTL(IOW, GEM_PWRITE, gem_pwrite)
44
45#endif