diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2015-02-10 12:16:05 -0500 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 17:28:16 -0500 |
| commit | 93b81f5102a7cd270a305c2741b17c8d44bb0629 (patch) | |
| tree | a3cd4877a1945243987f394795c5f44ebb17a6f0 /include/uapi | |
| parent | 35cb6f3b4ee352bff28d2541909e30f193788b52 (diff) | |
drm/i915: Add tiled framebuffer modifiers
To be used from the new addfb2 extension.
v2:
- Drop Intel-specific untiled modfier.
- Move to drm_fourcc.h.
- Document layouts a bit and denote them as platform-specific and not
useable for cross-driver sharing.
- Add Y-tiling for completeness.
- Drop special docstring markers to avoid confusing kerneldoc.
v3: Give Y-tiling a unique idea, noticed by Tvrtko.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/drm/drm_fourcc.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 622109677747..4837c3d2319a 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h | |||
| @@ -164,4 +164,35 @@ | |||
| 164 | * authoritative source for all of these. | 164 | * authoritative source for all of these. |
| 165 | */ | 165 | */ |
| 166 | 166 | ||
| 167 | /* Intel framebuffer modifiers */ | ||
| 168 | |||
| 169 | /* | ||
| 170 | * Intel X-tiling layout | ||
| 171 | * | ||
| 172 | * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb) | ||
| 173 | * in row-major layout. Within the tile bytes are laid out row-major, with | ||
| 174 | * a platform-dependent stride. On top of that the memory can apply | ||
| 175 | * platform-depending swizzling of some higher address bits into bit6. | ||
| 176 | * | ||
| 177 | * This format is highly platforms specific and not useful for cross-driver | ||
| 178 | * sharing. It exists since on a given platform it does uniquely identify the | ||
| 179 | * layout in a simple way for i915-specific userspace. | ||
| 180 | */ | ||
| 181 | #define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1) | ||
| 182 | |||
| 183 | /* | ||
| 184 | * Intel Y-tiling layout | ||
| 185 | * | ||
| 186 | * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb) | ||
| 187 | * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes) | ||
| 188 | * chunks column-major, with a platform-dependent height. On top of that the | ||
| 189 | * memory can apply platform-depending swizzling of some higher address bits | ||
| 190 | * into bit6. | ||
| 191 | * | ||
| 192 | * This format is highly platforms specific and not useful for cross-driver | ||
| 193 | * sharing. It exists since on a given platform it does uniquely identify the | ||
| 194 | * layout in a simple way for i915-specific userspace. | ||
| 195 | */ | ||
| 196 | #define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2) | ||
| 197 | |||
| 167 | #endif /* DRM_FOURCC_H */ | 198 | #endif /* DRM_FOURCC_H */ |
