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authorMatthew Wilcox <matthew.r.wilcox@intel.com>2013-06-25 15:14:56 -0400
committerMatthew Wilcox <matthew.r.wilcox@intel.com>2013-09-03 16:32:25 -0400
commit42c7768316905dc64ad22256d6cbff273e3fbf55 (patch)
treef3a275a003ecb7f85e5f47c5e99c716d4676e0e2 /include/uapi
parent7d8224574cbd2326a6be00f319f5f7597abec3f6 (diff)
NVMe: Split header file into user-visible and kernel-visible pieces
To build user programs that call the NVMe ioctls, we need to have a user header file. Catch up to the new way of doing that by splitting the header file into kernel and uapi portions. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/linux/Kbuild1
-rw-r--r--include/uapi/linux/nvme.h471
2 files changed, 472 insertions, 0 deletions
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index ab5d4992e568..a5e677a7070f 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -281,6 +281,7 @@ header-y += nfs_mount.h
281header-y += nfsacl.h 281header-y += nfsacl.h
282header-y += nl80211.h 282header-y += nl80211.h
283header-y += nubus.h 283header-y += nubus.h
284header-y += nvme.h
284header-y += nvram.h 285header-y += nvram.h
285header-y += omap3isp.h 286header-y += omap3isp.h
286header-y += omapfb.h 287header-y += omapfb.h
diff --git a/include/uapi/linux/nvme.h b/include/uapi/linux/nvme.h
new file mode 100644
index 000000000000..31ed566f81f6
--- /dev/null
+++ b/include/uapi/linux/nvme.h
@@ -0,0 +1,471 @@
1/*
2 * Definitions for the NVM Express interface
3 * Copyright (c) 2011-2013, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19#ifndef _UAPI_LINUX_NVME_H
20#define _UAPI_LINUX_NVME_H
21
22#include <linux/types.h>
23
24struct nvme_id_power_state {
25 __le16 max_power; /* centiwatts */
26 __u16 rsvd2;
27 __le32 entry_lat; /* microseconds */
28 __le32 exit_lat; /* microseconds */
29 __u8 read_tput;
30 __u8 read_lat;
31 __u8 write_tput;
32 __u8 write_lat;
33 __u8 rsvd16[16];
34};
35
36struct nvme_id_ctrl {
37 __le16 vid;
38 __le16 ssvid;
39 char sn[20];
40 char mn[40];
41 char fr[8];
42 __u8 rab;
43 __u8 ieee[3];
44 __u8 mic;
45 __u8 mdts;
46 __u8 rsvd78[178];
47 __le16 oacs;
48 __u8 acl;
49 __u8 aerl;
50 __u8 frmw;
51 __u8 lpa;
52 __u8 elpe;
53 __u8 npss;
54 __u8 rsvd264[248];
55 __u8 sqes;
56 __u8 cqes;
57 __u8 rsvd514[2];
58 __le32 nn;
59 __le16 oncs;
60 __le16 fuses;
61 __u8 fna;
62 __u8 vwc;
63 __le16 awun;
64 __le16 awupf;
65 __u8 rsvd530[1518];
66 struct nvme_id_power_state psd[32];
67 __u8 vs[1024];
68};
69
70enum {
71 NVME_CTRL_ONCS_COMPARE = 1 << 0,
72 NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
73 NVME_CTRL_ONCS_DSM = 1 << 2,
74};
75
76struct nvme_lbaf {
77 __le16 ms;
78 __u8 ds;
79 __u8 rp;
80};
81
82struct nvme_id_ns {
83 __le64 nsze;
84 __le64 ncap;
85 __le64 nuse;
86 __u8 nsfeat;
87 __u8 nlbaf;
88 __u8 flbas;
89 __u8 mc;
90 __u8 dpc;
91 __u8 dps;
92 __u8 rsvd30[98];
93 struct nvme_lbaf lbaf[16];
94 __u8 rsvd192[192];
95 __u8 vs[3712];
96};
97
98enum {
99 NVME_NS_FEAT_THIN = 1 << 0,
100 NVME_LBAF_RP_BEST = 0,
101 NVME_LBAF_RP_BETTER = 1,
102 NVME_LBAF_RP_GOOD = 2,
103 NVME_LBAF_RP_DEGRADED = 3,
104};
105
106struct nvme_smart_log {
107 __u8 critical_warning;
108 __u8 temperature[2];
109 __u8 avail_spare;
110 __u8 spare_thresh;
111 __u8 percent_used;
112 __u8 rsvd6[26];
113 __u8 data_units_read[16];
114 __u8 data_units_written[16];
115 __u8 host_reads[16];
116 __u8 host_writes[16];
117 __u8 ctrl_busy_time[16];
118 __u8 power_cycles[16];
119 __u8 power_on_hours[16];
120 __u8 unsafe_shutdowns[16];
121 __u8 media_errors[16];
122 __u8 num_err_log_entries[16];
123 __u8 rsvd192[320];
124};
125
126enum {
127 NVME_SMART_CRIT_SPARE = 1 << 0,
128 NVME_SMART_CRIT_TEMPERATURE = 1 << 1,
129 NVME_SMART_CRIT_RELIABILITY = 1 << 2,
130 NVME_SMART_CRIT_MEDIA = 1 << 3,
131 NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
132};
133
134struct nvme_lba_range_type {
135 __u8 type;
136 __u8 attributes;
137 __u8 rsvd2[14];
138 __u64 slba;
139 __u64 nlb;
140 __u8 guid[16];
141 __u8 rsvd48[16];
142};
143
144enum {
145 NVME_LBART_TYPE_FS = 0x01,
146 NVME_LBART_TYPE_RAID = 0x02,
147 NVME_LBART_TYPE_CACHE = 0x03,
148 NVME_LBART_TYPE_SWAP = 0x04,
149
150 NVME_LBART_ATTRIB_TEMP = 1 << 0,
151 NVME_LBART_ATTRIB_HIDE = 1 << 1,
152};
153
154/* I/O commands */
155
156enum nvme_opcode {
157 nvme_cmd_flush = 0x00,
158 nvme_cmd_write = 0x01,
159 nvme_cmd_read = 0x02,
160 nvme_cmd_write_uncor = 0x04,
161 nvme_cmd_compare = 0x05,
162 nvme_cmd_dsm = 0x09,
163};
164
165struct nvme_common_command {
166 __u8 opcode;
167 __u8 flags;
168 __u16 command_id;
169 __le32 nsid;
170 __le32 cdw2[2];
171 __le64 metadata;
172 __le64 prp1;
173 __le64 prp2;
174 __le32 cdw10[6];
175};
176
177struct nvme_rw_command {
178 __u8 opcode;
179 __u8 flags;
180 __u16 command_id;
181 __le32 nsid;
182 __u64 rsvd2;
183 __le64 metadata;
184 __le64 prp1;
185 __le64 prp2;
186 __le64 slba;
187 __le16 length;
188 __le16 control;
189 __le32 dsmgmt;
190 __le32 reftag;
191 __le16 apptag;
192 __le16 appmask;
193};
194
195enum {
196 NVME_RW_LR = 1 << 15,
197 NVME_RW_FUA = 1 << 14,
198 NVME_RW_DSM_FREQ_UNSPEC = 0,
199 NVME_RW_DSM_FREQ_TYPICAL = 1,
200 NVME_RW_DSM_FREQ_RARE = 2,
201 NVME_RW_DSM_FREQ_READS = 3,
202 NVME_RW_DSM_FREQ_WRITES = 4,
203 NVME_RW_DSM_FREQ_RW = 5,
204 NVME_RW_DSM_FREQ_ONCE = 6,
205 NVME_RW_DSM_FREQ_PREFETCH = 7,
206 NVME_RW_DSM_FREQ_TEMP = 8,
207 NVME_RW_DSM_LATENCY_NONE = 0 << 4,
208 NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
209 NVME_RW_DSM_LATENCY_NORM = 2 << 4,
210 NVME_RW_DSM_LATENCY_LOW = 3 << 4,
211 NVME_RW_DSM_SEQ_REQ = 1 << 6,
212 NVME_RW_DSM_COMPRESSED = 1 << 7,
213};
214
215struct nvme_dsm_cmd {
216 __u8 opcode;
217 __u8 flags;
218 __u16 command_id;
219 __le32 nsid;
220 __u64 rsvd2[2];
221 __le64 prp1;
222 __le64 prp2;
223 __le32 nr;
224 __le32 attributes;
225 __u32 rsvd12[4];
226};
227
228enum {
229 NVME_DSMGMT_IDR = 1 << 0,
230 NVME_DSMGMT_IDW = 1 << 1,
231 NVME_DSMGMT_AD = 1 << 2,
232};
233
234struct nvme_dsm_range {
235 __le32 cattr;
236 __le32 nlb;
237 __le64 slba;
238};
239
240/* Admin commands */
241
242enum nvme_admin_opcode {
243 nvme_admin_delete_sq = 0x00,
244 nvme_admin_create_sq = 0x01,
245 nvme_admin_get_log_page = 0x02,
246 nvme_admin_delete_cq = 0x04,
247 nvme_admin_create_cq = 0x05,
248 nvme_admin_identify = 0x06,
249 nvme_admin_abort_cmd = 0x08,
250 nvme_admin_set_features = 0x09,
251 nvme_admin_get_features = 0x0a,
252 nvme_admin_async_event = 0x0c,
253 nvme_admin_activate_fw = 0x10,
254 nvme_admin_download_fw = 0x11,
255 nvme_admin_format_nvm = 0x80,
256 nvme_admin_security_send = 0x81,
257 nvme_admin_security_recv = 0x82,
258};
259
260enum {
261 NVME_QUEUE_PHYS_CONTIG = (1 << 0),
262 NVME_CQ_IRQ_ENABLED = (1 << 1),
263 NVME_SQ_PRIO_URGENT = (0 << 1),
264 NVME_SQ_PRIO_HIGH = (1 << 1),
265 NVME_SQ_PRIO_MEDIUM = (2 << 1),
266 NVME_SQ_PRIO_LOW = (3 << 1),
267 NVME_FEAT_ARBITRATION = 0x01,
268 NVME_FEAT_POWER_MGMT = 0x02,
269 NVME_FEAT_LBA_RANGE = 0x03,
270 NVME_FEAT_TEMP_THRESH = 0x04,
271 NVME_FEAT_ERR_RECOVERY = 0x05,
272 NVME_FEAT_VOLATILE_WC = 0x06,
273 NVME_FEAT_NUM_QUEUES = 0x07,
274 NVME_FEAT_IRQ_COALESCE = 0x08,
275 NVME_FEAT_IRQ_CONFIG = 0x09,
276 NVME_FEAT_WRITE_ATOMIC = 0x0a,
277 NVME_FEAT_ASYNC_EVENT = 0x0b,
278 NVME_FEAT_SW_PROGRESS = 0x0c,
279 NVME_FWACT_REPL = (0 << 3),
280 NVME_FWACT_REPL_ACTV = (1 << 3),
281 NVME_FWACT_ACTV = (2 << 3),
282};
283
284struct nvme_identify {
285 __u8 opcode;
286 __u8 flags;
287 __u16 command_id;
288 __le32 nsid;
289 __u64 rsvd2[2];
290 __le64 prp1;
291 __le64 prp2;
292 __le32 cns;
293 __u32 rsvd11[5];
294};
295
296struct nvme_features {
297 __u8 opcode;
298 __u8 flags;
299 __u16 command_id;
300 __le32 nsid;
301 __u64 rsvd2[2];
302 __le64 prp1;
303 __le64 prp2;
304 __le32 fid;
305 __le32 dword11;
306 __u32 rsvd12[4];
307};
308
309struct nvme_create_cq {
310 __u8 opcode;
311 __u8 flags;
312 __u16 command_id;
313 __u32 rsvd1[5];
314 __le64 prp1;
315 __u64 rsvd8;
316 __le16 cqid;
317 __le16 qsize;
318 __le16 cq_flags;
319 __le16 irq_vector;
320 __u32 rsvd12[4];
321};
322
323struct nvme_create_sq {
324 __u8 opcode;
325 __u8 flags;
326 __u16 command_id;
327 __u32 rsvd1[5];
328 __le64 prp1;
329 __u64 rsvd8;
330 __le16 sqid;
331 __le16 qsize;
332 __le16 sq_flags;
333 __le16 cqid;
334 __u32 rsvd12[4];
335};
336
337struct nvme_delete_queue {
338 __u8 opcode;
339 __u8 flags;
340 __u16 command_id;
341 __u32 rsvd1[9];
342 __le16 qid;
343 __u16 rsvd10;
344 __u32 rsvd11[5];
345};
346
347struct nvme_download_firmware {
348 __u8 opcode;
349 __u8 flags;
350 __u16 command_id;
351 __u32 rsvd1[5];
352 __le64 prp1;
353 __le64 prp2;
354 __le32 numd;
355 __le32 offset;
356 __u32 rsvd12[4];
357};
358
359struct nvme_format_cmd {
360 __u8 opcode;
361 __u8 flags;
362 __u16 command_id;
363 __le32 nsid;
364 __u64 rsvd2[4];
365 __le32 cdw10;
366 __u32 rsvd11[5];
367};
368
369struct nvme_command {
370 union {
371 struct nvme_common_command common;
372 struct nvme_rw_command rw;
373 struct nvme_identify identify;
374 struct nvme_features features;
375 struct nvme_create_cq create_cq;
376 struct nvme_create_sq create_sq;
377 struct nvme_delete_queue delete_queue;
378 struct nvme_download_firmware dlfw;
379 struct nvme_format_cmd format;
380 struct nvme_dsm_cmd dsm;
381 };
382};
383
384enum {
385 NVME_SC_SUCCESS = 0x0,
386 NVME_SC_INVALID_OPCODE = 0x1,
387 NVME_SC_INVALID_FIELD = 0x2,
388 NVME_SC_CMDID_CONFLICT = 0x3,
389 NVME_SC_DATA_XFER_ERROR = 0x4,
390 NVME_SC_POWER_LOSS = 0x5,
391 NVME_SC_INTERNAL = 0x6,
392 NVME_SC_ABORT_REQ = 0x7,
393 NVME_SC_ABORT_QUEUE = 0x8,
394 NVME_SC_FUSED_FAIL = 0x9,
395 NVME_SC_FUSED_MISSING = 0xa,
396 NVME_SC_INVALID_NS = 0xb,
397 NVME_SC_CMD_SEQ_ERROR = 0xc,
398 NVME_SC_LBA_RANGE = 0x80,
399 NVME_SC_CAP_EXCEEDED = 0x81,
400 NVME_SC_NS_NOT_READY = 0x82,
401 NVME_SC_CQ_INVALID = 0x100,
402 NVME_SC_QID_INVALID = 0x101,
403 NVME_SC_QUEUE_SIZE = 0x102,
404 NVME_SC_ABORT_LIMIT = 0x103,
405 NVME_SC_ABORT_MISSING = 0x104,
406 NVME_SC_ASYNC_LIMIT = 0x105,
407 NVME_SC_FIRMWARE_SLOT = 0x106,
408 NVME_SC_FIRMWARE_IMAGE = 0x107,
409 NVME_SC_INVALID_VECTOR = 0x108,
410 NVME_SC_INVALID_LOG_PAGE = 0x109,
411 NVME_SC_INVALID_FORMAT = 0x10a,
412 NVME_SC_BAD_ATTRIBUTES = 0x180,
413 NVME_SC_WRITE_FAULT = 0x280,
414 NVME_SC_READ_ERROR = 0x281,
415 NVME_SC_GUARD_CHECK = 0x282,
416 NVME_SC_APPTAG_CHECK = 0x283,
417 NVME_SC_REFTAG_CHECK = 0x284,
418 NVME_SC_COMPARE_FAILED = 0x285,
419 NVME_SC_ACCESS_DENIED = 0x286,
420};
421
422struct nvme_completion {
423 __le32 result; /* Used by admin commands to return data */
424 __u32 rsvd;
425 __le16 sq_head; /* how much of this queue may be reclaimed */
426 __le16 sq_id; /* submission queue that generated this entry */
427 __u16 command_id; /* of the command which completed */
428 __le16 status; /* did the command fail, and if so, why? */
429};
430
431struct nvme_user_io {
432 __u8 opcode;
433 __u8 flags;
434 __u16 control;
435 __u16 nblocks;
436 __u16 rsvd;
437 __u64 metadata;
438 __u64 addr;
439 __u64 slba;
440 __u32 dsmgmt;
441 __u32 reftag;
442 __u16 apptag;
443 __u16 appmask;
444};
445
446struct nvme_admin_cmd {
447 __u8 opcode;
448 __u8 flags;
449 __u16 rsvd1;
450 __u32 nsid;
451 __u32 cdw2;
452 __u32 cdw3;
453 __u64 metadata;
454 __u64 addr;
455 __u32 metadata_len;
456 __u32 data_len;
457 __u32 cdw10;
458 __u32 cdw11;
459 __u32 cdw12;
460 __u32 cdw13;
461 __u32 cdw14;
462 __u32 cdw15;
463 __u32 timeout_ms;
464 __u32 result;
465};
466
467#define NVME_IOCTL_ID _IO('N', 0x40)
468#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd)
469#define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io)
470
471#endif /* _UAPI_LINUX_NVME_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-06 21:39:28 -0500