Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Inki writes:
"- add dmabuf attach/detach feature
  . This patch would resolve performance deterioration issue
    when v4l2-based driver is using the buffer imported from gem.
- drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute
  . With gem allocation, kernel space mapping isn't allocated and
    also physical pages aren't mapped with the kernel space.
    The physical pages are mapped with kernel space though vmap
    function only for console framebuffer.
- add the below two patches I missed.
  drm: exynos: moved exynos drm device registration to drm driver
  drm: exynos: moved exynos drm hdmi device registration to drm driver
- add IPP subsystem framework and its-based device drivers.
  . This patch set includes fimc, rotator and gsc drivers to perform
    image scaling, rotation and color space conversion.
- add runtime pm support to hdmi driver.
- And fixups and cleanups."

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (30 commits)
  drm/exynos: add gsc ipp driver
  drm/exynos: add rotator ipp driver
  drm/exynos: add fimc ipp driver
  drm/exynos: add iommu support for ipp
  drm/exynos: add ipp subsystem
  drm/exynos: support device tree for fimd
  drm/exynos: support extended screen coordinate of fimd
  drm/exynos: fix x, y coordinates for right bottom pixel
  drm/exynos: fix fb offset calculation for plane
  drm/exynos: hdmi: Fix potential NULL pointer dereference error
  drm/exynos: hdmi: Add CONFIG_OF and use of_match_ptr() macro
  drm/exynos: add support for hdmiphy power control for exynos5
  drm/exynos: add runtime pm support for mixer
  drm/exynos: added runtime pm support for hdmi
  drm/exynos: fix allocation and cache mapping type
  drm/exynos: reorder framebuffer init sequence
  drm/exynos/iommu: fix return value check in drm_create_iommu_mapping()
  drm/exynos: remove unused vaddr member
  drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute
  drm/exynos: add exception codes to exynos_drm_fbdev_create()
  ...

1 files changed, 190 insertions, 0 deletions

diff --git a/include/uapi/drm/exynos_drm.h b/include/uapi/drm/exynos_drm.h
index 49f010f2b27f..e7f52c334005 100644
--- a/include/uapi/drm/exynos_drm.h
+++ b/include/uapi/drm/exynos_drm.h
@@ -163,6 +163,170 @@ struct drm_exynos_g2d_exec {
         __u64                                   async;
 };
 
+enum drm_exynos_ops_id {
+        EXYNOS_DRM_OPS_SRC,
+        EXYNOS_DRM_OPS_DST,
+        EXYNOS_DRM_OPS_MAX,
+};
+
+struct drm_exynos_sz {
+        __u32   hsize;
+        __u32   vsize;
+};
+
+struct drm_exynos_pos {
+        __u32   x;
+        __u32   y;
+        __u32   w;
+        __u32   h;
+};
+
+enum drm_exynos_flip {
+        EXYNOS_DRM_FLIP_NONE = (0 << 0),
+        EXYNOS_DRM_FLIP_VERTICAL = (1 << 0),
+        EXYNOS_DRM_FLIP_HORIZONTAL = (1 << 1),
+};
+
+enum drm_exynos_degree {
+        EXYNOS_DRM_DEGREE_0,
+        EXYNOS_DRM_DEGREE_90,
+        EXYNOS_DRM_DEGREE_180,
+        EXYNOS_DRM_DEGREE_270,
+};
+
+enum drm_exynos_planer {
+        EXYNOS_DRM_PLANAR_Y,
+        EXYNOS_DRM_PLANAR_CB,
+        EXYNOS_DRM_PLANAR_CR,
+        EXYNOS_DRM_PLANAR_MAX,
+};
+
+/**
+ * A structure for ipp supported property list.
+ *
+ * @version: version of this structure.
+ * @ipp_id: id of ipp driver.
+ * @count: count of ipp driver.
+ * @writeback: flag of writeback supporting.
+ * @flip: flag of flip supporting.
+ * @degree: flag of degree information.
+ * @csc: flag of csc supporting.
+ * @crop: flag of crop supporting.
+ * @scale: flag of scale supporting.
+ * @refresh_min: min hz of refresh.
+ * @refresh_max: max hz of refresh.
+ * @crop_min: crop min resolution.
+ * @crop_max: crop max resolution.
+ * @scale_min: scale min resolution.
+ * @scale_max: scale max resolution.
+ */
+struct drm_exynos_ipp_prop_list {
+        __u32   version;
+        __u32   ipp_id;
+        __u32   count;
+        __u32   writeback;
+        __u32   flip;
+        __u32   degree;
+        __u32   csc;
+        __u32   crop;
+        __u32   scale;
+        __u32   refresh_min;
+        __u32   refresh_max;
+        __u32   reserved;
+        struct drm_exynos_sz    crop_min;
+        struct drm_exynos_sz    crop_max;
+        struct drm_exynos_sz    scale_min;
+        struct drm_exynos_sz    scale_max;
+};
+
+/**
+ * A structure for ipp config.
+ *
+ * @ops_id: property of operation directions.
+ * @flip: property of mirror, flip.
+ * @degree: property of rotation degree.
+ * @fmt: property of image format.
+ * @sz: property of image size.
+ * @pos: property of image position(src-cropped,dst-scaler).
+ */
+struct drm_exynos_ipp_config {
+        enum drm_exynos_ops_id ops_id;
+        enum drm_exynos_flip    flip;
+        enum drm_exynos_degree  degree;
+        __u32   fmt;
+        struct drm_exynos_sz    sz;
+        struct drm_exynos_pos   pos;
+};
+
+enum drm_exynos_ipp_cmd {
+        IPP_CMD_NONE,
+        IPP_CMD_M2M,
+        IPP_CMD_WB,
+        IPP_CMD_OUTPUT,
+        IPP_CMD_MAX,
+};
+
+/**
+ * A structure for ipp property.
+ *
+ * @config: source, destination config.
+ * @cmd: definition of command.
+ * @ipp_id: id of ipp driver.
+ * @prop_id: id of property.
+ * @refresh_rate: refresh rate.
+ */
+struct drm_exynos_ipp_property {
+        struct drm_exynos_ipp_config config[EXYNOS_DRM_OPS_MAX];
+        enum drm_exynos_ipp_cmd cmd;
+        __u32   ipp_id;
+        __u32   prop_id;
+        __u32   refresh_rate;
+};
+
+enum drm_exynos_ipp_buf_type {
+        IPP_BUF_ENQUEUE,
+        IPP_BUF_DEQUEUE,
+};
+
+/**
+ * A structure for ipp buffer operations.
+ *
+ * @ops_id: operation directions.
+ * @buf_type: definition of buffer.
+ * @prop_id: id of property.
+ * @buf_id: id of buffer.
+ * @handle: Y, Cb, Cr each planar handle.
+ * @user_data: user data.
+ */
+struct drm_exynos_ipp_queue_buf {
+        enum drm_exynos_ops_id  ops_id;
+        enum drm_exynos_ipp_buf_type    buf_type;
+        __u32   prop_id;
+        __u32   buf_id;
+        __u32   handle[EXYNOS_DRM_PLANAR_MAX];
+        __u32   reserved;
+        __u64   user_data;
+};
+
+enum drm_exynos_ipp_ctrl {
+        IPP_CTRL_PLAY,
+        IPP_CTRL_STOP,
+        IPP_CTRL_PAUSE,
+        IPP_CTRL_RESUME,
+        IPP_CTRL_MAX,
+};
+
+/**
+ * A structure for ipp start/stop operations.
+ *
+ * @prop_id: id of property.
+ * @ctrl: definition of control.
+ */
+struct drm_exynos_ipp_cmd_ctrl {
+        __u32   prop_id;
+        enum drm_exynos_ipp_ctrl        ctrl;
+};
+
 #define DRM_EXYNOS_GEM_CREATE           0x00
 #define DRM_EXYNOS_GEM_MAP_OFFSET       0x01
 #define DRM_EXYNOS_GEM_MMAP             0x02
@@ -175,6 +339,12 @@ struct drm_exynos_g2d_exec {
 #define DRM_EXYNOS_G2D_SET_CMDLIST      0x21
 #define DRM_EXYNOS_G2D_EXEC             0x22
 
+/* IPP - Image Post Processing */
+#define DRM_EXYNOS_IPP_GET_PROPERTY     0x30
+#define DRM_EXYNOS_IPP_SET_PROPERTY     0x31
+#define DRM_EXYNOS_IPP_QUEUE_BUF        0x32
+#define DRM_EXYNOS_IPP_CMD_CTRL 0x33
+
 #define DRM_IOCTL_EXYNOS_GEM_CREATE             DRM_IOWR(DRM_COMMAND_BASE + \
                 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
 
@@ -197,8 +367,18 @@ struct drm_exynos_g2d_exec {
 #define DRM_IOCTL_EXYNOS_G2D_EXEC               DRM_IOWR(DRM_COMMAND_BASE + \
                 DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
 
+#define DRM_IOCTL_EXYNOS_IPP_GET_PROPERTY       DRM_IOWR(DRM_COMMAND_BASE + \
+                DRM_EXYNOS_IPP_GET_PROPERTY, struct drm_exynos_ipp_prop_list)
+#define DRM_IOCTL_EXYNOS_IPP_SET_PROPERTY       DRM_IOWR(DRM_COMMAND_BASE + \
+                DRM_EXYNOS_IPP_SET_PROPERTY, struct drm_exynos_ipp_property)
+#define DRM_IOCTL_EXYNOS_IPP_QUEUE_BUF  DRM_IOWR(DRM_COMMAND_BASE + \
+                DRM_EXYNOS_IPP_QUEUE_BUF, struct drm_exynos_ipp_queue_buf)
+#define DRM_IOCTL_EXYNOS_IPP_CMD_CTRL           DRM_IOWR(DRM_COMMAND_BASE + \
+                DRM_EXYNOS_IPP_CMD_CTRL, struct drm_exynos_ipp_cmd_ctrl)
+
 /* EXYNOS specific events */
 #define DRM_EXYNOS_G2D_EVENT            0x80000000
+#define DRM_EXYNOS_IPP_EVENT            0x80000001
 
 struct drm_exynos_g2d_event {
         struct drm_event        base;
@@ -209,4 +389,14 @@ struct drm_exynos_g2d_event {
         __u32                   reserved;
 };
 
+struct drm_exynos_ipp_event {
+        struct drm_event        base;
+        __u64                   user_data;
+        __u32                   tv_sec;
+        __u32                   tv_usec;
+        __u32                   prop_id;
+        __u32                   reserved;
+        __u32                   buf_id[EXYNOS_DRM_OPS_MAX];
+};
+
 #endif /* _UAPI_EXYNOS_DRM_H_ */