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authorDave Airlie <airlied@redhat.com>2014-04-03 18:03:21 -0400
committerDave Airlie <airlied@redhat.com>2014-04-03 18:03:21 -0400
commit2614dc66837c2a6fd0e14e3f8e72343782c8b784 (patch)
treeadd8d8f2394ab8bc696ca787bf2c14ef45a88297 /include/uapi
parentd9961b22716ddf59ca307fe862f93ff0ea919952 (diff)
parent06fb220b2d1a80be5621fa06ef276a3890e6be78 (diff)
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/omap: Don't dereference list head when the connectors list is empty drm/msm/mdp: add timeout for irq wait drm/msm: validate flags, etc drm/msm: use componentised device support drm/msm: add chip-id param drm/msm: crank down gpu when inactive drm/msm: spin helper drm/msm: add hang_debug module param drm/msm: hdmi audio support
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/msm_drm.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
index d3c62074016d..0664c31f010c 100644
--- a/include/uapi/drm/msm_drm.h
+++ b/include/uapi/drm/msm_drm.h
@@ -50,6 +50,7 @@ struct drm_msm_timespec {
50 50
51#define MSM_PARAM_GPU_ID 0x01 51#define MSM_PARAM_GPU_ID 0x01
52#define MSM_PARAM_GMEM_SIZE 0x02 52#define MSM_PARAM_GMEM_SIZE 0x02
53#define MSM_PARAM_CHIP_ID 0x03
53 54
54struct drm_msm_param { 55struct drm_msm_param {
55 uint32_t pipe; /* in, MSM_PIPE_x */ 56 uint32_t pipe; /* in, MSM_PIPE_x */
@@ -69,6 +70,12 @@ struct drm_msm_param {
69#define MSM_BO_WC 0x00020000 70#define MSM_BO_WC 0x00020000
70#define MSM_BO_UNCACHED 0x00040000 71#define MSM_BO_UNCACHED 0x00040000
71 72
73#define MSM_BO_FLAGS (MSM_BO_SCANOUT | \
74 MSM_BO_GPU_READONLY | \
75 MSM_BO_CACHED | \
76 MSM_BO_WC | \
77 MSM_BO_UNCACHED)
78
72struct drm_msm_gem_new { 79struct drm_msm_gem_new {
73 uint64_t size; /* in */ 80 uint64_t size; /* in */
74 uint32_t flags; /* in, mask of MSM_BO_x */ 81 uint32_t flags; /* in, mask of MSM_BO_x */
@@ -85,6 +92,8 @@ struct drm_msm_gem_info {
85#define MSM_PREP_WRITE 0x02 92#define MSM_PREP_WRITE 0x02
86#define MSM_PREP_NOSYNC 0x04 93#define MSM_PREP_NOSYNC 0x04
87 94
95#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC)
96
88struct drm_msm_gem_cpu_prep { 97struct drm_msm_gem_cpu_prep {
89 uint32_t handle; /* in */ 98 uint32_t handle; /* in */
90 uint32_t op; /* in, mask of MSM_PREP_x */ 99 uint32_t op; /* in, mask of MSM_PREP_x */
@@ -152,6 +161,9 @@ struct drm_msm_gem_submit_cmd {
152 */ 161 */
153#define MSM_SUBMIT_BO_READ 0x0001 162#define MSM_SUBMIT_BO_READ 0x0001
154#define MSM_SUBMIT_BO_WRITE 0x0002 163#define MSM_SUBMIT_BO_WRITE 0x0002
164
165#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE)
166
155struct drm_msm_gem_submit_bo { 167struct drm_msm_gem_submit_bo {
156 uint32_t flags; /* in, mask of MSM_SUBMIT_BO_x */ 168 uint32_t flags; /* in, mask of MSM_SUBMIT_BO_x */
157 uint32_t handle; /* in, GEM handle */ 169 uint32_t handle; /* in, GEM handle */