diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2013-08-27 13:11:10 -0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-08-27 14:50:13 -0400 |
| commit | d2ab1fa68c61f01b28ab0859a972c892d81f5d32 (patch) | |
| tree | 4e38144c01023a1ff640a3000fe1da94b60abae3 /include/uapi/linux | |
| parent | 808e34e2cd6bc74a2311b6a00d12a52e37fb50c0 (diff) | |
PCI: Rename PCIe capability definitions to follow convention
All other PCIe capability register fields include "PCI_EXP" + <reg-name> +
<field-name>. This renames PCI_EXP_OBFF_MASK, PCI_EXP_IDO_REQ_EN,
PCI_EXP_LTR_EN, and related fields using the same convention.
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com> # for MFD driver
Diffstat (limited to 'include/uapi/linux')
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index c3cc01d474b0..4b8f2e3bad58 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h | |||
| @@ -550,19 +550,19 @@ | |||
| 550 | * to use these fields safely. | 550 | * to use these fields safely. |
| 551 | */ | 551 | */ |
| 552 | #define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ | 552 | #define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ |
| 553 | #define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ | 553 | #define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ |
| 554 | #define PCI_EXP_DEVCAP2_LTR 0x800 /* Latency tolerance reporting */ | 554 | #define PCI_EXP_DEVCAP2_LTR 0x800 /* Latency tolerance reporting */ |
| 555 | #define PCI_EXP_OBFF_MASK 0xc0000 /* OBFF support mechanism */ | 555 | #define PCI_EXP_DEVCAP2_OBFF_MASK 0xc0000 /* OBFF support mechanism */ |
| 556 | #define PCI_EXP_OBFF_MSG 0x40000 /* New message signaling */ | 556 | #define PCI_EXP_DEVCAP2_OBFF_MSG 0x40000 /* New message signaling */ |
| 557 | #define PCI_EXP_OBFF_WAKE 0x80000 /* Re-use WAKE# for OBFF */ | 557 | #define PCI_EXP_DEVCAP2_OBFF_WAKE 0x80000 /* Re-use WAKE# for OBFF */ |
| 558 | #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ | 558 | #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ |
| 559 | #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ | 559 | #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ |
| 560 | #define PCI_EXP_IDO_REQ_EN 0x100 /* ID-based ordering request enable */ | 560 | #define PCI_EXP_DEVCTL2_IDO_REQ_EN 0x100 /* ID-based ordering request enable */ |
| 561 | #define PCI_EXP_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */ | 561 | #define PCI_EXP_DEVCTL2_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */ |
| 562 | #define PCI_EXP_LTR_EN 0x400 /* Latency tolerance reporting */ | 562 | #define PCI_EXP_DEVCTL2_LTR_EN 0x400 /* Latency tolerance reporting */ |
| 563 | #define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */ | 563 | #define PCI_EXP_DEVCTL2_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */ |
| 564 | #define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */ | 564 | #define PCI_EXP_DEVCTL2_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */ |
| 565 | #define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ | 565 | #define PCI_EXP_DEVCTL2_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ |
| 566 | #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ | 566 | #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ |
| 567 | #define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */ | 567 | #define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */ |
| 568 | #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ | 568 | #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ |