perf: Add ability to sample machine state on interrupt

Enable capture of interrupted machine state for each sample.

Registers to sample are passed per event in the sample_regs_intr bitmask.

To sample interrupt machine state, the PERF_SAMPLE_INTR_REGS must be passed in
sample_type.

The list of available registers is arch dependent and provided by asm/perf_regs.h

Registers are laid out as u64 in the order of the bit order of sample_intr_regs.

This patch also adds a new ABI version PERF_ATTR_SIZE_VER4 because we extend
the perf_event_attr struct with a new u64 field.

Reviewed-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: cebbert.lkml@gmail.com
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-api@vger.kernel.org
Link: http://lkml.kernel.org/r/1411559322-16548-2-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

1 files changed, 14 insertions, 1 deletions

diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 9d845404d875..9b79abbd1ab8 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -137,8 +137,9 @@ enum perf_event_sample_format {
         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
+        PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 
-        PERF_SAMPLE_MAX = 1U << 18,             /* non-ABI */
+        PERF_SAMPLE_MAX = 1U << 19,             /* non-ABI */
 };
 
 /*
@@ -238,6 +239,7 @@ enum perf_event_read_format {
 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
                                         /* add: sample_stack_user */
+#define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 
 /*
  * Hardware event_id to monitor via a performance monitoring event:
@@ -334,6 +336,15 @@ struct perf_event_attr {
 
         /* Align to u64. */
         __u32   __reserved_2;
+        /*
+         * Defines set of regs to dump for each sample
+         * state captured on:
+         *  - precise = 0: PMU interrupt
+         *  - precise > 0: sampled instruction
+         *
+         * See asm/perf_regs.h for details.
+         */
+        __u64   sample_regs_intr;
 };
 
 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
@@ -686,6 +697,8 @@ enum perf_event_type {
          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
+         *      { u64                   abi; # enum perf_sample_regs_abi
+         *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
          * };
          */
         PERF_RECORD_SAMPLE                      = 9,