diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 04:47:30 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 04:47:30 -0400 |
commit | 0d4a42f6bd298e826620585e766a154ab460617a (patch) | |
tree | 406d8f7778691d858dbe3e48e4bbb10e99c0a58a /include/uapi/linux/v4l2-mediabus.h | |
parent | d62b4892f3d9f7dd2002e5309be10719d6805b0f (diff) | |
parent | a937536b868b8369b98967929045f1df54234323 (diff) |
Merge tag 'v3.9-rc3' into drm-intel-next-queued
Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in
commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <imre.deak@intel.com>
Date: Wed Feb 27 17:02:56 2013 -0800
lib/scatterlist: add simple page iterator
The merge itself is just two trivial conflicts:
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/uapi/linux/v4l2-mediabus.h')
-rw-r--r-- | include/uapi/linux/v4l2-mediabus.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/uapi/linux/v4l2-mediabus.h b/include/uapi/linux/v4l2-mediabus.h index 7d64e0e1a18b..b9b7bea04537 100644 --- a/include/uapi/linux/v4l2-mediabus.h +++ b/include/uapi/linux/v4l2-mediabus.h | |||
@@ -47,8 +47,9 @@ enum v4l2_mbus_pixelcode { | |||
47 | V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007, | 47 | V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007, |
48 | V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008, | 48 | V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008, |
49 | 49 | ||
50 | /* YUV (including grey) - next is 0x2014 */ | 50 | /* YUV (including grey) - next is 0x2017 */ |
51 | V4L2_MBUS_FMT_Y8_1X8 = 0x2001, | 51 | V4L2_MBUS_FMT_Y8_1X8 = 0x2001, |
52 | V4L2_MBUS_FMT_UV8_1X8 = 0x2015, | ||
52 | V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002, | 53 | V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002, |
53 | V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003, | 54 | V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003, |
54 | V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004, | 55 | V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004, |
@@ -65,14 +66,20 @@ enum v4l2_mbus_pixelcode { | |||
65 | V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010, | 66 | V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010, |
66 | V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011, | 67 | V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011, |
67 | V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012, | 68 | V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012, |
69 | V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014, | ||
68 | V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d, | 70 | V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d, |
69 | V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e, | 71 | V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e, |
72 | V4L2_MBUS_FMT_YUV10_1X30 = 0x2016, | ||
70 | 73 | ||
71 | /* Bayer - next is 0x3015 */ | 74 | /* Bayer - next is 0x3019 */ |
72 | V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001, | 75 | V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001, |
73 | V4L2_MBUS_FMT_SGBRG8_1X8 = 0x3013, | 76 | V4L2_MBUS_FMT_SGBRG8_1X8 = 0x3013, |
74 | V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002, | 77 | V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002, |
75 | V4L2_MBUS_FMT_SRGGB8_1X8 = 0x3014, | 78 | V4L2_MBUS_FMT_SRGGB8_1X8 = 0x3014, |
79 | V4L2_MBUS_FMT_SBGGR10_ALAW8_1X8 = 0x3015, | ||
80 | V4L2_MBUS_FMT_SGBRG10_ALAW8_1X8 = 0x3016, | ||
81 | V4L2_MBUS_FMT_SGRBG10_ALAW8_1X8 = 0x3017, | ||
82 | V4L2_MBUS_FMT_SRGGB10_ALAW8_1X8 = 0x3018, | ||
76 | V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b, | 83 | V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b, |
77 | V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c, | 84 | V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c, |
78 | V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009, | 85 | V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009, |