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authorBjorn Helgaas <bhelgaas@google.com>2013-12-14 15:06:53 -0500
committerBjorn Helgaas <bhelgaas@google.com>2013-12-15 20:00:00 -0500
commite7b4f0d7841b188423b641cab71d20b1a05234e9 (patch)
tree4bce89fc568ce7ed97509f4126015dff511c8feb /include/uapi/linux/pci_regs.h
parentdf72648c4d61d6d0ce033c0467a9fabec670fe46 (diff)
PCI: pciehp: Use symbolic constants for Slot Control fields
Add symbolic constants for the PCIe Slot Control indicator and power control fields defined by spec and use them instead of open-coded hex constants. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/uapi/linux/pci_regs.h')
-rw-r--r--include/uapi/linux/pci_regs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 4a98e85438a7..6d03ba42ab23 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -518,8 +518,16 @@
518#define PCI_EXP_SLTCTL_CCIE 0x0010 /* Command Completed Interrupt Enable */ 518#define PCI_EXP_SLTCTL_CCIE 0x0010 /* Command Completed Interrupt Enable */
519#define PCI_EXP_SLTCTL_HPIE 0x0020 /* Hot-Plug Interrupt Enable */ 519#define PCI_EXP_SLTCTL_HPIE 0x0020 /* Hot-Plug Interrupt Enable */
520#define PCI_EXP_SLTCTL_AIC 0x00c0 /* Attention Indicator Control */ 520#define PCI_EXP_SLTCTL_AIC 0x00c0 /* Attention Indicator Control */
521#define PCI_EXP_SLTCTL_ATTN_IND_ON 0x0040 /* Attention Indicator on */
522#define PCI_EXP_SLTCTL_ATTN_IND_BLINK 0x0080 /* Attention Indicator blinking */
523#define PCI_EXP_SLTCTL_ATTN_IND_OFF 0x00c0 /* Attention Indicator off */
521#define PCI_EXP_SLTCTL_PIC 0x0300 /* Power Indicator Control */ 524#define PCI_EXP_SLTCTL_PIC 0x0300 /* Power Indicator Control */
525#define PCI_EXP_SLTCTL_PWR_IND_ON 0x0100 /* Power Indicator on */
526#define PCI_EXP_SLTCTL_PWR_IND_BLINK 0x0200 /* Power Indicator blinking */
527#define PCI_EXP_SLTCTL_PWR_IND_OFF 0x0300 /* Power Indicator off */
522#define PCI_EXP_SLTCTL_PCC 0x0400 /* Power Controller Control */ 528#define PCI_EXP_SLTCTL_PCC 0x0400 /* Power Controller Control */
529#define PCI_EXP_SLTCTL_PWR_ON 0x0000 /* Power On */
530#define PCI_EXP_SLTCTL_PWR_OFF 0x0400 /* Power Off */
523#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */ 531#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */
524#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */ 532#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
525#define PCI_EXP_SLTSTA 26 /* Slot Status */ 533#define PCI_EXP_SLTSTA 26 /* Slot Status */