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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2012-10-30 03:20:56 -0400
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2012-10-30 03:20:56 -0400
commit53279f36dccffc26ff536003fd6bb97cc21c3b82 (patch)
tree9d16e497c0e4158c7c054c479bd0e9ff0388d7bb /include/uapi/linux/pci.h
parenta6e8c0a25377e27958b11b20e1927885ae7c9857 (diff)
parent8f0d8163b50e01f398b14bcd4dc039ac5ab18d64 (diff)
Merge tag 'v3.7-rc3' into next to sync up with recent USB and MFD changes
Diffstat (limited to 'include/uapi/linux/pci.h')
-rw-r--r--include/uapi/linux/pci.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/include/uapi/linux/pci.h b/include/uapi/linux/pci.h
new file mode 100644
index 000000000000..3c292bc0d1c1
--- /dev/null
+++ b/include/uapi/linux/pci.h
@@ -0,0 +1,41 @@
1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef _UAPILINUX_PCI_H
18#define _UAPILINUX_PCI_H
19
20#include <linux/pci_regs.h> /* The pci register defines */
21
22/*
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
26 *
27 * 7:3 = slot
28 * 2:0 = function
29 */
30#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32#define PCI_FUNC(devfn) ((devfn) & 0x07)
33
34/* Ioctls for /proc/bus/pci/X/Y nodes. */
35#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
40
41#endif /* _UAPILINUX_PCI_H */