Merge tag 'v3.9-rc3' into drm-intel-next-queued

Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in

commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <imre.deak@intel.com>
Date:   Wed Feb 27 17:02:56 2013 -0800

    lib/scatterlist: add simple page iterator

The merge itself is just two trivial conflicts:

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 15 insertions, 0 deletions

diff --git a/include/sound/cs4271.h b/include/sound/cs4271.h
index dd8c48d14ed9..70f45355acaa 100644
--- a/include/sound/cs4271.h
+++ b/include/sound/cs4271.h
@@ -20,6 +20,21 @@
 struct cs4271_platform_data {
         int gpio_nreset;        /* GPIO driving Reset pin, if any */
         bool amutec_eq_bmutec;  /* flag to enable AMUTEC=BMUTEC */
+
+        /*
+         * The CS4271 requires its LRCLK and MCLK to be stable before its RESET
+         * line is de-asserted. That also means that clocks cannot be changed
+         * without putting the chip back into hardware reset, which also requires
+         * a complete re-initialization of all registers.
+         *
+         * One (undocumented) workaround is to assert and de-assert the PDN bit
+         * in the MODE2 register. This workaround can be enabled with the
+         * following flag.
+         *
+         * Note that this is not needed in case the clocks are stable
+         * throughout the entire runtime of the codec.
+         */
+        bool enable_soft_reset;
 };
 
 #endif /* __CS4271_H */