diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2009-04-08 17:28:13 -0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-04-08 17:28:13 -0400 |
| commit | fd74ea65883c7e6903e9b652795f72b723a2be69 (patch) | |
| tree | 0792ad598080eae201d2836ac3c5a8fc46d0d03e /include/linux | |
| parent | c8f517c444e4f9f55b5b5ca202b8404691a35805 (diff) | |
| parent | 8c6db1bbf80123839ec87bdd6cb364aea384623d (diff) | |
Merge branch 'dmaengine' into async-tx-raid6
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/async_tx.h | 9 | ||||
| -rw-r--r-- | include/linux/dmaengine.h | 30 | ||||
| -rw-r--r-- | include/linux/dw_dmac.h | 19 | ||||
| -rw-r--r-- | include/linux/mm_types.h | 3 | ||||
| -rw-r--r-- | include/linux/sched.h | 3 |
5 files changed, 61 insertions, 3 deletions
diff --git a/include/linux/async_tx.h b/include/linux/async_tx.h index 45f6297821bd..5fc2ef8d97fa 100644 --- a/include/linux/async_tx.h +++ b/include/linux/async_tx.h | |||
| @@ -21,6 +21,15 @@ | |||
| 21 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
| 22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
| 23 | 23 | ||
| 24 | /* on architectures without dma-mapping capabilities we need to ensure | ||
| 25 | * that the asynchronous path compiles away | ||
| 26 | */ | ||
| 27 | #ifdef CONFIG_HAS_DMA | ||
| 28 | #define __async_inline | ||
| 29 | #else | ||
| 30 | #define __async_inline __always_inline | ||
| 31 | #endif | ||
| 32 | |||
| 24 | /** | 33 | /** |
| 25 | * dma_chan_ref - object used to manage dma channels received from the | 34 | * dma_chan_ref - object used to manage dma channels received from the |
| 26 | * dmaengine core. | 35 | * dmaengine core. |
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 1956c8d46d32..2e2aa3df170c 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h | |||
| @@ -23,9 +23,6 @@ | |||
| 23 | 23 | ||
| 24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
| 25 | #include <linux/uio.h> | 25 | #include <linux/uio.h> |
| 26 | #include <linux/kref.h> | ||
| 27 | #include <linux/completion.h> | ||
| 28 | #include <linux/rcupdate.h> | ||
| 29 | #include <linux/dma-mapping.h> | 26 | #include <linux/dma-mapping.h> |
| 30 | 27 | ||
| 31 | /** | 28 | /** |
| @@ -205,6 +202,7 @@ struct dma_async_tx_descriptor { | |||
| 205 | /** | 202 | /** |
| 206 | * struct dma_device - info on the entity supplying DMA services | 203 | * struct dma_device - info on the entity supplying DMA services |
| 207 | * @chancnt: how many DMA channels are supported | 204 | * @chancnt: how many DMA channels are supported |
| 205 | * @privatecnt: how many DMA channels are requested by dma_request_channel | ||
| 208 | * @channels: the list of struct dma_chan | 206 | * @channels: the list of struct dma_chan |
| 209 | * @global_node: list_head for global dma_device_list | 207 | * @global_node: list_head for global dma_device_list |
| 210 | * @cap_mask: one or more dma_capability flags | 208 | * @cap_mask: one or more dma_capability flags |
| @@ -227,6 +225,7 @@ struct dma_async_tx_descriptor { | |||
| 227 | struct dma_device { | 225 | struct dma_device { |
| 228 | 226 | ||
| 229 | unsigned int chancnt; | 227 | unsigned int chancnt; |
| 228 | unsigned int privatecnt; | ||
| 230 | struct list_head channels; | 229 | struct list_head channels; |
| 231 | struct list_head global_node; | 230 | struct list_head global_node; |
| 232 | dma_cap_mask_t cap_mask; | 231 | dma_cap_mask_t cap_mask; |
| @@ -291,6 +290,24 @@ static inline void net_dmaengine_put(void) | |||
| 291 | } | 290 | } |
| 292 | #endif | 291 | #endif |
| 293 | 292 | ||
| 293 | #ifdef CONFIG_ASYNC_TX_DMA | ||
| 294 | #define async_dmaengine_get() dmaengine_get() | ||
| 295 | #define async_dmaengine_put() dmaengine_put() | ||
| 296 | #define async_dma_find_channel(type) dma_find_channel(type) | ||
| 297 | #else | ||
| 298 | static inline void async_dmaengine_get(void) | ||
| 299 | { | ||
| 300 | } | ||
| 301 | static inline void async_dmaengine_put(void) | ||
| 302 | { | ||
| 303 | } | ||
| 304 | static inline struct dma_chan * | ||
| 305 | async_dma_find_channel(enum dma_transaction_type type) | ||
| 306 | { | ||
| 307 | return NULL; | ||
| 308 | } | ||
| 309 | #endif | ||
| 310 | |||
| 294 | dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan, | 311 | dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan, |
| 295 | void *dest, void *src, size_t len); | 312 | void *dest, void *src, size_t len); |
| 296 | dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan, | 313 | dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan, |
| @@ -337,6 +354,13 @@ __dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) | |||
| 337 | set_bit(tx_type, dstp->bits); | 354 | set_bit(tx_type, dstp->bits); |
| 338 | } | 355 | } |
| 339 | 356 | ||
| 357 | #define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask)) | ||
| 358 | static inline void | ||
| 359 | __dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) | ||
| 360 | { | ||
| 361 | clear_bit(tx_type, dstp->bits); | ||
| 362 | } | ||
| 363 | |||
| 340 | #define dma_cap_zero(mask) __dma_cap_zero(&(mask)) | 364 | #define dma_cap_zero(mask) __dma_cap_zero(&(mask)) |
| 341 | static inline void __dma_cap_zero(dma_cap_mask_t *dstp) | 365 | static inline void __dma_cap_zero(dma_cap_mask_t *dstp) |
| 342 | { | 366 | { |
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index d797dde247f7..c8aad713a046 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h | |||
| @@ -74,4 +74,23 @@ struct dw_dma_slave { | |||
| 74 | #define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ | 74 | #define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ |
| 75 | #define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ | 75 | #define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ |
| 76 | 76 | ||
| 77 | /* DMA API extensions */ | ||
| 78 | struct dw_cyclic_desc { | ||
| 79 | struct dw_desc **desc; | ||
| 80 | unsigned long periods; | ||
| 81 | void (*period_callback)(void *param); | ||
| 82 | void *period_callback_param; | ||
| 83 | }; | ||
| 84 | |||
| 85 | struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan, | ||
| 86 | dma_addr_t buf_addr, size_t buf_len, size_t period_len, | ||
| 87 | enum dma_data_direction direction); | ||
| 88 | void dw_dma_cyclic_free(struct dma_chan *chan); | ||
| 89 | int dw_dma_cyclic_start(struct dma_chan *chan); | ||
| 90 | void dw_dma_cyclic_stop(struct dma_chan *chan); | ||
| 91 | |||
| 92 | dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan); | ||
| 93 | |||
| 94 | dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan); | ||
| 95 | |||
| 77 | #endif /* DW_DMAC_H */ | 96 | #endif /* DW_DMAC_H */ |
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 92915e81443f..d84feb7bdbf0 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h | |||
| @@ -276,4 +276,7 @@ struct mm_struct { | |||
| 276 | #endif | 276 | #endif |
| 277 | }; | 277 | }; |
| 278 | 278 | ||
| 279 | /* Future-safe accessor for struct mm_struct's cpu_vm_mask. */ | ||
| 280 | #define mm_cpumask(mm) (&(mm)->cpu_vm_mask) | ||
| 281 | |||
| 279 | #endif /* _LINUX_MM_TYPES_H */ | 282 | #endif /* _LINUX_MM_TYPES_H */ |
diff --git a/include/linux/sched.h b/include/linux/sched.h index 8c216e057c94..011db2f4c94c 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h | |||
| @@ -1419,6 +1419,9 @@ struct task_struct { | |||
| 1419 | #endif | 1419 | #endif |
| 1420 | }; | 1420 | }; |
| 1421 | 1421 | ||
| 1422 | /* Future-safe accessor for struct task_struct's cpus_allowed. */ | ||
| 1423 | #define tsk_cpumask(tsk) (&(tsk)->cpus_allowed) | ||
| 1424 | |||
| 1422 | /* | 1425 | /* |
| 1423 | * Priority of a process goes from 0..MAX_PRIO-1, valid RT | 1426 | * Priority of a process goes from 0..MAX_PRIO-1, valid RT |
| 1424 | * priority is 0..MAX_RT_PRIO-1, and SCHED_NORMAL/SCHED_BATCH | 1427 | * priority is 0..MAX_RT_PRIO-1, and SCHED_NORMAL/SCHED_BATCH |
