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authorJeff Garzik <jgarzik@pobox.com>2005-10-30 01:58:41 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-10-30 01:58:41 -0500
commitfce45c1c8a6b5334fa88bbb9b1496b0699d3fef0 (patch)
treecba2597077cf33d122f8d771bf84618cc5374cf6 /include/linux
parent15dbb5a3f971a28040ae6cbcd8bbdf19b629fa83 (diff)
parent81cfb8864c73230eb1c37753aba517db15cf4d8f (diff)
Merge branch 'upstream'
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/buffer_head.h6
-rw-r--r--include/linux/device.h115
-rw-r--r--include/linux/etherdevice.h16
-rw-r--r--include/linux/ethtool.h8
-rw-r--r--include/linux/fs_enet_pd.h136
-rw-r--r--include/linux/genhd.h1
-rw-r--r--include/linux/hil.h483
-rw-r--r--include/linux/hil_mlc.h168
-rw-r--r--include/linux/hp_sdc.h300
-rw-r--r--include/linux/hugetlb.h2
-rw-r--r--include/linux/i2c-algo-bit.h4
-rw-r--r--include/linux/i2c-algo-pca.h2
-rw-r--r--include/linux/i2c-algo-pcf.h4
-rw-r--r--include/linux/i2c-dev.h2
-rw-r--r--include/linux/i2c-id.h3
-rw-r--r--include/linux/i2c.h38
-rw-r--r--include/linux/i2o.h4
-rw-r--r--include/linux/ide.h2
-rw-r--r--include/linux/input.h27
-rw-r--r--include/linux/libata.h2
-rw-r--r--include/linux/memory.h94
-rw-r--r--include/linux/memory_hotplug.h104
-rw-r--r--include/linux/mempolicy.h7
-rw-r--r--include/linux/mm.h150
-rw-r--r--include/linux/mmc/mmc.h4
-rw-r--r--include/linux/mmzone.h28
-rw-r--r--include/linux/mod_devicetable.h5
-rw-r--r--include/linux/netdevice.h1
-rw-r--r--include/linux/pci.h7
-rw-r--r--include/linux/pci_ids.h568
-rw-r--r--include/linux/pm.h40
-rw-r--r--include/linux/rmap.h4
-rw-r--r--include/linux/rwsem-spinlock.h5
-rw-r--r--include/linux/scatterlist.h17
-rw-r--r--include/linux/sched.h65
-rw-r--r--include/linux/serial_core.h3
-rw-r--r--include/linux/serial_ip3106.h81
-rw-r--r--include/linux/skbuff.h7
-rw-r--r--include/linux/usb.h163
-rw-r--r--include/linux/usb_otg.h13
-rw-r--r--include/linux/usbdevice_fs.h7
-rw-r--r--include/linux/vmalloc.h8
-rw-r--r--include/linux/x1205.h31
43 files changed, 1927 insertions, 808 deletions
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index 88af42f5e04a..c937d6e65502 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -126,8 +126,8 @@ BUFFER_FNS(Eopnotsupp, eopnotsupp)
126/* If we *know* page->private refers to buffer_heads */ 126/* If we *know* page->private refers to buffer_heads */
127#define page_buffers(page) \ 127#define page_buffers(page) \
128 ({ \ 128 ({ \
129 BUG_ON(!PagePrivate(page)); \ 129 BUG_ON(!PagePrivate(page)); \
130 ((struct buffer_head *)(page)->private); \ 130 ((struct buffer_head *)page_private(page)); \
131 }) 131 })
132#define page_has_buffers(page) PagePrivate(page) 132#define page_has_buffers(page) PagePrivate(page)
133 133
@@ -219,7 +219,7 @@ static inline void attach_page_buffers(struct page *page,
219{ 219{
220 page_cache_get(page); 220 page_cache_get(page);
221 SetPagePrivate(page); 221 SetPagePrivate(page);
222 page->private = (unsigned long)head; 222 set_page_private(page, (unsigned long)head);
223} 223}
224 224
225static inline void get_bh(struct buffer_head *bh) 225static inline void get_bh(struct buffer_head *bh)
diff --git a/include/linux/device.h b/include/linux/device.h
index 95d607a48f06..a9e72ac3fb9f 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -28,19 +28,6 @@
28#define BUS_ID_SIZE KOBJ_NAME_LEN 28#define BUS_ID_SIZE KOBJ_NAME_LEN
29 29
30 30
31enum {
32 SUSPEND_NOTIFY,
33 SUSPEND_SAVE_STATE,
34 SUSPEND_DISABLE,
35 SUSPEND_POWER_DOWN,
36};
37
38enum {
39 RESUME_POWER_ON,
40 RESUME_RESTORE_STATE,
41 RESUME_ENABLE,
42};
43
44struct device; 31struct device;
45struct device_driver; 32struct device_driver;
46struct class; 33struct class;
@@ -115,8 +102,8 @@ struct device_driver {
115 int (*probe) (struct device * dev); 102 int (*probe) (struct device * dev);
116 int (*remove) (struct device * dev); 103 int (*remove) (struct device * dev);
117 void (*shutdown) (struct device * dev); 104 void (*shutdown) (struct device * dev);
118 int (*suspend) (struct device * dev, pm_message_t state, u32 level); 105 int (*suspend) (struct device * dev, pm_message_t state);
119 int (*resume) (struct device * dev, u32 level); 106 int (*resume) (struct device * dev);
120}; 107};
121 108
122 109
@@ -190,7 +177,43 @@ struct class_attribute class_attr_##_name = __ATTR(_name,_mode,_show,_store)
190extern int class_create_file(struct class *, const struct class_attribute *); 177extern int class_create_file(struct class *, const struct class_attribute *);
191extern void class_remove_file(struct class *, const struct class_attribute *); 178extern void class_remove_file(struct class *, const struct class_attribute *);
192 179
180struct class_device_attribute {
181 struct attribute attr;
182 ssize_t (*show)(struct class_device *, char * buf);
183 ssize_t (*store)(struct class_device *, const char * buf, size_t count);
184};
185
186#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \
187struct class_device_attribute class_device_attr_##_name = \
188 __ATTR(_name,_mode,_show,_store)
189
190extern int class_device_create_file(struct class_device *,
191 const struct class_device_attribute *);
193 192
193/**
194 * struct class_device - class devices
195 * @class: pointer to the parent class for this class device. This is required.
196 * @devt: for internal use by the driver core only.
197 * @node: for internal use by the driver core only.
198 * @kobj: for internal use by the driver core only.
199 * @devt_attr: for internal use by the driver core only.
200 * @dev: if set, a symlink to the struct device is created in the sysfs
201 * directory for this struct class device.
202 * @class_data: pointer to whatever you want to store here for this struct
203 * class_device. Use class_get_devdata() and class_set_devdata() to get and
204 * set this pointer.
205 * @parent: pointer to a struct class_device that is the parent of this struct
206 * class_device. If NULL, this class_device will show up at the root of the
207 * struct class in sysfs (which is probably what you want to have happen.)
208 * @release: pointer to a release function for this struct class_device. If
209 * set, this will be called instead of the class specific release function.
210 * Only use this if you want to override the default release function, like
211 * when you are nesting class_device structures.
212 * @hotplug: pointer to a hotplug function for this struct class_device. If
213 * set, this will be called instead of the class specific hotplug function.
214 * Only use this if you want to override the default hotplug function, like
215 * when you are nesting class_device structures.
216 */
194struct class_device { 217struct class_device {
195 struct list_head node; 218 struct list_head node;
196 219
@@ -198,9 +221,14 @@ struct class_device {
198 struct class * class; /* required */ 221 struct class * class; /* required */
199 dev_t devt; /* dev_t, creates the sysfs "dev" */ 222 dev_t devt; /* dev_t, creates the sysfs "dev" */
200 struct class_device_attribute *devt_attr; 223 struct class_device_attribute *devt_attr;
224 struct class_device_attribute uevent_attr;
201 struct device * dev; /* not necessary, but nice to have */ 225 struct device * dev; /* not necessary, but nice to have */
202 void * class_data; /* class-specific data */ 226 void * class_data; /* class-specific data */
227 struct class_device *parent; /* parent of this child device, if there is one */
203 228
229 void (*release)(struct class_device *dev);
230 int (*hotplug)(struct class_device *dev, char **envp,
231 int num_envp, char *buffer, int buffer_size);
204 char class_id[BUS_ID_SIZE]; /* unique to this class */ 232 char class_id[BUS_ID_SIZE]; /* unique to this class */
205}; 233};
206 234
@@ -228,18 +256,6 @@ extern int class_device_rename(struct class_device *, char *);
228extern struct class_device * class_device_get(struct class_device *); 256extern struct class_device * class_device_get(struct class_device *);
229extern void class_device_put(struct class_device *); 257extern void class_device_put(struct class_device *);
230 258
231struct class_device_attribute {
232 struct attribute attr;
233 ssize_t (*show)(struct class_device *, char * buf);
234 ssize_t (*store)(struct class_device *, const char * buf, size_t count);
235};
236
237#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \
238struct class_device_attribute class_device_attr_##_name = \
239 __ATTR(_name,_mode,_show,_store)
240
241extern int class_device_create_file(struct class_device *,
242 const struct class_device_attribute *);
243extern void class_device_remove_file(struct class_device *, 259extern void class_device_remove_file(struct class_device *,
244 const struct class_device_attribute *); 260 const struct class_device_attribute *);
245extern int class_device_create_bin_file(struct class_device *, 261extern int class_device_create_bin_file(struct class_device *,
@@ -251,8 +267,8 @@ struct class_interface {
251 struct list_head node; 267 struct list_head node;
252 struct class *class; 268 struct class *class;
253 269
254 int (*add) (struct class_device *); 270 int (*add) (struct class_device *, struct class_interface *);
255 void (*remove) (struct class_device *); 271 void (*remove) (struct class_device *, struct class_interface *);
256}; 272};
257 273
258extern int class_interface_register(struct class_interface *); 274extern int class_interface_register(struct class_interface *);
@@ -260,12 +276,29 @@ extern void class_interface_unregister(struct class_interface *);
260 276
261extern struct class *class_create(struct module *owner, char *name); 277extern struct class *class_create(struct module *owner, char *name);
262extern void class_destroy(struct class *cls); 278extern void class_destroy(struct class *cls);
263extern struct class_device *class_device_create(struct class *cls, dev_t devt, 279extern struct class_device *class_device_create(struct class *cls,
264 struct device *device, char *fmt, ...) 280 struct class_device *parent,
265 __attribute__((format(printf,4,5))); 281 dev_t devt,
282 struct device *device,
283 char *fmt, ...)
284 __attribute__((format(printf,5,6)));
266extern void class_device_destroy(struct class *cls, dev_t devt); 285extern void class_device_destroy(struct class *cls, dev_t devt);
267 286
268 287
288/* interface for exporting device attributes */
289struct device_attribute {
290 struct attribute attr;
291 ssize_t (*show)(struct device *dev, struct device_attribute *attr,
292 char *buf);
293 ssize_t (*store)(struct device *dev, struct device_attribute *attr,
294 const char *buf, size_t count);
295};
296
297#define DEVICE_ATTR(_name,_mode,_show,_store) \
298struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store)
299
300extern int device_create_file(struct device *device, struct device_attribute * entry);
301extern void device_remove_file(struct device * dev, struct device_attribute * attr);
269struct device { 302struct device {
270 struct klist klist_children; 303 struct klist klist_children;
271 struct klist_node knode_parent; /* node in sibling list */ 304 struct klist_node knode_parent; /* node in sibling list */
@@ -275,6 +308,7 @@ struct device {
275 308
276 struct kobject kobj; 309 struct kobject kobj;
277 char bus_id[BUS_ID_SIZE]; /* position on parent bus */ 310 char bus_id[BUS_ID_SIZE]; /* position on parent bus */
311 struct device_attribute uevent_attr;
278 312
279 struct semaphore sem; /* semaphore to synchronize calls to 313 struct semaphore sem; /* semaphore to synchronize calls to
280 * its driver. 314 * its driver.
@@ -343,23 +377,6 @@ extern int device_attach(struct device * dev);
343extern void driver_attach(struct device_driver * drv); 377extern void driver_attach(struct device_driver * drv);
344 378
345 379
346/* driverfs interface for exporting device attributes */
347
348struct device_attribute {
349 struct attribute attr;
350 ssize_t (*show)(struct device *dev, struct device_attribute *attr,
351 char *buf);
352 ssize_t (*store)(struct device *dev, struct device_attribute *attr,
353 const char *buf, size_t count);
354};
355
356#define DEVICE_ATTR(_name,_mode,_show,_store) \
357struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store)
358
359
360extern int device_create_file(struct device *device, struct device_attribute * entry);
361extern void device_remove_file(struct device * dev, struct device_attribute * attr);
362
363/* 380/*
364 * Platform "fixup" functions - allow the platform to have their say 381 * Platform "fixup" functions - allow the platform to have their say
365 * about devices and actions that the general device layer doesn't 382 * about devices and actions that the general device layer doesn't
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index 4522c7186bf3..cc84934f9059 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -104,6 +104,22 @@ static inline void random_ether_addr(u8 *addr)
104 addr [0] &= 0xfe; /* clear multicast bit */ 104 addr [0] &= 0xfe; /* clear multicast bit */
105 addr [0] |= 0x02; /* set local assignment bit (IEEE802) */ 105 addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
106} 106}
107
108/**
109 * compare_ether_addr - Compare two Ethernet addresses
110 * @addr1: Pointer to a six-byte array containing the Ethernet address
111 * @addr2 Pointer other six-byte array containing the Ethernet address
112 *
113 * Compare two ethernet addresses, returns 0 if equal
114 */
115static inline unsigned compare_ether_addr(const u8 *_a, const u8 *_b)
116{
117 const u16 *a = (const u16 *) _a;
118 const u16 *b = (const u16 *) _b;
119
120 BUILD_BUG_ON(ETH_ALEN != 6);
121 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
122}
107#endif /* __KERNEL__ */ 123#endif /* __KERNEL__ */
108 124
109#endif /* _LINUX_ETHERDEVICE_H */ 125#endif /* _LINUX_ETHERDEVICE_H */
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index ed1440ea4c91..d2c390eff1b2 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -269,6 +269,8 @@ u32 ethtool_op_get_tso(struct net_device *dev);
269int ethtool_op_set_tso(struct net_device *dev, u32 data); 269int ethtool_op_set_tso(struct net_device *dev, u32 data);
270int ethtool_op_get_perm_addr(struct net_device *dev, 270int ethtool_op_get_perm_addr(struct net_device *dev,
271 struct ethtool_perm_addr *addr, u8 *data); 271 struct ethtool_perm_addr *addr, u8 *data);
272u32 ethtool_op_get_ufo(struct net_device *dev);
273int ethtool_op_set_ufo(struct net_device *dev, u32 data);
272 274
273/** 275/**
274 * &ethtool_ops - Alter and report network device settings 276 * &ethtool_ops - Alter and report network device settings
@@ -298,6 +300,8 @@ int ethtool_op_get_perm_addr(struct net_device *dev,
298 * set_sg: Turn scatter-gather on or off 300 * set_sg: Turn scatter-gather on or off
299 * get_tso: Report whether TCP segmentation offload is enabled 301 * get_tso: Report whether TCP segmentation offload is enabled
300 * set_tso: Turn TCP segmentation offload on or off 302 * set_tso: Turn TCP segmentation offload on or off
303 * get_ufo: Report whether UDP fragmentation offload is enabled
304 * set_ufo: Turn UDP fragmentation offload on or off
301 * self_test: Run specified self-tests 305 * self_test: Run specified self-tests
302 * get_strings: Return a set of strings that describe the requested objects 306 * get_strings: Return a set of strings that describe the requested objects
303 * phys_id: Identify the device 307 * phys_id: Identify the device
@@ -364,6 +368,8 @@ struct ethtool_ops {
364 int (*get_perm_addr)(struct net_device *, struct ethtool_perm_addr *, u8 *); 368 int (*get_perm_addr)(struct net_device *, struct ethtool_perm_addr *, u8 *);
365 int (*begin)(struct net_device *); 369 int (*begin)(struct net_device *);
366 void (*complete)(struct net_device *); 370 void (*complete)(struct net_device *);
371 u32 (*get_ufo)(struct net_device *);
372 int (*set_ufo)(struct net_device *, u32);
367}; 373};
368 374
369/* CMDs currently supported */ 375/* CMDs currently supported */
@@ -400,6 +406,8 @@ struct ethtool_ops {
400#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */ 406#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */
401#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */ 407#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */
402#define ETHTOOL_GPERMADDR 0x00000020 /* Get permanent hardware address */ 408#define ETHTOOL_GPERMADDR 0x00000020 /* Get permanent hardware address */
409#define ETHTOOL_GUFO 0x00000021 /* Get UFO enable (ethtool_value) */
410#define ETHTOOL_SUFO 0x00000022 /* Set UFO enable (ethtool_value) */
403 411
404/* compatibility with older code */ 412/* compatibility with older code */
405#define SPARC_ETH_GSET ETHTOOL_GSET 413#define SPARC_ETH_GSET ETHTOOL_GSET
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
new file mode 100644
index 000000000000..bef23bbf8690
--- /dev/null
+++ b/include/linux/fs_enet_pd.h
@@ -0,0 +1,136 @@
1/*
2 * Platform information definitions for the
3 * universal Freescale Ethernet driver.
4 *
5 * Copyright (c) 2003 Intracom S.A.
6 * by Pantelis Antoniou <panto@intracom.gr>
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16#ifndef FS_ENET_PD_H
17#define FS_ENET_PD_H
18
19#include <linux/version.h>
20#include <asm/types.h>
21
22#define FS_ENET_NAME "fs_enet"
23
24enum fs_id {
25 fsid_fec1,
26 fsid_fec2,
27 fsid_fcc1,
28 fsid_fcc2,
29 fsid_fcc3,
30 fsid_scc1,
31 fsid_scc2,
32 fsid_scc3,
33 fsid_scc4,
34};
35
36#define FS_MAX_INDEX 9
37
38static inline int fs_get_fec_index(enum fs_id id)
39{
40 if (id >= fsid_fec1 && id <= fsid_fec2)
41 return id - fsid_fec1;
42 return -1;
43}
44
45static inline int fs_get_fcc_index(enum fs_id id)
46{
47 if (id >= fsid_fcc1 && id <= fsid_fcc3)
48 return id - fsid_fcc1;
49 return -1;
50}
51
52static inline int fs_get_scc_index(enum fs_id id)
53{
54 if (id >= fsid_scc1 && id <= fsid_scc4)
55 return id - fsid_scc1;
56 return -1;
57}
58
59enum fs_mii_method {
60 fsmii_fixed,
61 fsmii_fec,
62 fsmii_bitbang,
63};
64
65enum fs_ioport {
66 fsiop_porta,
67 fsiop_portb,
68 fsiop_portc,
69 fsiop_portd,
70 fsiop_porte,
71};
72
73struct fs_mii_bus_info {
74 int method; /* mii method */
75 int id; /* the id of the mii_bus */
76 int disable_aneg; /* if the controller needs to negothiate speed & duplex */
77 int lpa; /* the default board-specific vallues will be applied otherwise */
78
79 union {
80 struct {
81 int duplex;
82 int speed;
83 } fixed;
84
85 struct {
86 /* nothing */
87 } fec;
88
89 struct {
90 /* nothing */
91 } scc;
92
93 struct {
94 int mdio_port; /* port & bit for MDIO */
95 int mdio_bit;
96 int mdc_port; /* port & bit for MDC */
97 int mdc_bit;
98 int delay; /* delay in us */
99 } bitbang;
100 } i;
101};
102
103struct fs_platform_info {
104
105 void(*init_ioports)(void);
106 /* device specific information */
107 int fs_no; /* controller index */
108
109 u32 cp_page; /* CPM page */
110 u32 cp_block; /* CPM sblock */
111
112 u32 clk_trx; /* some stuff for pins & mux configuration*/
113 u32 clk_route;
114 u32 clk_mask;
115
116 u32 mem_offset;
117 u32 dpram_offset;
118 u32 fcc_regs_c;
119
120 u32 device_flags;
121
122 int phy_addr; /* the phy address (-1 no phy) */
123 int phy_irq; /* the phy irq (if it exists) */
124
125 const struct fs_mii_bus_info *bus_info;
126
127 int rx_ring, tx_ring; /* number of buffers on rx */
128 __u8 macaddr[6]; /* mac address */
129 int rx_copybreak; /* limit we copy small frames */
130 int use_napi; /* use NAPI */
131 int napi_weight; /* NAPI weight */
132
133 int use_rmii; /* use RMII mode */
134};
135
136#endif
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 142e1c1e0689..eabdb5cce357 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -132,6 +132,7 @@ struct gendisk {
132struct disk_attribute { 132struct disk_attribute {
133 struct attribute attr; 133 struct attribute attr;
134 ssize_t (*show)(struct gendisk *, char *); 134 ssize_t (*show)(struct gendisk *, char *);
135 ssize_t (*store)(struct gendisk *, const char *, size_t);
135}; 136};
136 137
137/* 138/*
diff --git a/include/linux/hil.h b/include/linux/hil.h
new file mode 100644
index 000000000000..13352d7d0caf
--- /dev/null
+++ b/include/linux/hil.h
@@ -0,0 +1,483 @@
1#ifndef _HIL_H_
2#define _HIL_H_
3
4/*
5 * Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header.
6 *
7 * Copyright (c) 2001 Brian S. Julin
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions, and the following disclaimer,
15 * without modification.
16 * 2. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL").
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 *
32 * References:
33 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
34 *
35 * A note of thanks to HP for providing and shipping reference materials
36 * free of charge to help in the development of HIL support for Linux.
37 *
38 */
39
40#include <asm/types.h>
41
42/* Physical constants relevant to raw loop/device timing.
43 */
44
45#define HIL_CLOCK 8MHZ
46#define HIL_EK1_CLOCK 30HZ
47#define HIL_EK2_CLOCK 60HZ
48
49#define HIL_TIMEOUT_DEV 5 /* ms */
50#define HIL_TIMEOUT_DEVS 10 /* ms */
51#define HIL_TIMEOUT_NORESP 10 /* ms */
52#define HIL_TIMEOUT_DEVS_DATA 16 /* ms */
53#define HIL_TIMEOUT_SELFTEST 200 /* ms */
54
55
56/* Actual wire line coding. These will only be useful if someone is
57 * implementing a software MLC to run HIL devices on a non-parisc machine.
58 */
59
60#define HIL_WIRE_PACKET_LEN 15
61enum hil_wire_bitpos {
62 HIL_WIRE_START = 0,
63 HIL_WIRE_ADDR2,
64 HIL_WIRE_ADDR1,
65 HIL_WIRE_ADDR0,
66 HIL_WIRE_COMMAND,
67 HIL_WIRE_DATA7,
68 HIL_WIRE_DATA6,
69 HIL_WIRE_DATA5,
70 HIL_WIRE_DATA4,
71 HIL_WIRE_DATA3,
72 HIL_WIRE_DATA2,
73 HIL_WIRE_DATA1,
74 HIL_WIRE_DATA0,
75 HIL_WIRE_PARITY,
76 HIL_WIRE_STOP
77};
78
79/* HP documentation uses these bit positions to refer to commands;
80 * we will call these "packets".
81 */
82enum hil_pkt_bitpos {
83 HIL_PKT_CMD = 0x00000800,
84 HIL_PKT_ADDR2 = 0x00000400,
85 HIL_PKT_ADDR1 = 0x00000200,
86 HIL_PKT_ADDR0 = 0x00000100,
87 HIL_PKT_ADDR_MASK = 0x00000700,
88 HIL_PKT_ADDR_SHIFT = 8,
89 HIL_PKT_DATA7 = 0x00000080,
90 HIL_PKT_DATA6 = 0x00000040,
91 HIL_PKT_DATA5 = 0x00000020,
92 HIL_PKT_DATA4 = 0x00000010,
93 HIL_PKT_DATA3 = 0x00000008,
94 HIL_PKT_DATA2 = 0x00000004,
95 HIL_PKT_DATA1 = 0x00000002,
96 HIL_PKT_DATA0 = 0x00000001,
97 HIL_PKT_DATA_MASK = 0x000000FF,
98 HIL_PKT_DATA_SHIFT = 0
99};
100
101/* The HIL MLC also has several error/status/control bits. We extend the
102 * "packet" to include these when direct access to the MLC is available,
103 * or emulate them in cases where they are not available.
104 *
105 * This way the device driver knows that the underlying MLC driver
106 * has had to deal with loop errors.
107 */
108enum hil_error_bitpos {
109 HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll,
110 or we have filled up the output
111 buffer and must wait. */
112 HIL_ERR_INT = 0x00010000, /* A normal interrupt has occurred. */
113 HIL_ERR_NMI = 0x00020000, /* An NMI has occurred. */
114 HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */
115 HIL_ERR_PERR = 0x01000000, /* There was a Parity Error. */
116 HIL_ERR_FERR = 0x02000000, /* There was a Framing Error. */
117 HIL_ERR_FOF = 0x04000000 /* Input FIFO Overflowed. */
118};
119
120enum hil_control_bitpos {
121 HIL_CTRL_TEST = 0x00010000,
122 HIL_CTRL_IPF = 0x00040000,
123 HIL_CTRL_APE = 0x02000000
124};
125
126/* Bits 30,31 are unused, we use them to control write behavior. */
127#define HIL_DO_ALTER_CTRL 0x40000000 /* Write MSW of packet to control
128 before writing LSW to loop */
129#define HIL_CTRL_ONLY 0xc0000000 /* *Only* alter the control registers */
130
131/* This gives us a 32-bit "packet"
132 */
133typedef u32 hil_packet;
134
135
136/* HIL Loop commands
137 */
138enum hil_command {
139 HIL_CMD_IFC = 0x00, /* Interface Clear */
140 HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */
141 HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */
142 HIL_CMD_IDD = 0x03, /* Identify and Describe */
143 HIL_CMD_DSR = 0x04, /* Device Soft Reset */
144 HIL_CMD_PST = 0x05, /* Perform Self Test */
145 HIL_CMD_RRG = 0x06, /* Read Register */
146 HIL_CMD_WRG = 0x07, /* Write Register */
147 HIL_CMD_ACF = 0x08, /* Auto Configure */
148 HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */
149 HIL_CMD_POL = 0x10, /* Poll */
150 HIL_CMDCT_POL = 0x0f, /* Poll command bits with item count */
151 HIL_CMD_RPL = 0x20, /* RePoll */
152 HIL_CMDCT_RPL = 0x0f, /* RePoll command bits with item count */
153 HIL_CMD_RNM = 0x30, /* Report Name */
154 HIL_CMD_RST = 0x31, /* Report Status */
155 HIL_CMD_EXD = 0x32, /* Extended Describe */
156 HIL_CMD_RSC = 0x33, /* Report Security Code */
157
158 /* 0x34 to 0x3c reserved for future use */
159
160 HIL_CMD_DKA = 0x3d, /* Disable Keyswitch Autorepeat */
161 HIL_CMD_EK1 = 0x3e, /* Enable Keyswitch Autorepeat 1 */
162 HIL_CMD_EK2 = 0x3f, /* Enable Keyswitch Autorepeat 2 */
163 HIL_CMD_PR1 = 0x40, /* Prompt1 */
164 HIL_CMD_PR2 = 0x41, /* Prompt2 */
165 HIL_CMD_PR3 = 0x42, /* Prompt3 */
166 HIL_CMD_PR4 = 0x43, /* Prompt4 */
167 HIL_CMD_PR5 = 0x44, /* Prompt5 */
168 HIL_CMD_PR6 = 0x45, /* Prompt6 */
169 HIL_CMD_PR7 = 0x46, /* Prompt7 */
170 HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */
171 HIL_CMD_AK1 = 0x48, /* Acknowlege1 */
172 HIL_CMD_AK2 = 0x49, /* Acknowlege2 */
173 HIL_CMD_AK3 = 0x4a, /* Acknowlege3 */
174 HIL_CMD_AK4 = 0x4b, /* Acknowlege4 */
175 HIL_CMD_AK5 = 0x4c, /* Acknowlege5 */
176 HIL_CMD_AK6 = 0x4d, /* Acknowlege6 */
177 HIL_CMD_AK7 = 0x4e, /* Acknowlege7 */
178 HIL_CMD_ACK = 0x4f, /* Acknowlege (General Purpose) */
179
180 /* 0x50 to 0x78 reserved for future use */
181 /* 0x80 to 0xEF device-specific commands */
182 /* 0xf0 to 0xf9 reserved for future use */
183
184 HIL_CMD_RIO = 0xfa, /* Register I/O Error */
185 HIL_CMD_SHR = 0xfb, /* System Hard Reset */
186 HIL_CMD_TER = 0xfc, /* Transmission Error */
187 HIL_CMD_CAE = 0xfd, /* Configuration Address Error */
188 HIL_CMD_DHR = 0xfe, /* Device Hard Reset */
189
190 /* 0xff is prohibited from use. */
191};
192
193
194/*
195 * Response "records" to HIL commands
196 */
197
198/* Device ID byte
199 */
200#define HIL_IDD_DID_TYPE_MASK 0xe0 /* Primary type bits */
201#define HIL_IDD_DID_TYPE_KB_INTEGRAL 0xa0 /* Integral keyboard */
202#define HIL_IDD_DID_TYPE_KB_ITF 0xc0 /* ITD keyboard */
203#define HIL_IDD_DID_TYPE_KB_RSVD 0xe0 /* Reserved keyboard type */
204#define HIL_IDD_DID_TYPE_KB_LANG_MASK 0x1f /* Keyboard locale bits */
205#define HIL_IDD_DID_KBLANG_USE_ESD 0x00 /* Use ESD Locale instead */
206#define HIL_IDD_DID_TYPE_ABS 0x80 /* Absolute Positioners */
207#define HIL_IDD_DID_ABS_RSVD1_MASK 0xf8 /* Reserved */
208#define HIL_IDD_DID_ABS_RSVD1 0x98
209#define HIL_IDD_DID_ABS_TABLET_MASK 0xf8 /* Tablets and digitizers */
210#define HIL_IDD_DID_ABS_TABLET 0x90
211#define HIL_IDD_DID_ABS_TSCREEN_MASK 0xfc /* Touch screens */
212#define HIL_IDD_DID_ABS_TSCREEN 0x8c
213#define HIL_IDD_DID_ABS_RSVD2_MASK 0xfc /* Reserved */
214#define HIL_IDD_DID_ABS_RSVD2 0x88
215#define HIL_IDD_DID_ABS_RSVD3_MASK 0xfc /* Reserved */
216#define HIL_IDD_DID_ABS_RSVD3 0x80
217#define HIL_IDD_DID_TYPE_REL 0x60 /* Relative Positioners */
218#define HIL_IDD_DID_REL_RSVD1_MASK 0xf0 /* Reserved */
219#define HIL_IDD_DID_REL_RSVD1 0x70
220#define HIL_IDD_DID_REL_RSVD2_MASK 0xfc /* Reserved */
221#define HIL_IDD_DID_REL_RSVD2 0x6c
222#define HIL_IDD_DID_REL_MOUSE_MASK 0xfc /* Mouse */
223#define HIL_IDD_DID_REL_MOUSE 0x68
224#define HIL_IDD_DID_REL_QUAD_MASK 0xf8 /* Other Quadrature Devices */
225#define HIL_IDD_DID_REL_QUAD 0x60
226#define HIL_IDD_DID_TYPE_CHAR 0x40 /* Character Entry */
227#define HIL_IDD_DID_CHAR_BARCODE_MASK 0xfc /* Barcode Reader */
228#define HIL_IDD_DID_CHAR_BARCODE 0x5c
229#define HIL_IDD_DID_CHAR_RSVD1_MASK 0xfc /* Reserved */
230#define HIL_IDD_DID_CHAR_RSVD1 0x58
231#define HIL_IDD_DID_CHAR_RSVD2_MASK 0xf8 /* Reserved */
232#define HIL_IDD_DID_CHAR_RSVD2 0x50
233#define HIL_IDD_DID_CHAR_RSVD3_MASK 0xf0 /* Reserved */
234#define HIL_IDD_DID_CHAR_RSVD3 0x40
235#define HIL_IDD_DID_TYPE_OTHER 0x20 /* Miscellaneous */
236#define HIL_IDD_DID_OTHER_RSVD1_MASK 0xf0 /* Reserved */
237#define HIL_IDD_DID_OTHER_RSVD1 0x30
238#define HIL_IDD_DID_OTHER_BARCODE_MASK 0xfc /* Tone Generator */
239#define HIL_IDD_DID_OTHER_BARCODE 0x2c
240#define HIL_IDD_DID_OTHER_RSVD2_MASK 0xfc /* Reserved */
241#define HIL_IDD_DID_OTHER_RSVD2 0x28
242#define HIL_IDD_DID_OTHER_RSVD3_MASK 0xf8 /* Reserved */
243#define HIL_IDD_DID_OTHER_RSVD3 0x20
244#define HIL_IDD_DID_TYPE_KEYPAD 0x00 /* Vectra Keyboard */
245
246/* IDD record header
247 */
248#define HIL_IDD_HEADER_AXSET_MASK 0x03 /* Number of axis in a set */
249#define HIL_IDD_HEADER_RSC 0x04 /* Supports RSC command */
250#define HIL_IDD_HEADER_EXD 0x08 /* Supports EXD command */
251#define HIL_IDD_HEADER_IOD 0x10 /* IOD byte to follow */
252#define HIL_IDD_HEADER_16BIT 0x20 /* 16 (vs. 8) bit resolution */
253#define HIL_IDD_HEADER_ABS 0x40 /* Reports Absolute Position */
254#define HIL_IDD_HEADER_2X_AXIS 0x80 /* Two sets of 1-3 axis */
255
256/* I/O Descriptor
257 */
258#define HIL_IDD_IOD_NBUTTON_MASK 0x07 /* Number of buttons */
259#define HIL_IDD_IOD_PROXIMITY 0x08 /* Proximity in/out events */
260#define HIL_IDD_IOD_PROMPT_MASK 0x70 /* Number of prompts/acks */
261#define HIL_IDD_IOD_PROMPT_SHIFT 4
262#define HIL_IDD_IOD_PROMPT 0x80 /* Generic prompt/ack */
263
264#define HIL_IDD_NUM_AXES_PER_SET(header_packet) \
265((header_packet) & HIL_IDD_HEADER_AXSET_MASK)
266
267#define HIL_IDD_NUM_AXSETS(header_packet) \
268(2 - !((header_packet) & HIL_IDD_HEADER_2X_AXIS))
269
270#define HIL_IDD_LEN(header_packet) \
271((4 - !(header_packet & HIL_IDD_HEADER_IOD) - \
272 2 * !(HIL_IDD_NUM_AXES_PER_SET(header_packet))) + \
273 2 * HIL_IDD_NUM_AXES_PER_SET(header_packet) * \
274 !!((header_packet) & HIL_IDD_HEADER_ABS))
275
276/* The following HIL_IDD_* macros assume you have an array of
277 * packets and/or unpacked 8-bit data in the order that they
278 * were received.
279 */
280
281#define HIL_IDD_AXIS_COUNTS_PER_M(header_ptr) \
282(!(HIL_IDD_NUM_AXSETS(*(header_ptr))) ? -1 : \
283(((*(header_ptr + 1) & HIL_PKT_DATA_MASK) + \
284 ((*(header_ptr + 2) & HIL_PKT_DATA_MASK)) << 8) \
285* ((*(header_ptr) & HIL_IDD_HEADER_16BIT) ? 100 : 1)))
286
287#define HIL_IDD_AXIS_MAX(header_ptr, __axnum) \
288((!(*(header_ptr) & HIL_IDD_HEADER_ABS) || \
289 (HIL_IDD_NUM_AXES_PER_SET(*(header_ptr)) <= __axnum)) ? 0 : \
290 ((HIL_PKT_DATA_MASK & *((header_ptr) + 3 + 2 * __axnum)) + \
291 ((HIL_PKT_DATA_MASK & *((header_ptr) + 4 + 2 * __axnum)) << 8)))
292
293#define HIL_IDD_IOD(header_ptr) \
294(*(header_ptr + HIL_IDD_LEN((*header_ptr)) - 1))
295
296#define HIL_IDD_HAS_GEN_PROMPT(header_ptr) \
297((*header_ptr & HIL_IDD_HEADER_IOD) && \
298 (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROMPT))
299
300#define HIL_IDD_HAS_GEN_PROXIMITY(header_ptr) \
301((*header_ptr & HIL_IDD_HEADER_IOD) && \
302 (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROXIMITY))
303
304#define HIL_IDD_NUM_BUTTONS(header_ptr) \
305((*header_ptr & HIL_IDD_HEADER_IOD) ? \
306 (HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NBUTTON_MASK) : 0)
307
308#define HIL_IDD_NUM_PROMPTS(header_ptr) \
309((*header_ptr & HIL_IDD_HEADER_IOD) ? \
310 ((HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NPROMPT_MASK) \
311 >> HIL_IDD_IOD_PROMPT_SHIFT) : 0)
312
313/* The response to HIL EXD commands -- the "extended describe record" */
314#define HIL_EXD_HEADER_WRG 0x03 /* Supports type2 WRG */
315#define HIL_EXD_HEADER_WRG_TYPE1 0x01 /* Supports type1 WRG */
316#define HIL_EXD_HEADER_WRG_TYPE2 0x02 /* Supports type2 WRG */
317#define HIL_EXD_HEADER_RRG 0x04 /* Supports RRG command */
318#define HIL_EXD_HEADER_RNM 0x10 /* Supports RNM command */
319#define HIL_EXD_HEADER_RST 0x20 /* Supports RST command */
320#define HIL_EXD_HEADER_LOCALE 0x40 /* Contains locale code */
321
322#define HIL_EXD_NUM_RRG(header_ptr) \
323((*header_ptr & HIL_EXD_HEADER_RRG) ? \
324 (*(header_ptr + 1) & HIL_PKT_DATA_MASK) : 0)
325
326#define HIL_EXD_NUM_WWG(header_ptr) \
327((*header_ptr & HIL_EXD_HEADER_WRG) ? \
328 (*(header_ptr + 2 - !(*header_ptr & HIL_EXD_HEADER_RRG)) & \
329 HIL_PKT_DATA_MASK) : 0)
330
331#define HIL_EXD_LEN(header_ptr) \
332(!!(*header_ptr & HIL_EXD_HEADER_RRG) + \
333 !!(*header_ptr & HIL_EXD_HEADER_WRG) + \
334 !!(*header_ptr & HIL_EXD_HEADER_LOCALE) + \
335 2 * !!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) + 1)
336
337#define HIL_EXD_LOCALE(header_ptr) \
338(!(*header_ptr & HIL_EXD_HEADER_LOCALE) ? -1 : \
339 (*(header_ptr + HIL_EXD_LEN(header_ptr) - 1) & HIL_PKT_DATA_MASK))
340
341#define HIL_EXD_WRG_TYPE2_LEN(header_ptr) \
342(!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) ? -1 : \
343 (*(header_ptr + HIL_EXD_LEN(header_ptr) - 2 - \
344 !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) + \
345 ((*(header_ptr + HIL_EXD_LEN(header_ptr) - 1 - \
346 !!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) << 8))
347
348/* Device locale codes. */
349
350/* Last defined locale code. Everything above this is "Reserved",
351 and note that this same table applies to the Device ID Byte where
352 keyboards may have a nationality code which is only 5 bits. */
353#define HIL_LOCALE_MAX 0x1f
354
355/* Map to hopefully useful strings. I was trying to make these look
356 like locale.aliases strings do; maybe that isn't the right table to
357 emulate. In either case, I didn't have much to work on. */
358#define HIL_LOCALE_MAP \
359"", /* 0x00 Reserved */ \
360"", /* 0x01 Reserved */ \
361"", /* 0x02 Reserved */ \
362"swiss.french", /* 0x03 Swiss/French */ \
363"portuguese", /* 0x04 Portuguese */ \
364"arabic", /* 0x05 Arabic */ \
365"hebrew", /* 0x06 Hebrew */ \
366"english.canadian", /* 0x07 Canadian English */ \
367"turkish", /* 0x08 Turkish */ \
368"greek", /* 0x09 Greek */ \
369"thai", /* 0x0a Thai (Thailand) */ \
370"italian", /* 0x0b Italian */ \
371"korean", /* 0x0c Hangul (Korea) */ \
372"dutch", /* 0x0d Dutch */ \
373"swedish", /* 0x0e Swedish */ \
374"german", /* 0x0f German */ \
375"chinese", /* 0x10 Chinese-PRC */ \
376"chinese", /* 0x11 Chinese-ROC */ \
377"swiss.french", /* 0x12 Swiss/French II */ \
378"spanish", /* 0x13 Spanish */ \
379"swiss.german", /* 0x14 Swiss/German II */ \
380"flemish", /* 0x15 Belgian (Flemish) */ \
381"finnish", /* 0x16 Finnish */ \
382"english.uk", /* 0x17 United Kingdom */ \
383"french.canadian", /* 0x18 French/Canadian */ \
384"swiss.german", /* 0x19 Swiss/German */ \
385"norwegian", /* 0x1a Norwegian */ \
386"french", /* 0x1b French */ \
387"danish", /* 0x1c Danish */ \
388"japanese", /* 0x1d Katakana */ \
389"spanish", /* 0x1e Latin American/Spanish*/\
390"english.us" /* 0x1f United States */ \
391
392
393/* HIL keycodes */
394#define HIL_KEYCODES_SET1_TBLSIZE 128
395#define HIL_KEYCODES_SET1 \
396 KEY_5, KEY_RESERVED, KEY_RIGHTALT, KEY_LEFTALT, \
397 KEY_RIGHTSHIFT, KEY_LEFTSHIFT, KEY_LEFTCTRL, KEY_SYSRQ, \
398 KEY_KP4, KEY_KP8, KEY_KP5, KEY_KP9, \
399 KEY_KP6, KEY_KP7, KEY_KPCOMMA, KEY_KPENTER, \
400 KEY_KP1, KEY_KPSLASH, KEY_KP2, KEY_KPPLUS, \
401 KEY_KP3, KEY_KPASTERISK, KEY_KP0, KEY_KPMINUS, \
402 KEY_B, KEY_V, KEY_C, KEY_X, \
403 KEY_Z, KEY_RESERVED, KEY_RESERVED, KEY_ESC, \
404 KEY_6, KEY_F10, KEY_3, KEY_F11, \
405 KEY_KPDOT, KEY_F9, KEY_TAB /*KP*/, KEY_F12, \
406 KEY_H, KEY_G, KEY_F, KEY_D, \
407 KEY_S, KEY_A, KEY_RESERVED, KEY_CAPSLOCK, \
408 KEY_U, KEY_Y, KEY_T, KEY_R, \
409 KEY_E, KEY_W, KEY_Q, KEY_TAB, \
410 KEY_7, KEY_6, KEY_5, KEY_4, \
411 KEY_3, KEY_2, KEY_1, KEY_GRAVE, \
412 KEY_F13, KEY_F14, KEY_F15, KEY_F16, \
413 KEY_F17, KEY_F18, KEY_F19, KEY_F20, \
414 KEY_MENU, KEY_F4, KEY_F3, KEY_F2, \
415 KEY_F1, KEY_VOLUMEUP, KEY_STOP, KEY_SENDFILE, \
416 KEY_SYSRQ, KEY_F5, KEY_F6, KEY_F7, \
417 KEY_F8, KEY_VOLUMEDOWN, KEY_DEL_EOL, KEY_DEL_EOS, \
418 KEY_8, KEY_9, KEY_0, KEY_MINUS, \
419 KEY_EQUAL, KEY_BACKSPACE, KEY_INS_LINE, KEY_DEL_LINE, \
420 KEY_I, KEY_O, KEY_P, KEY_LEFTBRACE, \
421 KEY_RIGHTBRACE, KEY_BACKSLASH, KEY_INSERT, KEY_DELETE, \
422 KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \
423 KEY_APOSTROPHE, KEY_ENTER, KEY_HOME, KEY_PAGEUP, \
424 KEY_M, KEY_COMMA, KEY_DOT, KEY_SLASH, \
425 KEY_BACKSLASH, KEY_SELECT, KEY_102ND, KEY_PAGEDOWN, \
426 KEY_N, KEY_SPACE, KEY_NEXT, KEY_RESERVED, \
427 KEY_LEFT, KEY_DOWN, KEY_UP, KEY_RIGHT
428
429
430#define HIL_KEYCODES_SET3_TBLSIZE 128
431#define HIL_KEYCODES_SET3 \
432 KEY_RESERVED, KEY_ESC, KEY_1, KEY_2, \
433 KEY_3, KEY_4, KEY_5, KEY_6, \
434 KEY_7, KEY_8, KEY_9, KEY_0, \
435 KEY_MINUS, KEY_EQUAL, KEY_BACKSPACE, KEY_TAB, \
436 KEY_Q, KEY_W, KEY_E, KEY_R, \
437 KEY_T, KEY_Y, KEY_U, KEY_I, \
438 KEY_O, KEY_P, KEY_LEFTBRACE, KEY_RIGHTBRACE, \
439 KEY_ENTER, KEY_LEFTCTRL, KEY_A, KEY_S, \
440 KEY_D, KEY_F, KEY_G, KEY_H, \
441 KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \
442 KEY_APOSTROPHE,KEY_GRAVE, KEY_LEFTSHIFT, KEY_BACKSLASH, \
443 KEY_Z, KEY_X, KEY_C, KEY_V, \
444 KEY_B, KEY_N, KEY_M, KEY_COMMA, \
445 KEY_DOT, KEY_SLASH, KEY_RIGHTSHIFT, KEY_KPASTERISK, \
446 KEY_LEFTALT, KEY_SPACE, KEY_CAPSLOCK, KEY_F1, \
447 KEY_F2, KEY_F3, KEY_F4, KEY_F5, \
448 KEY_F6, KEY_F7, KEY_F8, KEY_F9, \
449 KEY_F10, KEY_NUMLOCK, KEY_SCROLLLOCK, KEY_KP7, \
450 KEY_KP8, KEY_KP9, KEY_KPMINUS, KEY_KP4, \
451 KEY_KP5, KEY_KP6, KEY_KPPLUS, KEY_KP1, \
452 KEY_KP2, KEY_KP3, KEY_KP0, KEY_KPDOT, \
453 KEY_SYSRQ, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
454 KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
455 KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
456 KEY_UP, KEY_LEFT, KEY_DOWN, KEY_RIGHT, \
457 KEY_HOME, KEY_PAGEUP, KEY_END, KEY_PAGEDOWN, \
458 KEY_INSERT, KEY_DELETE, KEY_102ND, KEY_RESERVED, \
459 KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
460 KEY_F1, KEY_F2, KEY_F3, KEY_F4, \
461 KEY_F5, KEY_F6, KEY_F7, KEY_F8, \
462 KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
463 KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED
464
465
466/* Response to POL command, the "poll record header" */
467
468#define HIL_POL_NUM_AXES_MASK 0x03 /* Number of axis reported */
469#define HIL_POL_CTS 0x04 /* Device ready to receive data */
470#define HIL_POL_STATUS_PENDING 0x08 /* Device has status to report */
471#define HIL_POL_CHARTYPE_MASK 0x70 /* Type of character data to follow */
472#define HIL_POL_CHARTYPE_NONE 0x00 /* No character data to follow */
473#define HIL_POL_CHARTYPE_RSVD1 0x10 /* Reserved Set 1 */
474#define HIL_POL_CHARTYPE_ASCII 0x20 /* U.S. ASCII */
475#define HIL_POL_CHARTYPE_BINARY 0x30 /* Binary data */
476#define HIL_POL_CHARTYPE_SET1 0x40 /* Keycode Set 1 */
477#define HIL_POL_CHARTYPE_RSVD2 0x50 /* Reserved Set 2 */
478#define HIL_POL_CHARTYPE_SET2 0x60 /* Keycode Set 2 */
479#define HIL_POL_CHARTYPE_SET3 0x70 /* Keycode Set 3 */
480#define HIL_POL_AXIS_ALT 0x80 /* Data is from axis set 2 */
481
482
483#endif /* _HIL_H_ */
diff --git a/include/linux/hil_mlc.h b/include/linux/hil_mlc.h
new file mode 100644
index 000000000000..8df29ca48a13
--- /dev/null
+++ b/include/linux/hil_mlc.h
@@ -0,0 +1,168 @@
1/*
2 * HP Human Interface Loop Master Link Controller driver.
3 *
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 *
29 * References:
30 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
31 *
32 */
33
34#include <linux/hil.h>
35#include <linux/time.h>
36#include <linux/interrupt.h>
37#include <asm/semaphore.h>
38#include <linux/serio.h>
39#include <linux/list.h>
40
41typedef struct hil_mlc hil_mlc;
42
43/* The HIL has a complicated state engine.
44 * We define the structure of nodes in the state engine here.
45 */
46enum hilse_act {
47 /* HILSE_OUT prepares to receive input if the next node
48 * is an IN or EXPECT, and then sends the given packet.
49 */
50 HILSE_OUT = 0,
51
52 /* HILSE_CTS checks if the loop is busy. */
53 HILSE_CTS,
54
55 /* HILSE_OUT_LAST sends the given command packet to
56 * the last configured/running device on the loop.
57 */
58 HILSE_OUT_LAST,
59
60 /* HILSE_OUT_DISC sends the given command packet to
61 * the next device past the last configured/running one.
62 */
63 HILSE_OUT_DISC,
64
65 /* HILSE_FUNC runs a callback function with given arguments.
66 * a positive return value causes the "ugly" branch to be taken.
67 */
68 HILSE_FUNC,
69
70 /* HILSE_IN simply expects any non-errored packet to arrive
71 * within arg usecs.
72 */
73 HILSE_IN = 0x100,
74
75 /* HILSE_EXPECT expects a particular packet to arrive
76 * within arg usecs, any other packet is considered an error.
77 */
78 HILSE_EXPECT,
79
80 /* HILSE_EXPECT_LAST as above but dev field should be last
81 * discovered/operational device.
82 */
83 HILSE_EXPECT_LAST,
84
85 /* HILSE_EXPECT_LAST as above but dev field should be first
86 * undiscovered/inoperational device.
87 */
88 HILSE_EXPECT_DISC
89};
90
91typedef int (hilse_func) (hil_mlc *mlc, int arg);
92struct hilse_node {
93 enum hilse_act act; /* How to process this node */
94 union {
95 hilse_func *func; /* Function to call if HILSE_FUNC */
96 hil_packet packet; /* Packet to send or to compare */
97 } object;
98 int arg; /* Timeout in usec or parm for func */
99 int good; /* Node to jump to on success */
100 int bad; /* Node to jump to on error */
101 int ugly; /* Node to jump to on timeout */
102};
103
104/* Methods for back-end drivers, e.g. hp_sdc_mlc */
105typedef int (hil_mlc_cts) (hil_mlc *mlc);
106typedef void (hil_mlc_out) (hil_mlc *mlc);
107typedef int (hil_mlc_in) (hil_mlc *mlc, suseconds_t timeout);
108
109struct hil_mlc_devinfo {
110 uint8_t idd[16]; /* Device ID Byte and Describe Record */
111 uint8_t rsc[16]; /* Security Code Header and Record */
112 uint8_t exd[16]; /* Extended Describe Record */
113 uint8_t rnm[16]; /* Device name as returned by RNM command */
114};
115
116struct hil_mlc_serio_map {
117 hil_mlc *mlc;
118 int di_revmap;
119 int didx;
120};
121
122/* How many (possibly old/detached) devices the we try to keep track of */
123#define HIL_MLC_DEVMEM 16
124
125struct hil_mlc {
126 struct list_head list; /* hil_mlc is organized as linked list */
127
128 rwlock_t lock;
129
130 void *priv; /* Data specific to a particular type of MLC */
131
132 int seidx; /* Current node in state engine */
133 int istarted, ostarted;
134
135 hil_mlc_cts *cts;
136 struct semaphore csem; /* Raised when loop idle */
137
138 hil_mlc_out *out;
139 struct semaphore osem; /* Raised when outpacket dispatched */
140 hil_packet opacket;
141
142 hil_mlc_in *in;
143 struct semaphore isem; /* Raised when a packet arrives */
144 hil_packet ipacket[16];
145 hil_packet imatch;
146 int icount;
147 struct timeval instart;
148 suseconds_t intimeout;
149
150 int ddi; /* Last operational device id */
151 int lcv; /* LCV to throttle loops */
152 struct timeval lcv_tv; /* Time loop was started */
153
154 int di_map[7]; /* Maps below items to live devs */
155 struct hil_mlc_devinfo di[HIL_MLC_DEVMEM];
156 struct serio *serio[HIL_MLC_DEVMEM];
157 struct hil_mlc_serio_map serio_map[HIL_MLC_DEVMEM];
158 hil_packet serio_opacket[HIL_MLC_DEVMEM];
159 int serio_oidx[HIL_MLC_DEVMEM];
160 struct hil_mlc_devinfo di_scratch; /* Temporary area */
161
162 int opercnt;
163
164 struct tasklet_struct *tasklet;
165};
166
167int hil_mlc_register(hil_mlc *mlc);
168int hil_mlc_unregister(hil_mlc *mlc);
diff --git a/include/linux/hp_sdc.h b/include/linux/hp_sdc.h
new file mode 100644
index 000000000000..debd71515312
--- /dev/null
+++ b/include/linux/hp_sdc.h
@@ -0,0 +1,300 @@
1/*
2 * HP i8042 System Device Controller -- header
3 *
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 *
29 * References:
30 *
31 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
32 *
33 * System Device Controller Microprocessor Firmware Theory of Operation
34 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
35 *
36 */
37
38#ifndef _LINUX_HP_SDC_H
39#define _LINUX_HP_SDC_H
40
41#include <linux/interrupt.h>
42#include <linux/types.h>
43#include <linux/time.h>
44#include <linux/timer.h>
45#if defined(__hppa__)
46#include <asm/hardware.h>
47#endif
48
49
50/* No 4X status reads take longer than this (in usec).
51 */
52#define HP_SDC_MAX_REG_DELAY 20000
53
54typedef void (hp_sdc_irqhook) (int irq, void *dev_id,
55 uint8_t status, uint8_t data);
56
57int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback);
58int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback);
59int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback);
60int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback);
61int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback);
62int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback);
63
64typedef struct {
65 int actidx; /* Start of act. Acts are atomic WRT I/O to SDC */
66 int idx; /* Index within the act */
67 int endidx; /* transaction is over and done if idx == endidx */
68 uint8_t *seq; /* commands/data for the transaction */
69 union {
70 hp_sdc_irqhook *irqhook; /* Callback, isr or tasklet context */
71 struct semaphore *semaphore; /* Semaphore to sleep on. */
72 } act;
73} hp_sdc_transaction;
74int hp_sdc_enqueue_transaction(hp_sdc_transaction *this);
75int hp_sdc_dequeue_transaction(hp_sdc_transaction *this);
76
77/* The HP_SDC_ACT* values are peculiar to this driver.
78 * Nuance: never HP_SDC_ACT_DATAIN | HP_SDC_ACT_DEALLOC, use another
79 * act to perform the dealloc.
80 */
81#define HP_SDC_ACT_PRECMD 0x01 /* Send a command first */
82#define HP_SDC_ACT_DATAREG 0x02 /* Set data registers */
83#define HP_SDC_ACT_DATAOUT 0x04 /* Send data bytes */
84#define HP_SDC_ACT_POSTCMD 0x08 /* Send command after */
85#define HP_SDC_ACT_DATAIN 0x10 /* Collect data after */
86#define HP_SDC_ACT_DURING 0x1f
87#define HP_SDC_ACT_SEMAPHORE 0x20 /* Raise semaphore after */
88#define HP_SDC_ACT_CALLBACK 0x40 /* Pass data to IRQ handler */
89#define HP_SDC_ACT_DEALLOC 0x80 /* Destroy transaction after */
90#define HP_SDC_ACT_AFTER 0xe0
91#define HP_SDC_ACT_DEAD 0x60 /* Act timed out. */
92
93/* Rest of the flags are straightforward representation of the SDC interface */
94#define HP_SDC_STATUS_IBF 0x02 /* Input buffer full */
95
96#define HP_SDC_STATUS_IRQMASK 0xf0 /* Bits containing "level 1" irq */
97#define HP_SDC_STATUS_PERIODIC 0x10 /* Periodic 10ms timer */
98#define HP_SDC_STATUS_USERTIMER 0x20 /* "Special purpose" timer */
99#define HP_SDC_STATUS_TIMER 0x30 /* Both PERIODIC and USERTIMER */
100#define HP_SDC_STATUS_REG 0x40 /* Data from an i8042 register */
101#define HP_SDC_STATUS_HILCMD 0x50 /* Command from HIL MLC */
102#define HP_SDC_STATUS_HILDATA 0x60 /* Data from HIL MLC */
103#define HP_SDC_STATUS_PUP 0x70 /* Sucessful power-up self test */
104#define HP_SDC_STATUS_KCOOKED 0x80 /* Key from cooked kbd */
105#define HP_SDC_STATUS_KRPG 0xc0 /* Key from Repeat Gen */
106#define HP_SDC_STATUS_KMOD_SUP 0x10 /* Shift key is up */
107#define HP_SDC_STATUS_KMOD_CUP 0x20 /* Control key is up */
108
109#define HP_SDC_NMISTATUS_FHS 0x40 /* NMI is a fast handshake irq */
110
111/* Internal i8042 registers (there are more, but they are not too useful). */
112
113#define HP_SDC_USE 0x02 /* Resource usage (including OB bit) */
114#define HP_SDC_IM 0x04 /* Interrupt mask */
115#define HP_SDC_CFG 0x11 /* Configuration register */
116#define HP_SDC_KBLANGUAGE 0x12 /* Keyboard language */
117
118#define HP_SDC_D0 0x70 /* General purpose data buffer 0 */
119#define HP_SDC_D1 0x71 /* General purpose data buffer 1 */
120#define HP_SDC_D2 0x72 /* General purpose data buffer 2 */
121#define HP_SDC_D3 0x73 /* General purpose data buffer 3 */
122#define HP_SDC_VT1 0x74 /* Timer for voice 1 */
123#define HP_SDC_VT2 0x75 /* Timer for voice 2 */
124#define HP_SDC_VT3 0x76 /* Timer for voice 3 */
125#define HP_SDC_VT4 0x77 /* Timer for voice 4 */
126#define HP_SDC_KBN 0x78 /* Which HIL devs are Nimitz */
127#define HP_SDC_KBC 0x79 /* Which HIL devs are cooked kbds */
128#define HP_SDC_LPS 0x7a /* i8042's view of HIL status */
129#define HP_SDC_LPC 0x7b /* i8042's view of HIL "control" */
130#define HP_SDC_RSV 0x7c /* Reserved "for testing" */
131#define HP_SDC_LPR 0x7d /* i8042 count of HIL reconfigs */
132#define HP_SDC_XTD 0x7e /* "Extended Configuration" register */
133#define HP_SDC_STR 0x7f /* i8042 self-test result */
134
135/* Bitfields for above registers */
136#define HP_SDC_USE_LOOP 0x04 /* Command is currently on the loop. */
137
138#define HP_SDC_IM_MASK 0x1f /* these bits not part of cmd/status */
139#define HP_SDC_IM_FH 0x10 /* Mask the fast handshake irq */
140#define HP_SDC_IM_PT 0x08 /* Mask the periodic timer irq */
141#define HP_SDC_IM_TIMERS 0x04 /* Mask the MT/DT/CT irq */
142#define HP_SDC_IM_RESET 0x02 /* Mask the reset key irq */
143#define HP_SDC_IM_HIL 0x01 /* Mask the HIL MLC irq */
144
145#define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */
146#define HP_SDC_CFG_KBD 0x10 /* There is a keyboard */
147#define HP_SDC_CFG_NEW 0x20 /* Supports/uses HIL MLC */
148#define HP_SDC_CFG_KBD_OLD 0x03 /* keyboard code for non-HIL */
149#define HP_SDC_CFG_KBD_NEW 0x07 /* keyboard code from HIL autoconfig */
150#define HP_SDC_CFG_REV 0x40 /* Code revision bit */
151#define HP_SDC_CFG_IDPROM 0x80 /* IDPROM present in kbd (not HIL) */
152
153#define HP_SDC_LPS_NDEV 0x07 /* # devices autoconfigured on HIL */
154#define HP_SDC_LPS_ACSUCC 0x08 /* loop autoconfigured successfully */
155#define HP_SDC_LPS_ACFAIL 0x80 /* last loop autoconfigure failed */
156
157#define HP_SDC_LPC_APE_IPF 0x01 /* HIL MLC APE/IPF (autopoll) set */
158#define HP_SDC_LPC_ARCONERR 0x02 /* i8042 autoreconfigs loop on err */
159#define HP_SDC_LPC_ARCQUIET 0x03 /* i8042 doesn't report autoreconfigs*/
160#define HP_SDC_LPC_COOK 0x10 /* i8042 cooks devices in _KBN */
161#define HP_SDC_LPC_RC 0x80 /* causes autoreconfig */
162
163#define HP_SDC_XTD_REV 0x07 /* contains revision code */
164#define HP_SDC_XTD_REV_STRINGS(val, str) \
165switch (val) { \
166 case 0x1: str = "1820-3712"; break; \
167 case 0x2: str = "1820-4379"; break; \
168 case 0x3: str = "1820-4784"; break; \
169 default: str = "unknown"; \
170};
171#define HP_SDC_XTD_BEEPER 0x08 /* TI SN76494 beeper available */
172#define HP_SDC_XTD_BBRTC 0x20 /* OKI MSM-58321 BBRTC present */
173
174#define HP_SDC_CMD_LOAD_RT 0x31 /* Load real time (from 8042) */
175#define HP_SDC_CMD_LOAD_FHS 0x36 /* Load the fast handshake timer */
176#define HP_SDC_CMD_LOAD_MT 0x38 /* Load the match timer */
177#define HP_SDC_CMD_LOAD_DT 0x3B /* Load the delay timer */
178#define HP_SDC_CMD_LOAD_CT 0x3E /* Load the cycle timer */
179
180#define HP_SDC_CMD_SET_IM 0x40 /* 010xxxxx == set irq mask */
181
182/* The documents provided do not explicitly state that all registers betweem
183 * 0x01 and 0x1f inclusive can be read by sending their register index as a
184 * command, but this is implied and appears to be the case.
185 */
186#define HP_SDC_CMD_READ_RAM 0x00 /* Load from i8042 RAM (autoinc) */
187#define HP_SDC_CMD_READ_USE 0x02 /* Undocumented! Load from usage reg */
188#define HP_SDC_CMD_READ_IM 0x04 /* Load current interrupt mask */
189#define HP_SDC_CMD_READ_KCC 0x11 /* Load primary kbd config code */
190#define HP_SDC_CMD_READ_KLC 0x12 /* Load primary kbd language code */
191#define HP_SDC_CMD_READ_T1 0x13 /* Load timer output buffer byte 1 */
192#define HP_SDC_CMD_READ_T2 0x14 /* Load timer output buffer byte 1 */
193#define HP_SDC_CMD_READ_T3 0x15 /* Load timer output buffer byte 1 */
194#define HP_SDC_CMD_READ_T4 0x16 /* Load timer output buffer byte 1 */
195#define HP_SDC_CMD_READ_T5 0x17 /* Load timer output buffer byte 1 */
196#define HP_SDC_CMD_READ_D0 0xf0 /* Load from i8042 RAM location 0x70 */
197#define HP_SDC_CMD_READ_D1 0xf1 /* Load from i8042 RAM location 0x71 */
198#define HP_SDC_CMD_READ_D2 0xf2 /* Load from i8042 RAM location 0x72 */
199#define HP_SDC_CMD_READ_D3 0xf3 /* Load from i8042 RAM location 0x73 */
200#define HP_SDC_CMD_READ_VT1 0xf4 /* Load from i8042 RAM location 0x74 */
201#define HP_SDC_CMD_READ_VT2 0xf5 /* Load from i8042 RAM location 0x75 */
202#define HP_SDC_CMD_READ_VT3 0xf6 /* Load from i8042 RAM location 0x76 */
203#define HP_SDC_CMD_READ_VT4 0xf7 /* Load from i8042 RAM location 0x77 */
204#define HP_SDC_CMD_READ_KBN 0xf8 /* Load from i8042 RAM location 0x78 */
205#define HP_SDC_CMD_READ_KBC 0xf9 /* Load from i8042 RAM location 0x79 */
206#define HP_SDC_CMD_READ_LPS 0xfa /* Load from i8042 RAM location 0x7a */
207#define HP_SDC_CMD_READ_LPC 0xfb /* Load from i8042 RAM location 0x7b */
208#define HP_SDC_CMD_READ_RSV 0xfc /* Load from i8042 RAM location 0x7c */
209#define HP_SDC_CMD_READ_LPR 0xfd /* Load from i8042 RAM location 0x7d */
210#define HP_SDC_CMD_READ_XTD 0xfe /* Load from i8042 RAM location 0x7e */
211#define HP_SDC_CMD_READ_STR 0xff /* Load from i8042 RAM location 0x7f */
212
213#define HP_SDC_CMD_SET_ARD 0xA0 /* Set emulated autorepeat delay */
214#define HP_SDC_CMD_SET_ARR 0xA2 /* Set emulated autorepeat rate */
215#define HP_SDC_CMD_SET_BELL 0xA3 /* Set voice 3 params for "beep" cmd */
216#define HP_SDC_CMD_SET_RPGR 0xA6 /* Set "RPG" irq rate (doesn't work) */
217#define HP_SDC_CMD_SET_RTMS 0xAD /* Set the RTC time (milliseconds) */
218#define HP_SDC_CMD_SET_RTD 0xAF /* Set the RTC time (days) */
219#define HP_SDC_CMD_SET_FHS 0xB2 /* Set fast handshake timer */
220#define HP_SDC_CMD_SET_MT 0xB4 /* Set match timer */
221#define HP_SDC_CMD_SET_DT 0xB7 /* Set delay timer */
222#define HP_SDC_CMD_SET_CT 0xBA /* Set cycle timer */
223#define HP_SDC_CMD_SET_RAMP 0xC1 /* Reset READ_RAM autoinc counter */
224#define HP_SDC_CMD_SET_D0 0xe0 /* Load to i8042 RAM location 0x70 */
225#define HP_SDC_CMD_SET_D1 0xe1 /* Load to i8042 RAM location 0x71 */
226#define HP_SDC_CMD_SET_D2 0xe2 /* Load to i8042 RAM location 0x72 */
227#define HP_SDC_CMD_SET_D3 0xe3 /* Load to i8042 RAM location 0x73 */
228#define HP_SDC_CMD_SET_VT1 0xe4 /* Load to i8042 RAM location 0x74 */
229#define HP_SDC_CMD_SET_VT2 0xe5 /* Load to i8042 RAM location 0x75 */
230#define HP_SDC_CMD_SET_VT3 0xe6 /* Load to i8042 RAM location 0x76 */
231#define HP_SDC_CMD_SET_VT4 0xe7 /* Load to i8042 RAM location 0x77 */
232#define HP_SDC_CMD_SET_KBN 0xe8 /* Load to i8042 RAM location 0x78 */
233#define HP_SDC_CMD_SET_KBC 0xe9 /* Load to i8042 RAM location 0x79 */
234#define HP_SDC_CMD_SET_LPS 0xea /* Load to i8042 RAM location 0x7a */
235#define HP_SDC_CMD_SET_LPC 0xeb /* Load to i8042 RAM location 0x7b */
236#define HP_SDC_CMD_SET_RSV 0xec /* Load to i8042 RAM location 0x7c */
237#define HP_SDC_CMD_SET_LPR 0xed /* Load to i8042 RAM location 0x7d */
238#define HP_SDC_CMD_SET_XTD 0xee /* Load to i8042 RAM location 0x7e */
239#define HP_SDC_CMD_SET_STR 0xef /* Load to i8042 RAM location 0x7f */
240
241#define HP_SDC_CMD_DO_RTCW 0xc2 /* i8042 RAM 0x70 --> RTC */
242#define HP_SDC_CMD_DO_RTCR 0xc3 /* RTC[0x70 0:3] --> irq/status/data */
243#define HP_SDC_CMD_DO_BEEP 0xc4 /* i8042 RAM 0x70-74 --> beeper,VT3 */
244#define HP_SDC_CMD_DO_HIL 0xc5 /* i8042 RAM 0x70-73 -->
245 HIL MLC R0,R1 i8042 HIL watchdog */
246
247/* Values used to (de)mangle input/output to/from the HIL MLC */
248#define HP_SDC_DATA 0x40 /* Data from an 8042 register */
249#define HP_SDC_HIL_CMD 0x50 /* Data from HIL MLC R1/8042 */
250#define HP_SDC_HIL_R1MASK 0x0f /* Contents of HIL MLC R1 0:3 */
251#define HP_SDC_HIL_AUTO 0x10 /* Set if POL results from i8042 */
252#define HP_SDC_HIL_ISERR 0x80 /* Has meaning as in next 4 values */
253#define HP_SDC_HIL_RC_DONE 0x80 /* i8042 auto-configured loop */
254#define HP_SDC_HIL_ERR 0x81 /* HIL MLC R2 had a bit set */
255#define HP_SDC_HIL_TO 0x82 /* i8042 HIL watchdog expired */
256#define HP_SDC_HIL_RC 0x84 /* i8042 is auto-configuring loop */
257#define HP_SDC_HIL_DAT 0x60 /* Data from HIL MLC R0 */
258
259
260typedef struct {
261 rwlock_t ibf_lock;
262 rwlock_t lock; /* user/tasklet lock */
263 rwlock_t rtq_lock; /* isr/tasklet lock */
264 rwlock_t hook_lock; /* isr/user lock for handler add/del */
265
266 unsigned int irq, nmi; /* Our IRQ lines */
267 unsigned long base_io, status_io, data_io; /* Our IO ports */
268
269 uint8_t im; /* Interrupt mask */
270 int set_im; /* Interrupt mask needs to be set. */
271
272 int ibf; /* Last known status of IBF flag */
273 uint8_t wi; /* current i8042 write index */
274 uint8_t r7[4]; /* current i8042[0x70 - 0x74] values */
275 uint8_t r11, r7e; /* Values from version/revision regs */
276
277 hp_sdc_irqhook *timer, *reg, *hil, *pup, *cooked;
278
279#define HP_SDC_QUEUE_LEN 16
280 hp_sdc_transaction *tq[HP_SDC_QUEUE_LEN]; /* All pending read/writes */
281
282 int rcurr, rqty; /* Current read transact in process */
283 struct timeval rtv; /* Time when current read started */
284 int wcurr; /* Current write transact in process */
285
286 int dev_err; /* carries status from registration */
287#if defined(__hppa__)
288 struct parisc_device *dev;
289#elif defined(__mc68000__)
290 void *dev;
291#else
292#error No support for device registration on this arch yet.
293#endif
294
295 struct timer_list kicker; /* Keeps below task alive */
296 struct tasklet_struct task;
297
298} hp_i8042_sdc;
299
300#endif /* _LINUX_HP_SDC_H */
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index d664330d900e..0cea162b08c0 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -16,7 +16,6 @@ static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)
16int hugetlb_sysctl_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *); 16int hugetlb_sysctl_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *);
17int copy_hugetlb_page_range(struct mm_struct *, struct mm_struct *, struct vm_area_struct *); 17int copy_hugetlb_page_range(struct mm_struct *, struct mm_struct *, struct vm_area_struct *);
18int follow_hugetlb_page(struct mm_struct *, struct vm_area_struct *, struct page **, struct vm_area_struct **, unsigned long *, int *, int); 18int follow_hugetlb_page(struct mm_struct *, struct vm_area_struct *, struct page **, struct vm_area_struct **, unsigned long *, int *, int);
19void zap_hugepage_range(struct vm_area_struct *, unsigned long, unsigned long);
20void unmap_hugepage_range(struct vm_area_struct *, unsigned long, unsigned long); 19void unmap_hugepage_range(struct vm_area_struct *, unsigned long, unsigned long);
21int hugetlb_prefault(struct address_space *, struct vm_area_struct *); 20int hugetlb_prefault(struct address_space *, struct vm_area_struct *);
22int hugetlb_report_meminfo(char *); 21int hugetlb_report_meminfo(char *);
@@ -87,7 +86,6 @@ static inline unsigned long hugetlb_total_pages(void)
87#define follow_huge_addr(mm, addr, write) ERR_PTR(-EINVAL) 86#define follow_huge_addr(mm, addr, write) ERR_PTR(-EINVAL)
88#define copy_hugetlb_page_range(src, dst, vma) ({ BUG(); 0; }) 87#define copy_hugetlb_page_range(src, dst, vma) ({ BUG(); 0; })
89#define hugetlb_prefault(mapping, vma) ({ BUG(); 0; }) 88#define hugetlb_prefault(mapping, vma) ({ BUG(); 0; })
90#define zap_hugepage_range(vma, start, len) BUG()
91#define unmap_hugepage_range(vma, start, end) BUG() 89#define unmap_hugepage_range(vma, start, end) BUG()
92#define is_hugepage_mem_enough(size) 0 90#define is_hugepage_mem_enough(size) 0
93#define hugetlb_report_meminfo(buf) 0 91#define hugetlb_report_meminfo(buf) 0
diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h
index 110904481238..c0e7fab28ce3 100644
--- a/include/linux/i2c-algo-bit.h
+++ b/include/linux/i2c-algo-bit.h
@@ -21,8 +21,6 @@
21/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even 21/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
22 Frodo Looijaard <frodol@dds.nl> */ 22 Frodo Looijaard <frodol@dds.nl> */
23 23
24/* $Id: i2c-algo-bit.h,v 1.10 2003/01/21 08:08:16 kmalkki Exp $ */
25
26#ifndef _LINUX_I2C_ALGO_BIT_H 24#ifndef _LINUX_I2C_ALGO_BIT_H
27#define _LINUX_I2C_ALGO_BIT_H 25#define _LINUX_I2C_ALGO_BIT_H
28 26
@@ -46,8 +44,6 @@ struct i2c_algo_bit_data {
46 int timeout; /* in jiffies */ 44 int timeout; /* in jiffies */
47}; 45};
48 46
49#define I2C_BIT_ADAP_MAX 16
50
51int i2c_bit_add_bus(struct i2c_adapter *); 47int i2c_bit_add_bus(struct i2c_adapter *);
52int i2c_bit_del_bus(struct i2c_adapter *); 48int i2c_bit_del_bus(struct i2c_adapter *);
53 49
diff --git a/include/linux/i2c-algo-pca.h b/include/linux/i2c-algo-pca.h
index 941b786c5732..226693e0d88b 100644
--- a/include/linux/i2c-algo-pca.h
+++ b/include/linux/i2c-algo-pca.h
@@ -9,8 +9,6 @@ struct i2c_algo_pca_data {
9 int (*wait_for_interrupt) (struct i2c_algo_pca_data *adap); 9 int (*wait_for_interrupt) (struct i2c_algo_pca_data *adap);
10}; 10};
11 11
12#define I2C_PCA_ADAP_MAX 16
13
14int i2c_pca_add_bus(struct i2c_adapter *); 12int i2c_pca_add_bus(struct i2c_adapter *);
15int i2c_pca_del_bus(struct i2c_adapter *); 13int i2c_pca_del_bus(struct i2c_adapter *);
16 14
diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h
index 2a508562255f..18b0adf57a3d 100644
--- a/include/linux/i2c-algo-pcf.h
+++ b/include/linux/i2c-algo-pcf.h
@@ -22,8 +22,6 @@
22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even 22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
23 Frodo Looijaard <frodol@dds.nl> */ 23 Frodo Looijaard <frodol@dds.nl> */
24 24
25/* $Id: i2c-algo-pcf.h,v 1.8 2003/01/21 08:08:16 kmalkki Exp $ */
26
27#ifndef _LINUX_I2C_ALGO_PCF_H 25#ifndef _LINUX_I2C_ALGO_PCF_H
28#define _LINUX_I2C_ALGO_PCF_H 26#define _LINUX_I2C_ALGO_PCF_H
29 27
@@ -41,8 +39,6 @@ struct i2c_algo_pcf_data {
41 int timeout; 39 int timeout;
42}; 40};
43 41
44#define I2C_PCF_ADAP_MAX 16
45
46int i2c_pcf_add_bus(struct i2c_adapter *); 42int i2c_pcf_add_bus(struct i2c_adapter *);
47int i2c_pcf_del_bus(struct i2c_adapter *); 43int i2c_pcf_del_bus(struct i2c_adapter *);
48 44
diff --git a/include/linux/i2c-dev.h b/include/linux/i2c-dev.h
index 541695679762..81c229a0fbca 100644
--- a/include/linux/i2c-dev.h
+++ b/include/linux/i2c-dev.h
@@ -19,8 +19,6 @@
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/ 20*/
21 21
22/* $Id: i2c-dev.h,v 1.13 2003/01/21 08:08:16 kmalkki Exp $ */
23
24#ifndef _LINUX_I2C_DEV_H 22#ifndef _LINUX_I2C_DEV_H
25#define _LINUX_I2C_DEV_H 23#define _LINUX_I2C_DEV_H
26 24
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 44f30876a1c9..1ce4b54caa21 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -164,10 +164,7 @@
164 164
165/* --- Bit algorithm adapters */ 165/* --- Bit algorithm adapters */
166#define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */ 166#define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */
167#define I2C_HW_B_LPC 0x010001 /* Parallel port control reg. */
168#define I2C_HW_B_SER 0x010002 /* Serial line interface */ 167#define I2C_HW_B_SER 0x010002 /* Serial line interface */
169#define I2C_HW_B_ELV 0x010003 /* ELV Card */
170#define I2C_HW_B_VELLE 0x010004 /* Vellemann K8000 */
171#define I2C_HW_B_BT848 0x010005 /* BT848 video boards */ 168#define I2C_HW_B_BT848 0x010005 /* BT848 video boards */
172#define I2C_HW_B_WNV 0x010006 /* Winnov Videums */ 169#define I2C_HW_B_WNV 0x010006 /* Winnov Videums */
173#define I2C_HW_B_VIA 0x010007 /* Via vt82c586b */ 170#define I2C_HW_B_VIA 0x010007 /* Via vt82c586b */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 3d49a305bf88..f88577ca3b3a 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -23,14 +23,13 @@
23/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and 23/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
24 Frodo Looijaard <frodol@dds.nl> */ 24 Frodo Looijaard <frodol@dds.nl> */
25 25
26/* $Id: i2c.h,v 1.68 2003/01/21 08:08:16 kmalkki Exp $ */
27
28#ifndef _LINUX_I2C_H 26#ifndef _LINUX_I2C_H
29#define _LINUX_I2C_H 27#define _LINUX_I2C_H
30 28
31#include <linux/module.h> 29#include <linux/module.h>
32#include <linux/types.h> 30#include <linux/types.h>
33#include <linux/i2c-id.h> 31#include <linux/i2c-id.h>
32#include <linux/mod_devicetable.h>
34#include <linux/device.h> /* for struct device */ 33#include <linux/device.h> /* for struct device */
35#include <asm/semaphore.h> 34#include <asm/semaphore.h>
36 35
@@ -94,10 +93,10 @@ extern s32 i2c_smbus_write_byte_data(struct i2c_client * client,
94extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command); 93extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command);
95extern s32 i2c_smbus_write_word_data(struct i2c_client * client, 94extern s32 i2c_smbus_write_word_data(struct i2c_client * client,
96 u8 command, u16 value); 95 u8 command, u16 value);
97/* Returns the number of bytes transferred */
98extern s32 i2c_smbus_write_block_data(struct i2c_client * client, 96extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
99 u8 command, u8 length, 97 u8 command, u8 length,
100 u8 *values); 98 u8 *values);
99/* Returns the number of read bytes */
101extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client, 100extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
102 u8 command, u8 *values); 101 u8 command, u8 *values);
103 102
@@ -391,10 +390,6 @@ struct i2c_msg {
391#define I2C_FUNC_10BIT_ADDR 0x00000002 390#define I2C_FUNC_10BIT_ADDR 0x00000002
392#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ 391#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */
393#define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */ 392#define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */
394#define I2C_FUNC_SMBUS_READ_WORD_DATA_PEC 0x00000800 /* SMBus 2.0 */
395#define I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC 0x00001000 /* SMBus 2.0 */
396#define I2C_FUNC_SMBUS_PROC_CALL_PEC 0x00002000 /* SMBus 2.0 */
397#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL_PEC 0x00004000 /* SMBus 2.0 */
398#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ 393#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
399#define I2C_FUNC_SMBUS_QUICK 0x00010000 394#define I2C_FUNC_SMBUS_QUICK 0x00010000
400#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 395#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
@@ -410,8 +405,6 @@ struct i2c_msg {
410#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ 405#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
411#define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */ 406#define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */
412#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */ 407#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */
413#define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */
414#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */
415 408
416#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ 409#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
417 I2C_FUNC_SMBUS_WRITE_BYTE) 410 I2C_FUNC_SMBUS_WRITE_BYTE)
@@ -425,17 +418,6 @@ struct i2c_msg {
425 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) 418 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
426#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \ 419#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \
427 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2) 420 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2)
428#define I2C_FUNC_SMBUS_BLOCK_DATA_PEC (I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC | \
429 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC)
430#define I2C_FUNC_SMBUS_WORD_DATA_PEC (I2C_FUNC_SMBUS_READ_WORD_DATA_PEC | \
431 I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC)
432
433#define I2C_FUNC_SMBUS_READ_BYTE_PEC I2C_FUNC_SMBUS_READ_BYTE_DATA
434#define I2C_FUNC_SMBUS_WRITE_BYTE_PEC I2C_FUNC_SMBUS_WRITE_BYTE_DATA
435#define I2C_FUNC_SMBUS_READ_BYTE_DATA_PEC I2C_FUNC_SMBUS_READ_WORD_DATA
436#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA_PEC I2C_FUNC_SMBUS_WRITE_WORD_DATA
437#define I2C_FUNC_SMBUS_BYTE_PEC I2C_FUNC_SMBUS_BYTE_DATA
438#define I2C_FUNC_SMBUS_BYTE_DATA_PEC I2C_FUNC_SMBUS_WORD_DATA
439 421
440#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ 422#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
441 I2C_FUNC_SMBUS_BYTE | \ 423 I2C_FUNC_SMBUS_BYTE | \
@@ -443,20 +425,17 @@ struct i2c_msg {
443 I2C_FUNC_SMBUS_WORD_DATA | \ 425 I2C_FUNC_SMBUS_WORD_DATA | \
444 I2C_FUNC_SMBUS_PROC_CALL | \ 426 I2C_FUNC_SMBUS_PROC_CALL | \
445 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ 427 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
446 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \
447 I2C_FUNC_SMBUS_I2C_BLOCK) 428 I2C_FUNC_SMBUS_I2C_BLOCK)
448 429
449/* 430/*
450 * Data for SMBus Messages 431 * Data for SMBus Messages
451 */ 432 */
452#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ 433#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
453#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */
454union i2c_smbus_data { 434union i2c_smbus_data {
455 __u8 byte; 435 __u8 byte;
456 __u16 word; 436 __u16 word;
457 __u8 block[I2C_SMBUS_BLOCK_MAX + 3]; /* block[0] is used for length */ 437 __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
458 /* one more for read length in block process call */ 438 /* and one more for user-space compatibility */
459 /* and one more for PEC */
460}; 439};
461 440
462/* smbus_access read or write markers */ 441/* smbus_access read or write markers */
@@ -473,10 +452,6 @@ union i2c_smbus_data {
473#define I2C_SMBUS_BLOCK_DATA 5 452#define I2C_SMBUS_BLOCK_DATA 5
474#define I2C_SMBUS_I2C_BLOCK_DATA 6 453#define I2C_SMBUS_I2C_BLOCK_DATA 6
475#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ 454#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
476#define I2C_SMBUS_BLOCK_DATA_PEC 8 /* SMBus 2.0 */
477#define I2C_SMBUS_PROC_CALL_PEC 9 /* SMBus 2.0 */
478#define I2C_SMBUS_BLOCK_PROC_CALL_PEC 10 /* SMBus 2.0 */
479#define I2C_SMBUS_WORD_DATA_PEC 11 /* SMBus 2.0 */
480 455
481 456
482/* ----- commands for the ioctl like i2c_command call: 457/* ----- commands for the ioctl like i2c_command call:
@@ -506,11 +481,6 @@ union i2c_smbus_data {
506 481
507#define I2C_SMBUS 0x0720 /* SMBus-level access */ 482#define I2C_SMBUS 0x0720 /* SMBus-level access */
508 483
509/* ... algo-bit.c recognizes */
510#define I2C_UDELAY 0x0705 /* set delay in microsecs between each */
511 /* written byte (except address) */
512#define I2C_MDELAY 0x0706 /* millisec delay between written bytes */
513
514/* ----- I2C-DEV: char device interface stuff ------------------------- */ 484/* ----- I2C-DEV: char device interface stuff ------------------------- */
515 485
516#define I2C_MAJOR 89 /* Device major number */ 486#define I2C_MAJOR 89 /* Device major number */
diff --git a/include/linux/i2o.h b/include/linux/i2o.h
index b4af45aad25d..92300325dbcd 100644
--- a/include/linux/i2o.h
+++ b/include/linux/i2o.h
@@ -66,8 +66,6 @@ struct i2o_device {
66 struct device device; 66 struct device device;
67 67
68 struct semaphore lock; /* device lock */ 68 struct semaphore lock; /* device lock */
69
70 struct class_device classdev; /* i2o device class */
71}; 69};
72 70
73/* 71/*
@@ -194,7 +192,7 @@ struct i2o_controller {
194 struct resource mem_resource; /* Mem resource allocated to the IOP */ 192 struct resource mem_resource; /* Mem resource allocated to the IOP */
195 193
196 struct device device; 194 struct device device;
197 struct class_device classdev; /* I2O controller class */ 195 struct class_device *classdev; /* I2O controller class device */
198 struct i2o_device *exec; /* Executive */ 196 struct i2o_device *exec; /* Executive */
199#if BITS_PER_LONG == 64 197#if BITS_PER_LONG == 64
200 spinlock_t context_list_lock; /* lock for context_list */ 198 spinlock_t context_list_lock; /* lock for context_list */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index a6dbb51ecd7b..3461abc1e854 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -218,7 +218,7 @@ typedef enum { ide_unknown, ide_generic, ide_pci,
218 ide_rz1000, ide_trm290, 218 ide_rz1000, ide_trm290,
219 ide_cmd646, ide_cy82c693, ide_4drives, 219 ide_cmd646, ide_cy82c693, ide_4drives,
220 ide_pmac, ide_etrax100, ide_acorn, 220 ide_pmac, ide_etrax100, ide_acorn,
221 ide_forced 221 ide_au1xxx, ide_forced
222} hwif_chipset_t; 222} hwif_chipset_t;
223 223
224/* 224/*
diff --git a/include/linux/input.h b/include/linux/input.h
index e8c296ff6257..f623c745c21c 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -12,6 +12,7 @@
12#ifdef __KERNEL__ 12#ifdef __KERNEL__
13#include <linux/time.h> 13#include <linux/time.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/device.h>
15#else 16#else
16#include <sys/time.h> 17#include <sys/time.h>
17#include <sys/ioctl.h> 18#include <sys/ioctl.h>
@@ -644,6 +645,7 @@ struct input_absinfo {
644#define BUS_ADB 0x17 645#define BUS_ADB 0x17
645#define BUS_I2C 0x18 646#define BUS_I2C 0x18
646#define BUS_HOST 0x19 647#define BUS_HOST 0x19
648#define BUS_GSC 0x1A
647 649
648/* 650/*
649 * Values describing the status of an effect 651 * Values describing the status of an effect
@@ -889,11 +891,15 @@ struct input_dev {
889 struct semaphore sem; /* serializes open and close operations */ 891 struct semaphore sem; /* serializes open and close operations */
890 unsigned int users; 892 unsigned int users;
891 893
892 struct device *dev; 894 struct class_device cdev;
895 struct device *dev; /* will be removed soon */
896
897 int dynalloc; /* temporarily */
893 898
894 struct list_head h_list; 899 struct list_head h_list;
895 struct list_head node; 900 struct list_head node;
896}; 901};
902#define to_input_dev(d) container_of(d, struct input_dev, cdev)
897 903
898/* 904/*
899 * Structure for hotplug & device<->driver matching. 905 * Structure for hotplug & device<->driver matching.
@@ -984,6 +990,23 @@ static inline void init_input_dev(struct input_dev *dev)
984 INIT_LIST_HEAD(&dev->node); 990 INIT_LIST_HEAD(&dev->node);
985} 991}
986 992
993struct input_dev *input_allocate_device(void);
994
995static inline void input_free_device(struct input_dev *dev)
996{
997 kfree(dev);
998}
999
1000static inline struct input_dev *input_get_device(struct input_dev *dev)
1001{
1002 return to_input_dev(class_device_get(&dev->cdev));
1003}
1004
1005static inline void input_put_device(struct input_dev *dev)
1006{
1007 class_device_put(&dev->cdev);
1008}
1009
987void input_register_device(struct input_dev *); 1010void input_register_device(struct input_dev *);
988void input_unregister_device(struct input_dev *); 1011void input_unregister_device(struct input_dev *);
989 1012
@@ -1052,7 +1075,7 @@ static inline void input_set_abs_params(struct input_dev *dev, int axis, int min
1052 dev->absbit[LONG(axis)] |= BIT(axis); 1075 dev->absbit[LONG(axis)] |= BIT(axis);
1053} 1076}
1054 1077
1055extern struct class *input_class; 1078extern struct class input_class;
1056 1079
1057#endif 1080#endif
1058#endif 1081#endif
diff --git a/include/linux/libata.h b/include/linux/libata.h
index d1b21668be6e..ed6aacc236dd 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -350,7 +350,6 @@ struct ata_port_operations {
350 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); 350 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
351 u8 (*check_status)(struct ata_port *ap); 351 u8 (*check_status)(struct ata_port *ap);
352 u8 (*check_altstatus)(struct ata_port *ap); 352 u8 (*check_altstatus)(struct ata_port *ap);
353 u8 (*check_err)(struct ata_port *ap);
354 void (*dev_select)(struct ata_port *ap, unsigned int device); 353 void (*dev_select)(struct ata_port *ap, unsigned int device);
355 354
356 void (*phy_reset) (struct ata_port *ap); 355 void (*phy_reset) (struct ata_port *ap);
@@ -437,7 +436,6 @@ extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
437extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); 436extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
438extern u8 ata_check_status(struct ata_port *ap); 437extern u8 ata_check_status(struct ata_port *ap);
439extern u8 ata_altstatus(struct ata_port *ap); 438extern u8 ata_altstatus(struct ata_port *ap);
440extern u8 ata_chk_err(struct ata_port *ap);
441extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); 439extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
442extern int ata_port_start (struct ata_port *ap); 440extern int ata_port_start (struct ata_port *ap);
443extern void ata_port_stop (struct ata_port *ap); 441extern void ata_port_stop (struct ata_port *ap);
diff --git a/include/linux/memory.h b/include/linux/memory.h
new file mode 100644
index 000000000000..0def328ab5cf
--- /dev/null
+++ b/include/linux/memory.h
@@ -0,0 +1,94 @@
1/*
2 * include/linux/memory.h - generic memory definition
3 *
4 * This is mainly for topological representation. We define the
5 * basic "struct memory_block" here, which can be embedded in per-arch
6 * definitions or NUMA information.
7 *
8 * Basic handling of the devices is done in drivers/base/memory.c
9 * and system devices are handled in drivers/base/sys.c.
10 *
11 * Memory block are exported via sysfs in the class/memory/devices/
12 * directory.
13 *
14 */
15#ifndef _LINUX_MEMORY_H_
16#define _LINUX_MEMORY_H_
17
18#include <linux/sysdev.h>
19#include <linux/node.h>
20#include <linux/compiler.h>
21
22#include <asm/semaphore.h>
23
24struct memory_block {
25 unsigned long phys_index;
26 unsigned long state;
27 /*
28 * This serializes all state change requests. It isn't
29 * held during creation because the control files are
30 * created long after the critical areas during
31 * initialization.
32 */
33 struct semaphore state_sem;
34 int phys_device; /* to which fru does this belong? */
35 void *hw; /* optional pointer to fw/hw data */
36 int (*phys_callback)(struct memory_block *);
37 struct sys_device sysdev;
38};
39
40/* These states are exposed to userspace as text strings in sysfs */
41#define MEM_ONLINE (1<<0) /* exposed to userspace */
42#define MEM_GOING_OFFLINE (1<<1) /* exposed to userspace */
43#define MEM_OFFLINE (1<<2) /* exposed to userspace */
44
45/*
46 * All of these states are currently kernel-internal for notifying
47 * kernel components and architectures.
48 *
49 * For MEM_MAPPING_INVALID, all notifier chains with priority >0
50 * are called before pfn_to_page() becomes invalid. The priority=0
51 * entry is reserved for the function that actually makes
52 * pfn_to_page() stop working. Any notifiers that want to be called
53 * after that should have priority <0.
54 */
55#define MEM_MAPPING_INVALID (1<<3)
56
57#ifndef CONFIG_MEMORY_HOTPLUG
58static inline int memory_dev_init(void)
59{
60 return 0;
61}
62static inline int register_memory_notifier(struct notifier_block *nb)
63{
64 return 0;
65}
66static inline void unregister_memory_notifier(struct notifier_block *nb)
67{
68}
69#else
70extern int register_memory(struct memory_block *, struct mem_section *section, struct node *);
71extern int register_new_memory(struct mem_section *);
72extern int unregister_memory_section(struct mem_section *);
73extern int memory_dev_init(void);
74extern int register_memory_notifier(struct notifier_block *nb);
75extern void unregister_memory_notifier(struct notifier_block *nb);
76
77#define CONFIG_MEM_BLOCK_SIZE (PAGES_PER_SECTION<<PAGE_SHIFT)
78
79extern int invalidate_phys_mapping(unsigned long, unsigned long);
80struct notifier_block;
81
82extern int register_memory_notifier(struct notifier_block *nb);
83extern void unregister_memory_notifier(struct notifier_block *nb);
84
85extern struct sysdev_class memory_sysdev_class;
86#endif /* CONFIG_MEMORY_HOTPLUG */
87
88#define hotplug_memory_notifier(fn, pri) { \
89 static struct notifier_block fn##_mem_nb = \
90 { .notifier_call = fn, .priority = pri }; \
91 register_memory_notifier(&fn##_mem_nb); \
92}
93
94#endif /* _LINUX_MEMORY_H_ */
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
new file mode 100644
index 000000000000..01f03bc06eff
--- /dev/null
+++ b/include/linux/memory_hotplug.h
@@ -0,0 +1,104 @@
1#ifndef __LINUX_MEMORY_HOTPLUG_H
2#define __LINUX_MEMORY_HOTPLUG_H
3
4#include <linux/mmzone.h>
5#include <linux/spinlock.h>
6#include <linux/mmzone.h>
7#include <linux/notifier.h>
8
9#ifdef CONFIG_MEMORY_HOTPLUG
10/*
11 * pgdat resizing functions
12 */
13static inline
14void pgdat_resize_lock(struct pglist_data *pgdat, unsigned long *flags)
15{
16 spin_lock_irqsave(&pgdat->node_size_lock, *flags);
17}
18static inline
19void pgdat_resize_unlock(struct pglist_data *pgdat, unsigned long *flags)
20{
21 spin_unlock_irqrestore(&pgdat->node_size_lock, *flags);
22}
23static inline
24void pgdat_resize_init(struct pglist_data *pgdat)
25{
26 spin_lock_init(&pgdat->node_size_lock);
27}
28/*
29 * Zone resizing functions
30 */
31static inline unsigned zone_span_seqbegin(struct zone *zone)
32{
33 return read_seqbegin(&zone->span_seqlock);
34}
35static inline int zone_span_seqretry(struct zone *zone, unsigned iv)
36{
37 return read_seqretry(&zone->span_seqlock, iv);
38}
39static inline void zone_span_writelock(struct zone *zone)
40{
41 write_seqlock(&zone->span_seqlock);
42}
43static inline void zone_span_writeunlock(struct zone *zone)
44{
45 write_sequnlock(&zone->span_seqlock);
46}
47static inline void zone_seqlock_init(struct zone *zone)
48{
49 seqlock_init(&zone->span_seqlock);
50}
51extern int zone_grow_free_lists(struct zone *zone, unsigned long new_nr_pages);
52extern int zone_grow_waitqueues(struct zone *zone, unsigned long nr_pages);
53extern int add_one_highpage(struct page *page, int pfn, int bad_ppro);
54/* need some defines for these for archs that don't support it */
55extern void online_page(struct page *page);
56/* VM interface that may be used by firmware interface */
57extern int add_memory(u64 start, u64 size);
58extern int remove_memory(u64 start, u64 size);
59extern int online_pages(unsigned long, unsigned long);
60
61/* reasonably generic interface to expand the physical pages in a zone */
62extern int __add_pages(struct zone *zone, unsigned long start_pfn,
63 unsigned long nr_pages);
64#else /* ! CONFIG_MEMORY_HOTPLUG */
65/*
66 * Stub functions for when hotplug is off
67 */
68static inline void pgdat_resize_lock(struct pglist_data *p, unsigned long *f) {}
69static inline void pgdat_resize_unlock(struct pglist_data *p, unsigned long *f) {}
70static inline void pgdat_resize_init(struct pglist_data *pgdat) {}
71
72static inline unsigned zone_span_seqbegin(struct zone *zone)
73{
74 return 0;
75}
76static inline int zone_span_seqretry(struct zone *zone, unsigned iv)
77{
78 return 0;
79}
80static inline void zone_span_writelock(struct zone *zone) {}
81static inline void zone_span_writeunlock(struct zone *zone) {}
82static inline void zone_seqlock_init(struct zone *zone) {}
83
84static inline int mhp_notimplemented(const char *func)
85{
86 printk(KERN_WARNING "%s() called, with CONFIG_MEMORY_HOTPLUG disabled\n", func);
87 dump_stack();
88 return -ENOSYS;
89}
90
91static inline int __add_pages(struct zone *zone, unsigned long start_pfn,
92 unsigned long nr_pages)
93{
94 return mhp_notimplemented(__FUNCTION__);
95}
96#endif /* ! CONFIG_MEMORY_HOTPLUG */
97static inline int __remove_pages(struct zone *zone, unsigned long start_pfn,
98 unsigned long nr_pages)
99{
100 printk(KERN_WARNING "%s() called, not yet supported\n", __FUNCTION__);
101 dump_stack();
102 return -ENOSYS;
103}
104#endif /* __LINUX_MEMORY_HOTPLUG_H */
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 58385ee1c0ac..7af8cb836e78 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -27,10 +27,10 @@
27 27
28#include <linux/config.h> 28#include <linux/config.h>
29#include <linux/mmzone.h> 29#include <linux/mmzone.h>
30#include <linux/bitmap.h>
31#include <linux/slab.h> 30#include <linux/slab.h>
32#include <linux/rbtree.h> 31#include <linux/rbtree.h>
33#include <linux/spinlock.h> 32#include <linux/spinlock.h>
33#include <linux/nodemask.h>
34 34
35struct vm_area_struct; 35struct vm_area_struct;
36 36
@@ -47,8 +47,7 @@ struct vm_area_struct;
47 * Locking policy for interlave: 47 * Locking policy for interlave:
48 * In process context there is no locking because only the process accesses 48 * In process context there is no locking because only the process accesses
49 * its own state. All vma manipulation is somewhat protected by a down_read on 49 * its own state. All vma manipulation is somewhat protected by a down_read on
50 * mmap_sem. For allocating in the interleave policy the page_table_lock 50 * mmap_sem.
51 * must be also aquired to protect il_next.
52 * 51 *
53 * Freeing policy: 52 * Freeing policy:
54 * When policy is MPOL_BIND v.zonelist is kmalloc'ed and must be kfree'd. 53 * When policy is MPOL_BIND v.zonelist is kmalloc'ed and must be kfree'd.
@@ -63,7 +62,7 @@ struct mempolicy {
63 union { 62 union {
64 struct zonelist *zonelist; /* bind */ 63 struct zonelist *zonelist; /* bind */
65 short preferred_node; /* preferred */ 64 short preferred_node; /* preferred */
66 DECLARE_BITMAP(nodes, MAX_NUMNODES); /* interleave */ 65 nodemask_t nodes; /* interleave */
67 /* undefined for default */ 66 /* undefined for default */
68 } v; 67 } v;
69}; 68};
diff --git a/include/linux/mm.h b/include/linux/mm.h
index e1649578fb0c..5c1fb0a2e806 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -157,7 +157,7 @@ extern unsigned int kobjsize(const void *objp);
157 157
158#define VM_DONTCOPY 0x00020000 /* Do not copy this vma on fork */ 158#define VM_DONTCOPY 0x00020000 /* Do not copy this vma on fork */
159#define VM_DONTEXPAND 0x00040000 /* Cannot expand with mremap() */ 159#define VM_DONTEXPAND 0x00040000 /* Cannot expand with mremap() */
160#define VM_RESERVED 0x00080000 /* Don't unmap it from swap_out */ 160#define VM_RESERVED 0x00080000 /* Pages managed in a special way */
161#define VM_ACCOUNT 0x00100000 /* Is a VM accounted object */ 161#define VM_ACCOUNT 0x00100000 /* Is a VM accounted object */
162#define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */ 162#define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */
163#define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */ 163#define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */
@@ -226,13 +226,18 @@ struct page {
226 * to show when page is mapped 226 * to show when page is mapped
227 * & limit reverse map searches. 227 * & limit reverse map searches.
228 */ 228 */
229 unsigned long private; /* Mapping-private opaque data: 229 union {
230 unsigned long private; /* Mapping-private opaque data:
230 * usually used for buffer_heads 231 * usually used for buffer_heads
231 * if PagePrivate set; used for 232 * if PagePrivate set; used for
232 * swp_entry_t if PageSwapCache 233 * swp_entry_t if PageSwapCache
233 * When page is free, this indicates 234 * When page is free, this indicates
234 * order in the buddy system. 235 * order in the buddy system.
235 */ 236 */
237#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
238 spinlock_t ptl;
239#endif
240 } u;
236 struct address_space *mapping; /* If low bit clear, points to 241 struct address_space *mapping; /* If low bit clear, points to
237 * inode address_space, or NULL. 242 * inode address_space, or NULL.
238 * If page mapped as anonymous 243 * If page mapped as anonymous
@@ -260,6 +265,9 @@ struct page {
260#endif /* WANT_PAGE_VIRTUAL */ 265#endif /* WANT_PAGE_VIRTUAL */
261}; 266};
262 267
268#define page_private(page) ((page)->u.private)
269#define set_page_private(page, v) ((page)->u.private = (v))
270
263/* 271/*
264 * FIXME: take this include out, include page-flags.h in 272 * FIXME: take this include out, include page-flags.h in
265 * files which need it (119 of them) 273 * files which need it (119 of them)
@@ -311,17 +319,17 @@ extern void FASTCALL(__page_cache_release(struct page *));
311 319
312#ifdef CONFIG_HUGETLB_PAGE 320#ifdef CONFIG_HUGETLB_PAGE
313 321
314static inline int page_count(struct page *p) 322static inline int page_count(struct page *page)
315{ 323{
316 if (PageCompound(p)) 324 if (PageCompound(page))
317 p = (struct page *)p->private; 325 page = (struct page *)page_private(page);
318 return atomic_read(&(p)->_count) + 1; 326 return atomic_read(&page->_count) + 1;
319} 327}
320 328
321static inline void get_page(struct page *page) 329static inline void get_page(struct page *page)
322{ 330{
323 if (unlikely(PageCompound(page))) 331 if (unlikely(PageCompound(page)))
324 page = (struct page *)page->private; 332 page = (struct page *)page_private(page);
325 atomic_inc(&page->_count); 333 atomic_inc(&page->_count);
326} 334}
327 335
@@ -338,7 +346,7 @@ static inline void get_page(struct page *page)
338 346
339static inline void put_page(struct page *page) 347static inline void put_page(struct page *page)
340{ 348{
341 if (!PageReserved(page) && put_page_testzero(page)) 349 if (put_page_testzero(page))
342 __page_cache_release(page); 350 __page_cache_release(page);
343} 351}
344 352
@@ -587,7 +595,7 @@ static inline int PageAnon(struct page *page)
587static inline pgoff_t page_index(struct page *page) 595static inline pgoff_t page_index(struct page *page)
588{ 596{
589 if (unlikely(PageSwapCache(page))) 597 if (unlikely(PageSwapCache(page)))
590 return page->private; 598 return page_private(page);
591 return page->index; 599 return page->index;
592} 600}
593 601
@@ -682,7 +690,7 @@ struct zap_details {
682 690
683unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address, 691unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address,
684 unsigned long size, struct zap_details *); 692 unsigned long size, struct zap_details *);
685unsigned long unmap_vmas(struct mmu_gather **tlb, struct mm_struct *mm, 693unsigned long unmap_vmas(struct mmu_gather **tlb,
686 struct vm_area_struct *start_vma, unsigned long start_addr, 694 struct vm_area_struct *start_vma, unsigned long start_addr,
687 unsigned long end_addr, unsigned long *nr_accounted, 695 unsigned long end_addr, unsigned long *nr_accounted,
688 struct zap_details *); 696 struct zap_details *);
@@ -704,10 +712,6 @@ static inline void unmap_shared_mapping_range(struct address_space *mapping,
704} 712}
705 713
706extern int vmtruncate(struct inode * inode, loff_t offset); 714extern int vmtruncate(struct inode * inode, loff_t offset);
707extern pud_t *FASTCALL(__pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address));
708extern pmd_t *FASTCALL(__pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address));
709extern pte_t *FASTCALL(pte_alloc_kernel(struct mm_struct *mm, pmd_t *pmd, unsigned long address));
710extern pte_t *FASTCALL(pte_alloc_map(struct mm_struct *mm, pmd_t *pmd, unsigned long address));
711extern int install_page(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, struct page *page, pgprot_t prot); 715extern int install_page(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, struct page *page, pgprot_t prot);
712extern int install_file_pte(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned long pgoff, pgprot_t prot); 716extern int install_file_pte(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned long pgoff, pgprot_t prot);
713extern int __handle_mm_fault(struct mm_struct *mm,struct vm_area_struct *vma, unsigned long address, int write_access); 717extern int __handle_mm_fault(struct mm_struct *mm,struct vm_area_struct *vma, unsigned long address, int write_access);
@@ -723,6 +727,7 @@ void install_arg_page(struct vm_area_struct *, struct page *, unsigned long);
723 727
724int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, 728int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start,
725 int len, int write, int force, struct page **pages, struct vm_area_struct **vmas); 729 int len, int write, int force, struct page **pages, struct vm_area_struct **vmas);
730void print_bad_pte(struct vm_area_struct *, pte_t, unsigned long);
726 731
727int __set_page_dirty_buffers(struct page *page); 732int __set_page_dirty_buffers(struct page *page);
728int __set_page_dirty_nobuffers(struct page *page); 733int __set_page_dirty_nobuffers(struct page *page);
@@ -759,38 +764,83 @@ struct shrinker;
759extern struct shrinker *set_shrinker(int, shrinker_t); 764extern struct shrinker *set_shrinker(int, shrinker_t);
760extern void remove_shrinker(struct shrinker *shrinker); 765extern void remove_shrinker(struct shrinker *shrinker);
761 766
762/* 767int __pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address);
763 * On a two-level or three-level page table, this ends up being trivial. Thus 768int __pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address);
764 * the inlining and the symmetry break with pte_alloc_map() that does all 769int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address);
765 * of this out-of-line. 770int __pte_alloc_kernel(pmd_t *pmd, unsigned long address);
766 */ 771
767/* 772/*
768 * The following ifdef needed to get the 4level-fixup.h header to work. 773 * The following ifdef needed to get the 4level-fixup.h header to work.
769 * Remove it when 4level-fixup.h has been removed. 774 * Remove it when 4level-fixup.h has been removed.
770 */ 775 */
771#ifdef CONFIG_MMU 776#if defined(CONFIG_MMU) && !defined(__ARCH_HAS_4LEVEL_HACK)
772#ifndef __ARCH_HAS_4LEVEL_HACK
773static inline pud_t *pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address) 777static inline pud_t *pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address)
774{ 778{
775 if (pgd_none(*pgd)) 779 return (unlikely(pgd_none(*pgd)) && __pud_alloc(mm, pgd, address))?
776 return __pud_alloc(mm, pgd, address); 780 NULL: pud_offset(pgd, address);
777 return pud_offset(pgd, address);
778} 781}
779 782
780static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address) 783static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address)
781{ 784{
782 if (pud_none(*pud)) 785 return (unlikely(pud_none(*pud)) && __pmd_alloc(mm, pud, address))?
783 return __pmd_alloc(mm, pud, address); 786 NULL: pmd_offset(pud, address);
784 return pmd_offset(pud, address);
785} 787}
786#endif 788#endif /* CONFIG_MMU && !__ARCH_HAS_4LEVEL_HACK */
787#endif /* CONFIG_MMU */ 789
790#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
791/*
792 * We tuck a spinlock to guard each pagetable page into its struct page,
793 * at page->private, with BUILD_BUG_ON to make sure that this will not
794 * overflow into the next struct page (as it might with DEBUG_SPINLOCK).
795 * When freeing, reset page->mapping so free_pages_check won't complain.
796 */
797#define __pte_lockptr(page) &((page)->u.ptl)
798#define pte_lock_init(_page) do { \
799 spin_lock_init(__pte_lockptr(_page)); \
800} while (0)
801#define pte_lock_deinit(page) ((page)->mapping = NULL)
802#define pte_lockptr(mm, pmd) ({(void)(mm); __pte_lockptr(pmd_page(*(pmd)));})
803#else
804/*
805 * We use mm->page_table_lock to guard all pagetable pages of the mm.
806 */
807#define pte_lock_init(page) do {} while (0)
808#define pte_lock_deinit(page) do {} while (0)
809#define pte_lockptr(mm, pmd) ({(void)(pmd); &(mm)->page_table_lock;})
810#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */
811
812#define pte_offset_map_lock(mm, pmd, address, ptlp) \
813({ \
814 spinlock_t *__ptl = pte_lockptr(mm, pmd); \
815 pte_t *__pte = pte_offset_map(pmd, address); \
816 *(ptlp) = __ptl; \
817 spin_lock(__ptl); \
818 __pte; \
819})
820
821#define pte_unmap_unlock(pte, ptl) do { \
822 spin_unlock(ptl); \
823 pte_unmap(pte); \
824} while (0)
825
826#define pte_alloc_map(mm, pmd, address) \
827 ((unlikely(!pmd_present(*(pmd))) && __pte_alloc(mm, pmd, address))? \
828 NULL: pte_offset_map(pmd, address))
829
830#define pte_alloc_map_lock(mm, pmd, address, ptlp) \
831 ((unlikely(!pmd_present(*(pmd))) && __pte_alloc(mm, pmd, address))? \
832 NULL: pte_offset_map_lock(mm, pmd, address, ptlp))
833
834#define pte_alloc_kernel(pmd, address) \
835 ((unlikely(!pmd_present(*(pmd))) && __pte_alloc_kernel(pmd, address))? \
836 NULL: pte_offset_kernel(pmd, address))
788 837
789extern void free_area_init(unsigned long * zones_size); 838extern void free_area_init(unsigned long * zones_size);
790extern void free_area_init_node(int nid, pg_data_t *pgdat, 839extern void free_area_init_node(int nid, pg_data_t *pgdat,
791 unsigned long * zones_size, unsigned long zone_start_pfn, 840 unsigned long * zones_size, unsigned long zone_start_pfn,
792 unsigned long *zholes_size); 841 unsigned long *zholes_size);
793extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long); 842extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long);
843extern void setup_per_zone_pages_min(void);
794extern void mem_init(void); 844extern void mem_init(void);
795extern void show_mem(void); 845extern void show_mem(void);
796extern void si_meminfo(struct sysinfo * val); 846extern void si_meminfo(struct sysinfo * val);
@@ -834,6 +884,7 @@ extern int split_vma(struct mm_struct *,
834extern int insert_vm_struct(struct mm_struct *, struct vm_area_struct *); 884extern int insert_vm_struct(struct mm_struct *, struct vm_area_struct *);
835extern void __vma_link_rb(struct mm_struct *, struct vm_area_struct *, 885extern void __vma_link_rb(struct mm_struct *, struct vm_area_struct *,
836 struct rb_node **, struct rb_node *); 886 struct rb_node **, struct rb_node *);
887extern void unlink_file_vma(struct vm_area_struct *);
837extern struct vm_area_struct *copy_vma(struct vm_area_struct **, 888extern struct vm_area_struct *copy_vma(struct vm_area_struct **,
838 unsigned long addr, unsigned long len, pgoff_t pgoff); 889 unsigned long addr, unsigned long len, pgoff_t pgoff);
839extern void exit_mmap(struct mm_struct *); 890extern void exit_mmap(struct mm_struct *);
@@ -894,7 +945,8 @@ void handle_ra_miss(struct address_space *mapping,
894unsigned long max_sane_readahead(unsigned long nr); 945unsigned long max_sane_readahead(unsigned long nr);
895 946
896/* Do stack extension */ 947/* Do stack extension */
897extern int expand_stack(struct vm_area_struct * vma, unsigned long address); 948extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
949extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
898 950
899/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */ 951/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */
900extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr); 952extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr);
@@ -917,40 +969,28 @@ static inline unsigned long vma_pages(struct vm_area_struct *vma)
917 return (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 969 return (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
918} 970}
919 971
920extern struct vm_area_struct *find_extend_vma(struct mm_struct *mm, unsigned long addr); 972struct vm_area_struct *find_extend_vma(struct mm_struct *, unsigned long addr);
973struct page *vmalloc_to_page(void *addr);
974unsigned long vmalloc_to_pfn(void *addr);
975int remap_pfn_range(struct vm_area_struct *, unsigned long addr,
976 unsigned long pfn, unsigned long size, pgprot_t);
921 977
922extern struct page * vmalloc_to_page(void *addr); 978struct page *follow_page(struct mm_struct *, unsigned long address,
923extern unsigned long vmalloc_to_pfn(void *addr); 979 unsigned int foll_flags);
924extern struct page * follow_page(struct mm_struct *mm, unsigned long address, 980#define FOLL_WRITE 0x01 /* check pte is writable */
925 int write); 981#define FOLL_TOUCH 0x02 /* mark page accessed */
926extern int check_user_page_readable(struct mm_struct *mm, unsigned long address); 982#define FOLL_GET 0x04 /* do get_page on page */
927int remap_pfn_range(struct vm_area_struct *, unsigned long, 983#define FOLL_ANON 0x08 /* give ZERO_PAGE if no pgtable */
928 unsigned long, unsigned long, pgprot_t);
929 984
930#ifdef CONFIG_PROC_FS 985#ifdef CONFIG_PROC_FS
931void __vm_stat_account(struct mm_struct *, unsigned long, struct file *, long); 986void vm_stat_account(struct mm_struct *, unsigned long, struct file *, long);
932#else 987#else
933static inline void __vm_stat_account(struct mm_struct *mm, 988static inline void vm_stat_account(struct mm_struct *mm,
934 unsigned long flags, struct file *file, long pages) 989 unsigned long flags, struct file *file, long pages)
935{ 990{
936} 991}
937#endif /* CONFIG_PROC_FS */ 992#endif /* CONFIG_PROC_FS */
938 993
939static inline void vm_stat_account(struct vm_area_struct *vma)
940{
941 __vm_stat_account(vma->vm_mm, vma->vm_flags, vma->vm_file,
942 vma_pages(vma));
943}
944
945static inline void vm_stat_unaccount(struct vm_area_struct *vma)
946{
947 __vm_stat_account(vma->vm_mm, vma->vm_flags, vma->vm_file,
948 -vma_pages(vma));
949}
950
951/* update per process rss and vm hiwater data */
952extern void update_mem_hiwater(struct task_struct *tsk);
953
954#ifndef CONFIG_DEBUG_PAGEALLOC 994#ifndef CONFIG_DEBUG_PAGEALLOC
955static inline void 995static inline void
956kernel_map_pages(struct page *page, int numpages, int enable) 996kernel_map_pages(struct page *page, int numpages, int enable)
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 1ab78e8d6c53..aef6042f8f0b 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -50,7 +50,7 @@ struct mmc_command {
50#define MMC_ERR_INVALID 5 50#define MMC_ERR_INVALID 5
51 51
52 struct mmc_data *data; /* data segment associated with cmd */ 52 struct mmc_data *data; /* data segment associated with cmd */
53 struct mmc_request *mrq; /* assoicated request */ 53 struct mmc_request *mrq; /* associated request */
54}; 54};
55 55
56struct mmc_data { 56struct mmc_data {
@@ -68,7 +68,7 @@ struct mmc_data {
68 unsigned int bytes_xfered; 68 unsigned int bytes_xfered;
69 69
70 struct mmc_command *stop; /* stop command */ 70 struct mmc_command *stop; /* stop command */
71 struct mmc_request *mrq; /* assoicated request */ 71 struct mmc_request *mrq; /* associated request */
72 72
73 unsigned int sg_len; /* size of scatter list */ 73 unsigned int sg_len; /* size of scatter list */
74 struct scatterlist *sg; /* I/O scatter list */ 74 struct scatterlist *sg; /* I/O scatter list */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 7519eb4191e7..f5fa3082fd6a 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -12,6 +12,7 @@
12#include <linux/threads.h> 12#include <linux/threads.h>
13#include <linux/numa.h> 13#include <linux/numa.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/seqlock.h>
15#include <asm/atomic.h> 16#include <asm/atomic.h>
16 17
17/* Free memory management - zoned buddy allocator. */ 18/* Free memory management - zoned buddy allocator. */
@@ -137,6 +138,10 @@ struct zone {
137 * free areas of different sizes 138 * free areas of different sizes
138 */ 139 */
139 spinlock_t lock; 140 spinlock_t lock;
141#ifdef CONFIG_MEMORY_HOTPLUG
142 /* see spanned/present_pages for more description */
143 seqlock_t span_seqlock;
144#endif
140 struct free_area free_area[MAX_ORDER]; 145 struct free_area free_area[MAX_ORDER];
141 146
142 147
@@ -220,6 +225,16 @@ struct zone {
220 /* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */ 225 /* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */
221 unsigned long zone_start_pfn; 226 unsigned long zone_start_pfn;
222 227
228 /*
229 * zone_start_pfn, spanned_pages and present_pages are all
230 * protected by span_seqlock. It is a seqlock because it has
231 * to be read outside of zone->lock, and it is done in the main
232 * allocator path. But, it is written quite infrequently.
233 *
234 * The lock is declared along with zone->lock because it is
235 * frequently read in proximity to zone->lock. It's good to
236 * give them a chance of being in the same cacheline.
237 */
223 unsigned long spanned_pages; /* total size, including holes */ 238 unsigned long spanned_pages; /* total size, including holes */
224 unsigned long present_pages; /* amount of memory (excluding holes) */ 239 unsigned long present_pages; /* amount of memory (excluding holes) */
225 240
@@ -273,6 +288,16 @@ typedef struct pglist_data {
273 struct page *node_mem_map; 288 struct page *node_mem_map;
274#endif 289#endif
275 struct bootmem_data *bdata; 290 struct bootmem_data *bdata;
291#ifdef CONFIG_MEMORY_HOTPLUG
292 /*
293 * Must be held any time you expect node_start_pfn, node_present_pages
294 * or node_spanned_pages stay constant. Holding this will also
295 * guarantee that any pfn_valid() stays that way.
296 *
297 * Nests above zone->lock and zone->size_seqlock.
298 */
299 spinlock_t node_size_lock;
300#endif
276 unsigned long node_start_pfn; 301 unsigned long node_start_pfn;
277 unsigned long node_present_pages; /* total number of physical pages */ 302 unsigned long node_present_pages; /* total number of physical pages */
278 unsigned long node_spanned_pages; /* total size of physical page 303 unsigned long node_spanned_pages; /* total size of physical page
@@ -293,6 +318,8 @@ typedef struct pglist_data {
293#endif 318#endif
294#define nid_page_nr(nid, pagenr) pgdat_page_nr(NODE_DATA(nid),(pagenr)) 319#define nid_page_nr(nid, pagenr) pgdat_page_nr(NODE_DATA(nid),(pagenr))
295 320
321#include <linux/memory_hotplug.h>
322
296extern struct pglist_data *pgdat_list; 323extern struct pglist_data *pgdat_list;
297 324
298void __get_zone_counts(unsigned long *active, unsigned long *inactive, 325void __get_zone_counts(unsigned long *active, unsigned long *inactive,
@@ -509,6 +536,7 @@ static inline struct mem_section *__nr_to_section(unsigned long nr)
509 return NULL; 536 return NULL;
510 return &mem_section[SECTION_NR_TO_ROOT(nr)][nr & SECTION_ROOT_MASK]; 537 return &mem_section[SECTION_NR_TO_ROOT(nr)][nr & SECTION_ROOT_MASK];
511} 538}
539extern int __section_nr(struct mem_section* ms);
512 540
513/* 541/*
514 * We use the lower bits of the mem_map pointer to store 542 * We use the lower bits of the mem_map pointer to store
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index 2f0299a448f6..7b08c11ec4cc 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -244,4 +244,9 @@ struct pcmcia_device_id {
244#define PCMCIA_DEV_ID_MATCH_FAKE_CIS 0x0200 244#define PCMCIA_DEV_ID_MATCH_FAKE_CIS 0x0200
245#define PCMCIA_DEV_ID_MATCH_ANONYMOUS 0x0400 245#define PCMCIA_DEV_ID_MATCH_ANONYMOUS 0x0400
246 246
247/* I2C */
248struct i2c_device_id {
249 __u16 id;
250};
251
247#endif /* LINUX_MOD_DEVICETABLE_H */ 252#endif /* LINUX_MOD_DEVICETABLE_H */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index a9281b24c40b..c6efce4a04a4 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -308,6 +308,7 @@ struct net_device
308#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ 308#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */
309#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */ 309#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */
310#define NETIF_F_LLTX 4096 /* LockLess TX */ 310#define NETIF_F_LLTX 4096 /* LockLess TX */
311#define NETIF_F_UFO 8192 /* Can offload UDP Large Send*/
311 312
312 struct net_device *next_sched; 313 struct net_device *next_sched;
313 314
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7349058ed778..3596ac94ecff 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -132,6 +132,7 @@ struct pci_dev {
132 unsigned int is_enabled:1; /* pci_enable_device has been called */ 132 unsigned int is_enabled:1; /* pci_enable_device has been called */
133 unsigned int is_busmaster:1; /* device is busmaster */ 133 unsigned int is_busmaster:1; /* device is busmaster */
134 unsigned int no_msi:1; /* device may not use msi */ 134 unsigned int no_msi:1; /* device may not use msi */
135 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
135 136
136 u32 saved_config_space[16]; /* config space saved at suspend time */ 137 u32 saved_config_space[16]; /* config space saved at suspend time */
137 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 138 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
@@ -490,6 +491,9 @@ extern void pci_disable_msix(struct pci_dev *dev);
490extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 491extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
491#endif 492#endif
492 493
494extern void pci_block_user_cfg_access(struct pci_dev *dev);
495extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
496
493/* 497/*
494 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 498 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
495 * a PCI domain is defined to be a set of PCI busses which share 499 * a PCI domain is defined to be a set of PCI busses which share
@@ -560,6 +564,9 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int en
560 564
561#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 565#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
562 566
567static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
568static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
569
563#endif /* CONFIG_PCI */ 570#endif /* CONFIG_PCI */
564 571
565/* Include architecture-dependent settings and functions */ 572/* Include architecture-dependent settings and functions */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 71834f05504f..56192005fa4d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -96,6 +96,9 @@
96#define PCI_CLASS_SERIAL_ACCESS 0x0c01 96#define PCI_CLASS_SERIAL_ACCESS 0x0c01
97#define PCI_CLASS_SERIAL_SSA 0x0c02 97#define PCI_CLASS_SERIAL_SSA 0x0c02
98#define PCI_CLASS_SERIAL_USB 0x0c03 98#define PCI_CLASS_SERIAL_USB 0x0c03
99#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
100#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
101#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
99#define PCI_CLASS_SERIAL_FIBER 0x0c04 102#define PCI_CLASS_SERIAL_FIBER 0x0c04
100#define PCI_CLASS_SERIAL_SMBUS 0x0c05 103#define PCI_CLASS_SERIAL_SMBUS 0x0c05
101 104
@@ -132,9 +135,6 @@
132 135
133#define PCI_VENDOR_ID_COMPAQ 0x0e11 136#define PCI_VENDOR_ID_COMPAQ 0x0e11
134#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 137#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508
135#define PCI_DEVICE_ID_COMPAQ_1280 0x3033
136#define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000
137#define PCI_DEVICE_ID_COMPAQ_6010 0x6010
138#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc 138#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc
139#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 139#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10
140#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 140#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32
@@ -274,7 +274,6 @@
274#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 274#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050
275#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 275#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051
276#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 276#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052
277#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452
278#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 277#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053
279#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 278#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054
280#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 279#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055
@@ -282,8 +281,6 @@
282#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 281#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057
283#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 282#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058
284/* Rage128 M4 */ 283/* Rage128 M4 */
285#define PCI_DEVICE_ID_ATI_RADEON_LE 0x4d45
286#define PCI_DEVICE_ID_ATI_RADEON_LF 0x4d46
287/* Radeon R100 */ 284/* Radeon R100 */
288#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 285#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144
289#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 286#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145
@@ -304,32 +301,22 @@
304#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 301#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157
305#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 302#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158
306/* Radeon NV-100 */ 303/* Radeon NV-100 */
307#define PCI_DEVICE_ID_ATI_RADEON_N1 0x5159
308#define PCI_DEVICE_ID_ATI_RADEON_N2 0x515a
309/* Radeon RV250 (9000) */ 304/* Radeon RV250 (9000) */
310#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 305#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964
311#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 306#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965
312#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 307#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966
313#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 308#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967
314/* Radeon RV280 (9200) */ 309/* Radeon RV280 (9200) */
315#define PCI_DEVICE_ID_ATI_RADEON_Y_ 0x5960
316#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 310#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961
317#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 311#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964
318/* Radeon R300 (9500) */ 312/* Radeon R300 (9500) */
319#define PCI_DEVICE_ID_ATI_RADEON_AD 0x4144
320/* Radeon R300 (9700) */ 313/* Radeon R300 (9700) */
321#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 314#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44
322#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 315#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45
323#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 316#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46
324#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 317#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47
325#define PCI_DEVICE_ID_ATI_RADEON_AE 0x4145
326#define PCI_DEVICE_ID_ATI_RADEON_AF 0x4146
327/* Radeon R350 (9800) */ 318/* Radeon R350 (9800) */
328#define PCI_DEVICE_ID_ATI_RADEON_NH 0x4e48
329#define PCI_DEVICE_ID_ATI_RADEON_NI 0x4e49
330/* Radeon RV350 (9600) */ 319/* Radeon RV350 (9600) */
331#define PCI_DEVICE_ID_ATI_RADEON_AP 0x4150
332#define PCI_DEVICE_ID_ATI_RADEON_AR 0x4152
333/* Radeon M6 */ 320/* Radeon M6 */
334#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 321#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59
335#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a 322#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a
@@ -342,10 +329,6 @@
342#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 329#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66
343#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 330#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67
344/* Radeon */ 331/* Radeon */
345#define PCI_DEVICE_ID_ATI_RADEON_RA 0x5144
346#define PCI_DEVICE_ID_ATI_RADEON_RB 0x5145
347#define PCI_DEVICE_ID_ATI_RADEON_RC 0x5146
348#define PCI_DEVICE_ID_ATI_RADEON_RD 0x5147
349/* RadeonIGP */ 332/* RadeonIGP */
350#define PCI_DEVICE_ID_ATI_RS100 0xcab0 333#define PCI_DEVICE_ID_ATI_RS100 0xcab0
351#define PCI_DEVICE_ID_ATI_RS200 0xcab2 334#define PCI_DEVICE_ID_ATI_RS200 0xcab2
@@ -446,45 +429,28 @@
446#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 429#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6
447#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 430#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
448#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 431#define PCI_DEVICE_ID_CIRRUS_6832 0x1110
449#define PCI_DEVICE_ID_CIRRUS_7542 0x1200
450#define PCI_DEVICE_ID_CIRRUS_7543 0x1202 432#define PCI_DEVICE_ID_CIRRUS_7543 0x1202
451#define PCI_DEVICE_ID_CIRRUS_7541 0x1204
452#define PCI_DEVICE_ID_CIRRUS_4610 0x6001 433#define PCI_DEVICE_ID_CIRRUS_4610 0x6001
453#define PCI_DEVICE_ID_CIRRUS_4612 0x6003 434#define PCI_DEVICE_ID_CIRRUS_4612 0x6003
454#define PCI_DEVICE_ID_CIRRUS_4615 0x6004 435#define PCI_DEVICE_ID_CIRRUS_4615 0x6004
455#define PCI_DEVICE_ID_CIRRUS_4281 0x6005
456 436
457#define PCI_VENDOR_ID_IBM 0x1014 437#define PCI_VENDOR_ID_IBM 0x1014
458#define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a
459#define PCI_DEVICE_ID_IBM_TR 0x0018 438#define PCI_DEVICE_ID_IBM_TR 0x0018
460#define PCI_DEVICE_ID_IBM_82G2675 0x001d
461#define PCI_DEVICE_ID_IBM_MCA 0x0020
462#define PCI_DEVICE_ID_IBM_82351 0x0022
463#define PCI_DEVICE_ID_IBM_PYTHON 0x002d
464#define PCI_DEVICE_ID_IBM_SERVERAID 0x002e
465#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e 439#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e
466#define PCI_DEVICE_ID_IBM_MPIC 0x0046
467#define PCI_DEVICE_ID_IBM_3780IDSP 0x007d
468#define PCI_DEVICE_ID_IBM_CHUKAR 0x0096
469#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc 440#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc
470#define PCI_DEVICE_ID_IBM_CPC710_PCI32 0x0105
471#define PCI_DEVICE_ID_IBM_405GP 0x0156
472#define PCI_DEVICE_ID_IBM_SNIPE 0x0180 441#define PCI_DEVICE_ID_IBM_SNIPE 0x0180
473#define PCI_DEVICE_ID_IBM_SERVERAIDI960 0x01bd
474#define PCI_DEVICE_ID_IBM_CITRINE 0x028C 442#define PCI_DEVICE_ID_IBM_CITRINE 0x028C
475#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 443#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166
476#define PCI_DEVICE_ID_IBM_MPIC_2 0xffff
477#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 444#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031
478#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 445#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219
479#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A 446#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A
480#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 447#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251
481#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 448#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252
482 449
483#define PCI_VENDOR_ID_COMPEX2 0x101a // pci.ids says "AT&T GIS (NCR)" 450#define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */
484#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 451#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005
485 452
486#define PCI_VENDOR_ID_WD 0x101c 453#define PCI_VENDOR_ID_WD 0x101c
487#define PCI_DEVICE_ID_WD_7197 0x3296
488#define PCI_DEVICE_ID_WD_90C 0xc24a 454#define PCI_DEVICE_ID_WD_90C 0xc24a
489 455
490#define PCI_VENDOR_ID_AMI 0x101e 456#define PCI_VENDOR_ID_AMI 0x101e
@@ -501,33 +467,18 @@
501#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 467#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
502#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 468#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
503#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C 469#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C
504#define PCI_DEVICE_ID_AMD_FE_GATE_700D 0x700D
505#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E 470#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E
506#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F
507#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400
508#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 471#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401
509#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403
510#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404
511#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408
512#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 472#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409
513#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B 473#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B
514#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C
515#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 474#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410
516#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 475#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411
517#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 476#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413
518#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414 477#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440
519#define PCI_DEVICE_ID_AMD_OPUS_7440 0x7440
520# define PCI_DEVICE_ID_AMD_VIPER_7440 PCI_DEVICE_ID_AMD_OPUS_7440
521#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 478#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441
522# define PCI_DEVICE_ID_AMD_VIPER_7441 PCI_DEVICE_ID_AMD_OPUS_7441
523#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 479#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443
524# define PCI_DEVICE_ID_AMD_VIPER_7443 PCI_DEVICE_ID_AMD_OPUS_7443 480#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443
525#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 481#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445
526#define PCI_DEVICE_ID_AMD_OPUS_7448 0x7448
527# define PCI_DEVICE_ID_AMD_VIPER_7448 PCI_DEVICE_ID_AMD_OPUS_7448
528#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449
529# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449
530#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462
531#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 482#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468
532#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 483#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469
533#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a 484#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a
@@ -585,7 +536,6 @@
585#define PCI_DEVICE_ID_CT_65550 0x00e0 536#define PCI_DEVICE_ID_CT_65550 0x00e0
586#define PCI_DEVICE_ID_CT_65554 0x00e4 537#define PCI_DEVICE_ID_CT_65554 0x00e4
587#define PCI_DEVICE_ID_CT_65555 0x00e5 538#define PCI_DEVICE_ID_CT_65555 0x00e5
588#define PCI_DEVICE_ID_CT_69000 0x00c0
589 539
590#define PCI_VENDOR_ID_MIRO 0x1031 540#define PCI_VENDOR_ID_MIRO 0x1031
591#define PCI_DEVICE_ID_MIRO_36050 0x5601 541#define PCI_DEVICE_ID_MIRO_36050 0x5601
@@ -639,7 +589,6 @@
639#define PCI_DEVICE_ID_SI_550 0x0550 589#define PCI_DEVICE_ID_SI_550 0x0550
640#define PCI_DEVICE_ID_SI_540_VGA 0x5300 590#define PCI_DEVICE_ID_SI_540_VGA 0x5300
641#define PCI_DEVICE_ID_SI_550_VGA 0x5315 591#define PCI_DEVICE_ID_SI_550_VGA 0x5315
642#define PCI_DEVICE_ID_SI_601 0x0601
643#define PCI_DEVICE_ID_SI_620 0x0620 592#define PCI_DEVICE_ID_SI_620 0x0620
644#define PCI_DEVICE_ID_SI_630 0x0630 593#define PCI_DEVICE_ID_SI_630 0x0630
645#define PCI_DEVICE_ID_SI_633 0x0633 594#define PCI_DEVICE_ID_SI_633 0x0633
@@ -650,30 +599,22 @@
650#define PCI_DEVICE_ID_SI_648 0x0648 599#define PCI_DEVICE_ID_SI_648 0x0648
651#define PCI_DEVICE_ID_SI_650 0x0650 600#define PCI_DEVICE_ID_SI_650 0x0650
652#define PCI_DEVICE_ID_SI_651 0x0651 601#define PCI_DEVICE_ID_SI_651 0x0651
653#define PCI_DEVICE_ID_SI_652 0x0652
654#define PCI_DEVICE_ID_SI_655 0x0655 602#define PCI_DEVICE_ID_SI_655 0x0655
655#define PCI_DEVICE_ID_SI_661 0x0661 603#define PCI_DEVICE_ID_SI_661 0x0661
656#define PCI_DEVICE_ID_SI_730 0x0730 604#define PCI_DEVICE_ID_SI_730 0x0730
657#define PCI_DEVICE_ID_SI_733 0x0733 605#define PCI_DEVICE_ID_SI_733 0x0733
658#define PCI_DEVICE_ID_SI_630_VGA 0x6300 606#define PCI_DEVICE_ID_SI_630_VGA 0x6300
659#define PCI_DEVICE_ID_SI_730_VGA 0x7300
660#define PCI_DEVICE_ID_SI_735 0x0735 607#define PCI_DEVICE_ID_SI_735 0x0735
661#define PCI_DEVICE_ID_SI_740 0x0740 608#define PCI_DEVICE_ID_SI_740 0x0740
662#define PCI_DEVICE_ID_SI_741 0x0741 609#define PCI_DEVICE_ID_SI_741 0x0741
663#define PCI_DEVICE_ID_SI_745 0x0745 610#define PCI_DEVICE_ID_SI_745 0x0745
664#define PCI_DEVICE_ID_SI_746 0x0746 611#define PCI_DEVICE_ID_SI_746 0x0746
665#define PCI_DEVICE_ID_SI_748 0x0748
666#define PCI_DEVICE_ID_SI_750 0x0750
667#define PCI_DEVICE_ID_SI_751 0x0751
668#define PCI_DEVICE_ID_SI_752 0x0752
669#define PCI_DEVICE_ID_SI_755 0x0755 612#define PCI_DEVICE_ID_SI_755 0x0755
670#define PCI_DEVICE_ID_SI_760 0x0760 613#define PCI_DEVICE_ID_SI_760 0x0760
671#define PCI_DEVICE_ID_SI_900 0x0900 614#define PCI_DEVICE_ID_SI_900 0x0900
672#define PCI_DEVICE_ID_SI_961 0x0961 615#define PCI_DEVICE_ID_SI_961 0x0961
673#define PCI_DEVICE_ID_SI_962 0x0962 616#define PCI_DEVICE_ID_SI_962 0x0962
674#define PCI_DEVICE_ID_SI_963 0x0963 617#define PCI_DEVICE_ID_SI_963 0x0963
675#define PCI_DEVICE_ID_SI_5107 0x5107
676#define PCI_DEVICE_ID_SI_5300 0x5300
677#define PCI_DEVICE_ID_SI_5511 0x5511 618#define PCI_DEVICE_ID_SI_5511 0x5511
678#define PCI_DEVICE_ID_SI_5513 0x5513 619#define PCI_DEVICE_ID_SI_5513 0x5513
679#define PCI_DEVICE_ID_SI_5518 0x5518 620#define PCI_DEVICE_ID_SI_5518 0x5518
@@ -685,10 +626,6 @@
685#define PCI_DEVICE_ID_SI_5597 0x5597 626#define PCI_DEVICE_ID_SI_5597 0x5597
686#define PCI_DEVICE_ID_SI_5598 0x5598 627#define PCI_DEVICE_ID_SI_5598 0x5598
687#define PCI_DEVICE_ID_SI_5600 0x5600 628#define PCI_DEVICE_ID_SI_5600 0x5600
688#define PCI_DEVICE_ID_SI_6300 0x6300
689#define PCI_DEVICE_ID_SI_6306 0x6306
690#define PCI_DEVICE_ID_SI_6326 0x6326
691#define PCI_DEVICE_ID_SI_7001 0x7001
692#define PCI_DEVICE_ID_SI_7012 0x7012 629#define PCI_DEVICE_ID_SI_7012 0x7012
693#define PCI_DEVICE_ID_SI_7013 0x7013 630#define PCI_DEVICE_ID_SI_7013 0x7013
694#define PCI_DEVICE_ID_SI_7016 0x7016 631#define PCI_DEVICE_ID_SI_7016 0x7016
@@ -709,14 +646,11 @@
709#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 646#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049
710#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A 647#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A
711#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B 648#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B
712#define PCI_DEVICE_ID_HP_PCI_LBA 0x1054
713#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0
714#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 649#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1
715#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b 650#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b
716#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 651#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223
717#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 652#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226
718#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 653#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227
719#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229
720#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a 654#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a
721#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e 655#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e
722#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c 656#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c
@@ -724,9 +658,7 @@
724#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 658#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
725#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 659#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
726#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a 660#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a
727#define PCI_DEVICE_ID_HP_CISS 0x3210
728#define PCI_DEVICE_ID_HP_CISSA 0x3220 661#define PCI_DEVICE_ID_HP_CISSA 0x3220
729#define PCI_DEVICE_ID_HP_CISSB 0x3222
730#define PCI_DEVICE_ID_HP_CISSC 0x3230 662#define PCI_DEVICE_ID_HP_CISSC 0x3230
731#define PCI_DEVICE_ID_HP_CISSD 0x3238 663#define PCI_DEVICE_ID_HP_CISSD 0x3238
732#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 664#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031
@@ -734,8 +666,6 @@
734#define PCI_VENDOR_ID_PCTECH 0x1042 666#define PCI_VENDOR_ID_PCTECH 0x1042
735#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 667#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
736#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 668#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001
737#define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000
738#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
739#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 669#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
740 670
741#define PCI_VENDOR_ID_ASUSTEK 0x1043 671#define PCI_VENDOR_ID_ASUSTEK 0x1043
@@ -745,24 +675,15 @@
745#define PCI_DEVICE_ID_DPT 0xa400 675#define PCI_DEVICE_ID_DPT 0xa400
746 676
747#define PCI_VENDOR_ID_OPTI 0x1045 677#define PCI_VENDOR_ID_OPTI 0x1045
748#define PCI_DEVICE_ID_OPTI_92C178 0xc178
749#define PCI_DEVICE_ID_OPTI_82C557 0xc557
750#define PCI_DEVICE_ID_OPTI_82C558 0xc558 678#define PCI_DEVICE_ID_OPTI_82C558 0xc558
751#define PCI_DEVICE_ID_OPTI_82C621 0xc621 679#define PCI_DEVICE_ID_OPTI_82C621 0xc621
752#define PCI_DEVICE_ID_OPTI_82C700 0xc700 680#define PCI_DEVICE_ID_OPTI_82C700 0xc700
753#define PCI_DEVICE_ID_OPTI_82C701 0xc701
754#define PCI_DEVICE_ID_OPTI_82C814 0xc814
755#define PCI_DEVICE_ID_OPTI_82C822 0xc822
756#define PCI_DEVICE_ID_OPTI_82C861 0xc861
757#define PCI_DEVICE_ID_OPTI_82C825 0xd568 681#define PCI_DEVICE_ID_OPTI_82C825 0xd568
758 682
759#define PCI_VENDOR_ID_ELSA 0x1048 683#define PCI_VENDOR_ID_ELSA 0x1048
760#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 684#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
761#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 685#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
762 686
763#define PCI_VENDOR_ID_SGS 0x104a
764#define PCI_DEVICE_ID_SGS_2000 0x0008
765#define PCI_DEVICE_ID_SGS_1764 0x0009
766 687
767#define PCI_VENDOR_ID_BUSLOGIC 0x104B 688#define PCI_VENDOR_ID_BUSLOGIC 0x104B
768#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 689#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
@@ -770,7 +691,6 @@
770#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 691#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130
771 692
772#define PCI_VENDOR_ID_TI 0x104c 693#define PCI_VENDOR_ID_TI 0x104c
773#define PCI_DEVICE_ID_TI_TVP4010 0x3d04
774#define PCI_DEVICE_ID_TI_TVP4020 0x3d07 694#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
775#define PCI_DEVICE_ID_TI_4450 0x8011 695#define PCI_DEVICE_ID_TI_4450 0x8011
776#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 696#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031
@@ -804,14 +724,10 @@
804#define PCI_DEVICE_ID_TI_X420 0xac8e 724#define PCI_DEVICE_ID_TI_X420 0xac8e
805 725
806#define PCI_VENDOR_ID_SONY 0x104d 726#define PCI_VENDOR_ID_SONY 0x104d
807#define PCI_DEVICE_ID_SONY_CXD3222 0x8039
808 727
809#define PCI_VENDOR_ID_OAK 0x104e
810#define PCI_DEVICE_ID_OAK_OTI107 0x0107
811 728
812/* Winbond have two vendor IDs! See 0x10ad as well */ 729/* Winbond have two vendor IDs! See 0x10ad as well */
813#define PCI_VENDOR_ID_WINBOND2 0x1050 730#define PCI_VENDOR_ID_WINBOND2 0x1050
814#define PCI_DEVICE_ID_WINBOND2_89C940 0x0940
815#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a 731#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a
816#define PCI_DEVICE_ID_WINBOND2_6692 0x6692 732#define PCI_DEVICE_ID_WINBOND2_6692 0x6692
817 733
@@ -820,19 +736,15 @@
820 736
821#define PCI_VENDOR_ID_EFAR 0x1055 737#define PCI_VENDOR_ID_EFAR 0x1055
822#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 738#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130
823#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
824#define PCI_DEVICE_ID_EFAR_SLC90E66_2 0x9462
825#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 739#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463
826 740
827#define PCI_VENDOR_ID_MOTOROLA 0x1057 741#define PCI_VENDOR_ID_MOTOROLA 0x1057
828#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507
829#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 742#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001
830#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 743#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
831#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 744#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004
832#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 745#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
833#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 746#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802
834#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 747#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
835#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
836#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b 748#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
837#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 749#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
838 750
@@ -843,33 +755,19 @@
843#define PCI_DEVICE_ID_PROMISE_20262 0x4d38 755#define PCI_DEVICE_ID_PROMISE_20262 0x4d38
844#define PCI_DEVICE_ID_PROMISE_20263 0x0D38 756#define PCI_DEVICE_ID_PROMISE_20263 0x0D38
845#define PCI_DEVICE_ID_PROMISE_20268 0x4d68 757#define PCI_DEVICE_ID_PROMISE_20268 0x4d68
846#define PCI_DEVICE_ID_PROMISE_20268R 0x6268
847#define PCI_DEVICE_ID_PROMISE_20269 0x4d69 758#define PCI_DEVICE_ID_PROMISE_20269 0x4d69
848#define PCI_DEVICE_ID_PROMISE_20270 0x6268 759#define PCI_DEVICE_ID_PROMISE_20270 0x6268
849#define PCI_DEVICE_ID_PROMISE_20271 0x6269 760#define PCI_DEVICE_ID_PROMISE_20271 0x6269
850#define PCI_DEVICE_ID_PROMISE_20275 0x1275 761#define PCI_DEVICE_ID_PROMISE_20275 0x1275
851#define PCI_DEVICE_ID_PROMISE_20276 0x5275 762#define PCI_DEVICE_ID_PROMISE_20276 0x5275
852#define PCI_DEVICE_ID_PROMISE_20277 0x7275 763#define PCI_DEVICE_ID_PROMISE_20277 0x7275
853#define PCI_DEVICE_ID_PROMISE_5300 0x5300
854 764
855#define PCI_VENDOR_ID_N9 0x105d
856#define PCI_DEVICE_ID_N9_I128 0x2309
857#define PCI_DEVICE_ID_N9_I128_2 0x2339
858#define PCI_DEVICE_ID_N9_I128_T2R 0x493d
859 765
860#define PCI_VENDOR_ID_UMC 0x1060 766#define PCI_VENDOR_ID_UMC 0x1060
861#define PCI_DEVICE_ID_UMC_UM8673F 0x0101 767#define PCI_DEVICE_ID_UMC_UM8673F 0x0101
862#define PCI_DEVICE_ID_UMC_UM8891A 0x0891
863#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a 768#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
864#define PCI_DEVICE_ID_UMC_UM8886A 0x886a 769#define PCI_DEVICE_ID_UMC_UM8886A 0x886a
865#define PCI_DEVICE_ID_UMC_UM8881F 0x8881
866#define PCI_DEVICE_ID_UMC_UM8886F 0x8886
867#define PCI_DEVICE_ID_UMC_UM9017F 0x9017
868#define PCI_DEVICE_ID_UMC_UM8886N 0xe886
869#define PCI_DEVICE_ID_UMC_UM8891N 0xe891
870 770
871#define PCI_VENDOR_ID_X 0x1061
872#define PCI_DEVICE_ID_X_AGX016 0x0001
873 771
874#define PCI_VENDOR_ID_MYLEX 0x1069 772#define PCI_VENDOR_ID_MYLEX 0x1069
875#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 773#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001
@@ -880,37 +778,26 @@
880#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 778#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56
881#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 779#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166
882 780
883#define PCI_VENDOR_ID_PICOP 0x1066
884#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001
885#define PCI_DEVICE_ID_PICOP_PT80C524 0x8002
886 781
887#define PCI_VENDOR_ID_APPLE 0x106b 782#define PCI_VENDOR_ID_APPLE 0x106b
888#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 783#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001
889#define PCI_DEVICE_ID_APPLE_GC 0x0002
890#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e 784#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e
891#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 785#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018
892#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019
893#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 786#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
894#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 787#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
895#define PCI_DEVICE_ID_APPLE_KEYLARGO 0x0022
896#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 788#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024
897#define PCI_DEVICE_ID_APPLE_KEYLARGO_P 0x0025
898#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026
899#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 789#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
900#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d 790#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
901#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e 791#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
902#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
903#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 792#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
904#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033 793#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033
905#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 794#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034
906#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b 795#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b
907#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
908#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 796#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043
909#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b 797#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
910#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c 798#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c
911#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 799#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050
912#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 800#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
913#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052
914#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 801#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058
915#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 802#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059
916#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 803#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
@@ -923,12 +810,9 @@
923#define PCI_DEVICE_ID_YAMAHA_744 0x0010 810#define PCI_DEVICE_ID_YAMAHA_744 0x0010
924#define PCI_DEVICE_ID_YAMAHA_754 0x0012 811#define PCI_DEVICE_ID_YAMAHA_754 0x0012
925 812
926#define PCI_VENDOR_ID_NEXGEN 0x1074
927#define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78
928 813
929#define PCI_VENDOR_ID_QLOGIC 0x1077 814#define PCI_VENDOR_ID_QLOGIC 0x1077
930#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 815#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
931#define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022
932#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 816#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100
933#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 817#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200
934#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 818#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300
@@ -946,32 +830,20 @@
946#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 830#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001
947#define PCI_DEVICE_ID_CYRIX_5520 0x0002 831#define PCI_DEVICE_ID_CYRIX_5520 0x0002
948#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 832#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
949#define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101
950#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 833#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102
951#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 834#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103
952#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 835#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104
953 836
954#define PCI_VENDOR_ID_LEADTEK 0x107d
955#define PCI_DEVICE_ID_LEADTEK_805 0x0000
956 837
957#define PCI_VENDOR_ID_INTERPHASE 0x107e
958#define PCI_DEVICE_ID_INTERPHASE_5526 0x0004
959#define PCI_DEVICE_ID_INTERPHASE_55x6 0x0005
960#define PCI_DEVICE_ID_INTERPHASE_5575 0x0008
961 838
962#define PCI_VENDOR_ID_CONTAQ 0x1080 839#define PCI_VENDOR_ID_CONTAQ 0x1080
963#define PCI_DEVICE_ID_CONTAQ_82C599 0x0600
964#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 840#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693
965 841
966#define PCI_VENDOR_ID_FOREX 0x1083
967 842
968#define PCI_VENDOR_ID_OLICOM 0x108d 843#define PCI_VENDOR_ID_OLICOM 0x108d
969#define PCI_DEVICE_ID_OLICOM_OC3136 0x0001
970#define PCI_DEVICE_ID_OLICOM_OC2315 0x0011
971#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 844#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012
972#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 845#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013
973#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 846#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014
974#define PCI_DEVICE_ID_OLICOM_OC6151 0x0021
975 847
976#define PCI_VENDOR_ID_SUN 0x108e 848#define PCI_VENDOR_ID_SUN 0x108e
977#define PCI_DEVICE_ID_SUN_EBUS 0x1000 849#define PCI_DEVICE_ID_SUN_EBUS 0x1000
@@ -990,49 +862,31 @@
990#define PCI_DEVICE_ID_SUN_CASSINI 0xabba 862#define PCI_DEVICE_ID_SUN_CASSINI 0xabba
991 863
992#define PCI_VENDOR_ID_CMD 0x1095 864#define PCI_VENDOR_ID_CMD 0x1095
993#define PCI_DEVICE_ID_CMD_640 0x0640
994#define PCI_DEVICE_ID_CMD_643 0x0643 865#define PCI_DEVICE_ID_CMD_643 0x0643
995#define PCI_DEVICE_ID_CMD_646 0x0646 866#define PCI_DEVICE_ID_CMD_646 0x0646
996#define PCI_DEVICE_ID_CMD_647 0x0647
997#define PCI_DEVICE_ID_CMD_648 0x0648 867#define PCI_DEVICE_ID_CMD_648 0x0648
998#define PCI_DEVICE_ID_CMD_649 0x0649 868#define PCI_DEVICE_ID_CMD_649 0x0649
999#define PCI_DEVICE_ID_CMD_670 0x0670
1000#define PCI_DEVICE_ID_CMD_680 0x0680
1001 869
1002#define PCI_DEVICE_ID_SII_680 0x0680 870#define PCI_DEVICE_ID_SII_680 0x0680
1003#define PCI_DEVICE_ID_SII_3112 0x3112 871#define PCI_DEVICE_ID_SII_3112 0x3112
1004#define PCI_DEVICE_ID_SII_1210SA 0x0240 872#define PCI_DEVICE_ID_SII_1210SA 0x0240
1005 873
1006#define PCI_VENDOR_ID_VISION 0x1098
1007#define PCI_DEVICE_ID_VISION_QD8500 0x0001
1008#define PCI_DEVICE_ID_VISION_QD8580 0x0002
1009 874
1010#define PCI_VENDOR_ID_BROOKTREE 0x109e 875#define PCI_VENDOR_ID_BROOKTREE 0x109e
1011#define PCI_DEVICE_ID_BROOKTREE_848 0x0350
1012#define PCI_DEVICE_ID_BROOKTREE_849A 0x0351
1013#define PCI_DEVICE_ID_BROOKTREE_878_1 0x036e
1014#define PCI_DEVICE_ID_BROOKTREE_878 0x0878 876#define PCI_DEVICE_ID_BROOKTREE_878 0x0878
1015#define PCI_DEVICE_ID_BROOKTREE_879 0x0879 877#define PCI_DEVICE_ID_BROOKTREE_879 0x0879
1016#define PCI_DEVICE_ID_BROOKTREE_8474 0x8474
1017 878
1018#define PCI_VENDOR_ID_SIERRA 0x10a8
1019#define PCI_DEVICE_ID_SIERRA_STB 0x0000
1020 879
1021#define PCI_VENDOR_ID_SGI 0x10a9 880#define PCI_VENDOR_ID_SGI 0x10a9
1022#define PCI_DEVICE_ID_SGI_IOC3 0x0003 881#define PCI_DEVICE_ID_SGI_IOC3 0x0003
1023#define PCI_DEVICE_ID_SGI_IOC4 0x100a 882#define PCI_DEVICE_ID_SGI_IOC4 0x100a
1024#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 883#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002
1025 884
1026#define PCI_VENDOR_ID_ACC 0x10aa
1027#define PCI_DEVICE_ID_ACC_2056 0x0000
1028 885
1029#define PCI_VENDOR_ID_WINBOND 0x10ad 886#define PCI_VENDOR_ID_WINBOND 0x10ad
1030#define PCI_DEVICE_ID_WINBOND_83769 0x0001
1031#define PCI_DEVICE_ID_WINBOND_82C105 0x0105 887#define PCI_DEVICE_ID_WINBOND_82C105 0x0105
1032#define PCI_DEVICE_ID_WINBOND_83C553 0x0565 888#define PCI_DEVICE_ID_WINBOND_83C553 0x0565
1033 889
1034#define PCI_VENDOR_ID_DATABOOK 0x10b3
1035#define PCI_DEVICE_ID_DATABOOK_87144 0xb106
1036 890
1037#define PCI_VENDOR_ID_PLX 0x10b5 891#define PCI_VENDOR_ID_PLX 0x10b5
1038#define PCI_DEVICE_ID_PLX_R685 0x1030 892#define PCI_DEVICE_ID_PLX_R685 0x1030
@@ -1043,33 +897,19 @@
1043#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 897#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151
1044#define PCI_DEVICE_ID_PLX_R753 0x1152 898#define PCI_DEVICE_ID_PLX_R753 0x1152
1045#define PCI_DEVICE_ID_PLX_OLITEC 0x1187 899#define PCI_DEVICE_ID_PLX_OLITEC 0x1187
1046#define PCI_DEVICE_ID_PLX_9030 0x9030
1047#define PCI_DEVICE_ID_PLX_9050 0x9050 900#define PCI_DEVICE_ID_PLX_9050 0x9050
1048#define PCI_DEVICE_ID_PLX_9060 0x9060
1049#define PCI_DEVICE_ID_PLX_9060ES 0x906E
1050#define PCI_DEVICE_ID_PLX_9060SD 0x906D
1051#define PCI_DEVICE_ID_PLX_9080 0x9080 901#define PCI_DEVICE_ID_PLX_9080 0x9080
1052#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 902#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001
1053 903
1054#define PCI_VENDOR_ID_MADGE 0x10b6 904#define PCI_VENDOR_ID_MADGE 0x10b6
1055#define PCI_DEVICE_ID_MADGE_MK2 0x0002 905#define PCI_DEVICE_ID_MADGE_MK2 0x0002
1056#define PCI_DEVICE_ID_MADGE_C155S 0x1001
1057 906
1058#define PCI_VENDOR_ID_3COM 0x10b7 907#define PCI_VENDOR_ID_3COM 0x10b7
1059#define PCI_DEVICE_ID_3COM_3C985 0x0001 908#define PCI_DEVICE_ID_3COM_3C985 0x0001
1060#define PCI_DEVICE_ID_3COM_3C940 0x1700 909#define PCI_DEVICE_ID_3COM_3C940 0x1700
1061#define PCI_DEVICE_ID_3COM_3C339 0x3390 910#define PCI_DEVICE_ID_3COM_3C339 0x3390
1062#define PCI_DEVICE_ID_3COM_3C359 0x3590 911#define PCI_DEVICE_ID_3COM_3C359 0x3590
1063#define PCI_DEVICE_ID_3COM_3C590 0x5900
1064#define PCI_DEVICE_ID_3COM_3C595TX 0x5950
1065#define PCI_DEVICE_ID_3COM_3C595T4 0x5951
1066#define PCI_DEVICE_ID_3COM_3C595MII 0x5952
1067#define PCI_DEVICE_ID_3COM_3C940B 0x80eb 912#define PCI_DEVICE_ID_3COM_3C940B 0x80eb
1068#define PCI_DEVICE_ID_3COM_3C900TPO 0x9000
1069#define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001
1070#define PCI_DEVICE_ID_3COM_3C905TX 0x9050
1071#define PCI_DEVICE_ID_3COM_3C905T4 0x9051
1072#define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055
1073#define PCI_DEVICE_ID_3COM_3CR990 0x9900 913#define PCI_DEVICE_ID_3COM_3CR990 0x9900
1074#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 914#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902
1075#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 915#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903
@@ -1079,24 +919,11 @@
1079#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 919#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909
1080#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a 920#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a
1081 921
1082#define PCI_VENDOR_ID_SMC 0x10b8
1083#define PCI_DEVICE_ID_SMC_EPIC100 0x0005
1084 922
1085#define PCI_VENDOR_ID_AL 0x10b9 923#define PCI_VENDOR_ID_AL 0x10b9
1086#define PCI_DEVICE_ID_AL_M1445 0x1445
1087#define PCI_DEVICE_ID_AL_M1449 0x1449
1088#define PCI_DEVICE_ID_AL_M1451 0x1451
1089#define PCI_DEVICE_ID_AL_M1461 0x1461
1090#define PCI_DEVICE_ID_AL_M1489 0x1489
1091#define PCI_DEVICE_ID_AL_M1511 0x1511
1092#define PCI_DEVICE_ID_AL_M1513 0x1513
1093#define PCI_DEVICE_ID_AL_M1521 0x1521
1094#define PCI_DEVICE_ID_AL_M1523 0x1523
1095#define PCI_DEVICE_ID_AL_M1531 0x1531
1096#define PCI_DEVICE_ID_AL_M1533 0x1533 924#define PCI_DEVICE_ID_AL_M1533 0x1533
1097#define PCI_DEVICE_ID_AL_M1535 0x1535 925#define PCI_DEVICE_ID_AL_M1535 0x1535
1098#define PCI_DEVICE_ID_AL_M1541 0x1541 926#define PCI_DEVICE_ID_AL_M1541 0x1541
1099#define PCI_DEVICE_ID_AL_M1543 0x1543
1100#define PCI_DEVICE_ID_AL_M1563 0x1563 927#define PCI_DEVICE_ID_AL_M1563 0x1563
1101#define PCI_DEVICE_ID_AL_M1621 0x1621 928#define PCI_DEVICE_ID_AL_M1621 0x1621
1102#define PCI_DEVICE_ID_AL_M1631 0x1631 929#define PCI_DEVICE_ID_AL_M1631 0x1631
@@ -1109,49 +936,23 @@
1109#define PCI_DEVICE_ID_AL_M1681 0x1681 936#define PCI_DEVICE_ID_AL_M1681 0x1681
1110#define PCI_DEVICE_ID_AL_M1683 0x1683 937#define PCI_DEVICE_ID_AL_M1683 0x1683
1111#define PCI_DEVICE_ID_AL_M1689 0x1689 938#define PCI_DEVICE_ID_AL_M1689 0x1689
1112#define PCI_DEVICE_ID_AL_M3307 0x3307
1113#define PCI_DEVICE_ID_AL_M4803 0x5215
1114#define PCI_DEVICE_ID_AL_M5219 0x5219 939#define PCI_DEVICE_ID_AL_M5219 0x5219
1115#define PCI_DEVICE_ID_AL_M5228 0x5228 940#define PCI_DEVICE_ID_AL_M5228 0x5228
1116#define PCI_DEVICE_ID_AL_M5229 0x5229 941#define PCI_DEVICE_ID_AL_M5229 0x5229
1117#define PCI_DEVICE_ID_AL_M5237 0x5237
1118#define PCI_DEVICE_ID_AL_M5243 0x5243
1119#define PCI_DEVICE_ID_AL_M5451 0x5451 942#define PCI_DEVICE_ID_AL_M5451 0x5451
1120#define PCI_DEVICE_ID_AL_M7101 0x7101 943#define PCI_DEVICE_ID_AL_M7101 0x7101
1121 944
1122#define PCI_VENDOR_ID_MITSUBISHI 0x10ba
1123 945
1124#define PCI_VENDOR_ID_SURECOM 0x10bd
1125#define PCI_DEVICE_ID_SURECOM_NE34 0x0e34
1126 946
1127#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 947#define PCI_VENDOR_ID_NEOMAGIC 0x10c8
1128#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
1129#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
1130#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
1131#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
1132#define PCI_DEVICE_ID_NEOMAGIC_MAGICMEDIA_256AV 0x0005
1133#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZVPLUS 0x0083
1134#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 948#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
1135#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 949#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
1136#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 950#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
1137 951
1138#define PCI_VENDOR_ID_ASP 0x10cd
1139#define PCI_DEVICE_ID_ASP_ABP940 0x1200
1140#define PCI_DEVICE_ID_ASP_ABP940U 0x1300
1141#define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
1142
1143#define PCI_VENDOR_ID_MACRONIX 0x10d9
1144#define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512
1145#define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531
1146 952
1147#define PCI_VENDOR_ID_TCONRAD 0x10da 953#define PCI_VENDOR_ID_TCONRAD 0x10da
1148#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 954#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508
1149 955
1150#define PCI_VENDOR_ID_CERN 0x10dc
1151#define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001
1152#define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002
1153#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021
1154#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022
1155 956
1156#define PCI_VENDOR_ID_NVIDIA 0x10de 957#define PCI_VENDOR_ID_NVIDIA 0x10de
1157#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 958#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
@@ -1197,7 +998,6 @@
1197#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc 998#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc
1198#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce 999#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce
1199#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 1000#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1
1200#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
1201#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 1001#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4
1202#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 1002#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5
1203#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 1003#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6
@@ -1284,7 +1084,6 @@
1284#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F 1084#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F
1285#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 1085#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
1286#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 1086#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
1287#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
1288#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 1087#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280
1289#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 1088#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281
1290#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 1089#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282
@@ -1335,24 +1134,13 @@
1335#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 1134#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373
1336 1135
1337#define PCI_VENDOR_ID_IMS 0x10e0 1136#define PCI_VENDOR_ID_IMS 0x10e0
1338#define PCI_DEVICE_ID_IMS_8849 0x8849
1339#define PCI_DEVICE_ID_IMS_TT128 0x9128 1137#define PCI_DEVICE_ID_IMS_TT128 0x9128
1340#define PCI_DEVICE_ID_IMS_TT3D 0x9135 1138#define PCI_DEVICE_ID_IMS_TT3D 0x9135
1341 1139
1342#define PCI_VENDOR_ID_TEKRAM2 0x10e1
1343#define PCI_DEVICE_ID_TEKRAM2_690c 0x690c
1344 1140
1345#define PCI_VENDOR_ID_TUNDRA 0x10e3
1346#define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000
1347 1141
1348#define PCI_VENDOR_ID_AMCC 0x10e8
1349#define PCI_DEVICE_ID_AMCC_MYRINET 0x8043
1350#define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062
1351#define PCI_DEVICE_ID_AMCC_S5933 0x807d
1352#define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c
1353 1142
1354#define PCI_VENDOR_ID_INTERG 0x10ea 1143#define PCI_VENDOR_ID_INTERG 0x10ea
1355#define PCI_DEVICE_ID_INTERG_1680 0x1680
1356#define PCI_DEVICE_ID_INTERG_1682 0x1682 1144#define PCI_DEVICE_ID_INTERG_1682 0x1682
1357#define PCI_DEVICE_ID_INTERG_2000 0x2000 1145#define PCI_DEVICE_ID_INTERG_2000 0x2000
1358#define PCI_DEVICE_ID_INTERG_2010 0x2010 1146#define PCI_DEVICE_ID_INTERG_2010 0x2010
@@ -1360,32 +1148,23 @@
1360#define PCI_DEVICE_ID_INTERG_5050 0x5050 1148#define PCI_DEVICE_ID_INTERG_5050 0x5050
1361 1149
1362#define PCI_VENDOR_ID_REALTEK 0x10ec 1150#define PCI_VENDOR_ID_REALTEK 0x10ec
1363#define PCI_DEVICE_ID_REALTEK_8029 0x8029
1364#define PCI_DEVICE_ID_REALTEK_8129 0x8129
1365#define PCI_DEVICE_ID_REALTEK_8139 0x8139 1151#define PCI_DEVICE_ID_REALTEK_8139 0x8139
1366#define PCI_DEVICE_ID_REALTEK_8169 0x8169
1367 1152
1368#define PCI_VENDOR_ID_XILINX 0x10ee 1153#define PCI_VENDOR_ID_XILINX 0x10ee
1369#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0 1154#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0
1370#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1 1155#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1
1371#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2 1156#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2
1372#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3 1157#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3
1373#define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
1374#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 1158#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
1375#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 1159#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
1376#define PCI_DEVICE_ID_TURBOPAM 0x4020
1377 1160
1378#define PCI_VENDOR_ID_TRUEVISION 0x10fa
1379#define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c
1380 1161
1381#define PCI_VENDOR_ID_INIT 0x1101 1162#define PCI_VENDOR_ID_INIT 0x1101
1382#define PCI_DEVICE_ID_INIT_320P 0x9100
1383#define PCI_DEVICE_ID_INIT_360P 0x9500
1384 1163
1385#define PCI_VENDOR_ID_CREATIVE 0x1102 // duplicate: ECTIVA 1164#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
1386#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 1165#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002
1387 1166
1388#define PCI_VENDOR_ID_ECTIVA 0x1102 // duplicate: CREATIVE 1167#define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */
1389#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 1168#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
1390 1169
1391#define PCI_VENDOR_ID_TTI 0x1103 1170#define PCI_VENDOR_ID_TTI 0x1103
@@ -1395,7 +1174,7 @@
1395#define PCI_DEVICE_ID_TTI_HPT302 0x0006 1174#define PCI_DEVICE_ID_TTI_HPT302 0x0006
1396#define PCI_DEVICE_ID_TTI_HPT371 0x0007 1175#define PCI_DEVICE_ID_TTI_HPT371 0x0007
1397#define PCI_DEVICE_ID_TTI_HPT374 0x0008 1176#define PCI_DEVICE_ID_TTI_HPT374 0x0008
1398#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 // apparently a 372N variant? 1177#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */
1399 1178
1400#define PCI_VENDOR_ID_VIA 0x1106 1179#define PCI_VENDOR_ID_VIA 0x1106
1401#define PCI_DEVICE_ID_VIA_8763_0 0x0198 1180#define PCI_DEVICE_ID_VIA_8763_0 0x0198
@@ -1408,36 +1187,25 @@
1408#define PCI_DEVICE_ID_VIA_8363_0 0x0305 1187#define PCI_DEVICE_ID_VIA_8363_0 0x0305
1409#define PCI_DEVICE_ID_VIA_8371_0 0x0391 1188#define PCI_DEVICE_ID_VIA_8371_0 0x0391
1410#define PCI_DEVICE_ID_VIA_8501_0 0x0501 1189#define PCI_DEVICE_ID_VIA_8501_0 0x0501
1411#define PCI_DEVICE_ID_VIA_82C505 0x0505
1412#define PCI_DEVICE_ID_VIA_82C561 0x0561 1190#define PCI_DEVICE_ID_VIA_82C561 0x0561
1413#define PCI_DEVICE_ID_VIA_82C586_1 0x0571 1191#define PCI_DEVICE_ID_VIA_82C586_1 0x0571
1414#define PCI_DEVICE_ID_VIA_82C576 0x0576 1192#define PCI_DEVICE_ID_VIA_82C576 0x0576
1415#define PCI_DEVICE_ID_VIA_82C585 0x0585
1416#define PCI_DEVICE_ID_VIA_82C586_0 0x0586 1193#define PCI_DEVICE_ID_VIA_82C586_0 0x0586
1417#define PCI_DEVICE_ID_VIA_82C595 0x0595
1418#define PCI_DEVICE_ID_VIA_82C596 0x0596 1194#define PCI_DEVICE_ID_VIA_82C596 0x0596
1419#define PCI_DEVICE_ID_VIA_82C597_0 0x0597 1195#define PCI_DEVICE_ID_VIA_82C597_0 0x0597
1420#define PCI_DEVICE_ID_VIA_82C598_0 0x0598 1196#define PCI_DEVICE_ID_VIA_82C598_0 0x0598
1421#define PCI_DEVICE_ID_VIA_8601_0 0x0601 1197#define PCI_DEVICE_ID_VIA_8601_0 0x0601
1422#define PCI_DEVICE_ID_VIA_8605_0 0x0605 1198#define PCI_DEVICE_ID_VIA_8605_0 0x0605
1423#define PCI_DEVICE_ID_VIA_82C680 0x0680
1424#define PCI_DEVICE_ID_VIA_82C686 0x0686 1199#define PCI_DEVICE_ID_VIA_82C686 0x0686
1425#define PCI_DEVICE_ID_VIA_82C691_0 0x0691 1200#define PCI_DEVICE_ID_VIA_82C691_0 0x0691
1426#define PCI_DEVICE_ID_VIA_82C693 0x0693
1427#define PCI_DEVICE_ID_VIA_82C693_1 0x0698
1428#define PCI_DEVICE_ID_VIA_82C926 0x0926
1429#define PCI_DEVICE_ID_VIA_82C576_1 0x1571 1201#define PCI_DEVICE_ID_VIA_82C576_1 0x1571
1430#define PCI_DEVICE_ID_VIA_82C595_97 0x1595
1431#define PCI_DEVICE_ID_VIA_82C586_2 0x3038 1202#define PCI_DEVICE_ID_VIA_82C586_2 0x3038
1432#define PCI_DEVICE_ID_VIA_82C586_3 0x3040 1203#define PCI_DEVICE_ID_VIA_82C586_3 0x3040
1433#define PCI_DEVICE_ID_VIA_6305 0x3044
1434#define PCI_DEVICE_ID_VIA_82C596_3 0x3050 1204#define PCI_DEVICE_ID_VIA_82C596_3 0x3050
1435#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 1205#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051
1436#define PCI_DEVICE_ID_VIA_82C686_4 0x3057 1206#define PCI_DEVICE_ID_VIA_82C686_4 0x3057
1437#define PCI_DEVICE_ID_VIA_82C686_5 0x3058 1207#define PCI_DEVICE_ID_VIA_82C686_5 0x3058
1438#define PCI_DEVICE_ID_VIA_8233_5 0x3059 1208#define PCI_DEVICE_ID_VIA_8233_5 0x3059
1439#define PCI_DEVICE_ID_VIA_8233_7 0x3065
1440#define PCI_DEVICE_ID_VIA_82C686_6 0x3068
1441#define PCI_DEVICE_ID_VIA_8233_0 0x3074 1209#define PCI_DEVICE_ID_VIA_8233_0 0x3074
1442#define PCI_DEVICE_ID_VIA_8633_0 0x3091 1210#define PCI_DEVICE_ID_VIA_8633_0 0x3091
1443#define PCI_DEVICE_ID_VIA_8367_0 0x3099 1211#define PCI_DEVICE_ID_VIA_8367_0 0x3099
@@ -1455,38 +1223,23 @@
1455#define PCI_DEVICE_ID_VIA_XN266 0x3156 1223#define PCI_DEVICE_ID_VIA_XN266 0x3156
1456#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 1224#define PCI_DEVICE_ID_VIA_8754C_0 0x3168
1457#define PCI_DEVICE_ID_VIA_8235 0x3177 1225#define PCI_DEVICE_ID_VIA_8235 0x3177
1458#define PCI_DEVICE_ID_VIA_P4N333 0x3178
1459#define PCI_DEVICE_ID_VIA_8385_0 0x3188 1226#define PCI_DEVICE_ID_VIA_8385_0 0x3188
1460#define PCI_DEVICE_ID_VIA_8377_0 0x3189 1227#define PCI_DEVICE_ID_VIA_8377_0 0x3189
1461#define PCI_DEVICE_ID_VIA_8378_0 0x3205 1228#define PCI_DEVICE_ID_VIA_8378_0 0x3205
1462#define PCI_DEVICE_ID_VIA_8783_0 0x3208 1229#define PCI_DEVICE_ID_VIA_8783_0 0x3208
1463#define PCI_DEVICE_ID_VIA_P4M400 0x3209
1464#define PCI_DEVICE_ID_VIA_8237 0x3227 1230#define PCI_DEVICE_ID_VIA_8237 0x3227
1465#define PCI_DEVICE_ID_VIA_3296_0 0x0296 1231#define PCI_DEVICE_ID_VIA_3296_0 0x0296
1466#define PCI_DEVICE_ID_VIA_86C100A 0x6100
1467#define PCI_DEVICE_ID_VIA_8231 0x8231 1232#define PCI_DEVICE_ID_VIA_8231 0x8231
1468#define PCI_DEVICE_ID_VIA_8231_4 0x8235 1233#define PCI_DEVICE_ID_VIA_8231_4 0x8235
1469#define PCI_DEVICE_ID_VIA_8365_1 0x8305 1234#define PCI_DEVICE_ID_VIA_8365_1 0x8305
1470#define PCI_DEVICE_ID_VIA_8371_1 0x8391 1235#define PCI_DEVICE_ID_VIA_8371_1 0x8391
1471#define PCI_DEVICE_ID_VIA_8501_1 0x8501
1472#define PCI_DEVICE_ID_VIA_82C597_1 0x8597
1473#define PCI_DEVICE_ID_VIA_82C598_1 0x8598 1236#define PCI_DEVICE_ID_VIA_82C598_1 0x8598
1474#define PCI_DEVICE_ID_VIA_8601_1 0x8601
1475#define PCI_DEVICE_ID_VIA_8505_1 0x8605
1476#define PCI_DEVICE_ID_VIA_8633_1 0xB091
1477#define PCI_DEVICE_ID_VIA_8367_1 0xB099
1478#define PCI_DEVICE_ID_VIA_P4X266_1 0xB101
1479#define PCI_DEVICE_ID_VIA_8615_1 0xB103
1480#define PCI_DEVICE_ID_VIA_8361_1 0xB112
1481#define PCI_DEVICE_ID_VIA_8235_1 0xB168
1482#define PCI_DEVICE_ID_VIA_838X_1 0xB188 1237#define PCI_DEVICE_ID_VIA_838X_1 0xB188
1483#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 1238#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198
1484 1239
1485#define PCI_VENDOR_ID_SIEMENS 0x110A 1240#define PCI_VENDOR_ID_SIEMENS 0x110A
1486#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 1241#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102
1487 1242
1488#define PCI_VENDOR_ID_SMC2 0x1113
1489#define PCI_DEVICE_ID_SMC2_1211TX 0x1211
1490 1243
1491#define PCI_VENDOR_ID_VORTEX 0x1119 1244#define PCI_VENDOR_ID_VORTEX 0x1119
1492#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 1245#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000
@@ -1509,18 +1262,6 @@
1509#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 1262#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103
1510#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 1263#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104
1511#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 1264#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105
1512#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
1513#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
1514#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
1515#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
1516#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
1517#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
1518#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
1519#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
1520#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
1521#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
1522#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
1523#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
1524 1265
1525#define PCI_VENDOR_ID_EF 0x111a 1266#define PCI_VENDOR_ID_EF 0x111a
1526#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 1267#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
@@ -1532,21 +1273,15 @@
1532#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 1273#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
1533 1274
1534#define PCI_VENDOR_ID_FORE 0x1127 1275#define PCI_VENDOR_ID_FORE 0x1127
1535#define PCI_DEVICE_ID_FORE_PCA200PC 0x0210
1536#define PCI_DEVICE_ID_FORE_PCA200E 0x0300 1276#define PCI_DEVICE_ID_FORE_PCA200E 0x0300
1537 1277
1538#define PCI_VENDOR_ID_IMAGINGTECH 0x112f
1539#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
1540 1278
1541#define PCI_VENDOR_ID_PHILIPS 0x1131 1279#define PCI_VENDOR_ID_PHILIPS 0x1131
1542#define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145
1543#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 1280#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146
1544#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 1281#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730
1545 1282
1546#define PCI_VENDOR_ID_EICON 0x1133 1283#define PCI_VENDOR_ID_EICON 0x1133
1547#define PCI_DEVICE_ID_EICON_DIVA20PRO 0xe001
1548#define PCI_DEVICE_ID_EICON_DIVA20 0xe002 1284#define PCI_DEVICE_ID_EICON_DIVA20 0xe002
1549#define PCI_DEVICE_ID_EICON_DIVA20PRO_U 0xe003
1550#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 1285#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004
1551#define PCI_DEVICE_ID_EICON_DIVA201 0xe005 1286#define PCI_DEVICE_ID_EICON_DIVA201 0xe005
1552#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b 1287#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b
@@ -1558,35 +1293,17 @@
1558#define PCI_VENDOR_ID_ZIATECH 0x1138 1293#define PCI_VENDOR_ID_ZIATECH 0x1138
1559#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 1294#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
1560 1295
1561#define PCI_VENDOR_ID_CYCLONE 0x113c
1562#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
1563 1296
1564#define PCI_VENDOR_ID_ALLIANCE 0x1142
1565#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
1566#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
1567#define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424
1568#define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d
1569 1297
1570#define PCI_VENDOR_ID_SYSKONNECT 0x1148 1298#define PCI_VENDOR_ID_SYSKONNECT 0x1148
1571#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000
1572#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 1299#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
1573#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 1300#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300
1574#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 1301#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320
1575#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 1302#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400
1576#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 1303#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500
1577 1304
1578#define PCI_VENDOR_ID_VMIC 0x114a
1579#define PCI_DEVICE_ID_VMIC_VME 0x7587
1580 1305
1581#define PCI_VENDOR_ID_DIGI 0x114f 1306#define PCI_VENDOR_ID_DIGI 0x114f
1582#define PCI_DEVICE_ID_DIGI_EPC 0x0002
1583#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003
1584#define PCI_DEVICE_ID_DIGI_XEM 0x0004
1585#define PCI_DEVICE_ID_DIGI_XR 0x0005
1586#define PCI_DEVICE_ID_DIGI_CX 0x0006
1587#define PCI_DEVICE_ID_DIGI_XRJ 0x0009
1588#define PCI_DEVICE_ID_DIGI_EPCJ 0x000a
1589#define PCI_DEVICE_ID_DIGI_XR_920 0x0027
1590#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 1307#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070
1591#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 1308#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071
1592#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 1309#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072
@@ -1596,23 +1313,15 @@
1596#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA 1313#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA
1597#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB 1314#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB
1598 1315
1599#define PCI_VENDOR_ID_MUTECH 0x1159
1600#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001
1601 1316
1602#define PCI_VENDOR_ID_XIRCOM 0x115d 1317#define PCI_VENDOR_ID_XIRCOM 0x115d
1603#define PCI_DEVICE_ID_XIRCOM_X3201_ETH 0x0003
1604#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 1318#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101
1605#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 1319#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103
1606 1320
1607#define PCI_VENDOR_ID_RENDITION 0x1163
1608#define PCI_DEVICE_ID_RENDITION_VERITE 0x0001
1609#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
1610 1321
1611#define PCI_VENDOR_ID_SERVERWORKS 0x1166 1322#define PCI_VENDOR_ID_SERVERWORKS 0x1166
1612#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 1323#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008
1613#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 1324#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
1614#define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010
1615#define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011
1616#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 1325#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
1617#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 1326#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200
1618#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 1327#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201
@@ -1622,13 +1331,7 @@
1622#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 1331#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
1623#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 1332#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
1624#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 1333#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
1625#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
1626#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB
1627#define PCI_DEVICE_ID_SERVERWORKS_CSB6USB 0x0221
1628#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227 1334#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227
1629#define PCI_DEVICE_ID_SERVERWORKS_GCLE 0x0225
1630#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227
1631#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230
1632 1335
1633#define PCI_VENDOR_ID_SBE 0x1176 1336#define PCI_VENDOR_ID_SBE 0x1176
1634#define PCI_DEVICE_ID_SBE_WANXL100 0x0301 1337#define PCI_DEVICE_ID_SBE_WANXL100 0x0301
@@ -1639,17 +1342,12 @@
1639#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 1342#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102
1640#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 1343#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
1641#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 1344#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
1642#define PCI_DEVICE_ID_TOSHIBA_601 0x0601
1643#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a 1345#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
1644#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603
1645#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_B 0x060a
1646#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f 1346#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
1647#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 1347#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617
1648 1348
1649#define PCI_VENDOR_ID_TOSHIBA_2 0x102f 1349#define PCI_VENDOR_ID_TOSHIBA_2 0x102f
1650#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a
1651#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 1350#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030
1652#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180
1653#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 1351#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108
1654#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3 1352#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3
1655 1353
@@ -1664,7 +1362,6 @@
1664#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 1362#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00
1665 1363
1666#define PCI_VENDOR_ID_ARTOP 0x1191 1364#define PCI_VENDOR_ID_ARTOP 0x1191
1667#define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004
1668#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 1365#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005
1669#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 1366#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006
1670#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 1367#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007
@@ -1677,16 +1374,11 @@
1677#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 1374#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040
1678#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 1375#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050
1679#define PCI_DEVICE_ID_ARTOP_8060 0x8060 1376#define PCI_DEVICE_ID_ARTOP_8060 0x8060
1680#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080
1681#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081
1682#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a
1683 1377
1684#define PCI_VENDOR_ID_ZEITNET 0x1193 1378#define PCI_VENDOR_ID_ZEITNET 0x1193
1685#define PCI_DEVICE_ID_ZEITNET_1221 0x0001 1379#define PCI_DEVICE_ID_ZEITNET_1221 0x0001
1686#define PCI_DEVICE_ID_ZEITNET_1225 0x0002 1380#define PCI_DEVICE_ID_ZEITNET_1225 0x0002
1687 1381
1688#define PCI_VENDOR_ID_OMEGA 0x119b
1689#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
1690 1382
1691#define PCI_VENDOR_ID_FUJITSU_ME 0x119e 1383#define PCI_VENDOR_ID_FUJITSU_ME 0x119e
1692#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 1384#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001
@@ -1696,61 +1388,41 @@
1696#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 1388#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
1697 1389
1698#define PCI_VENDOR_ID_MARVELL 0x11ab 1390#define PCI_VENDOR_ID_MARVELL 0x11ab
1699#define PCI_DEVICE_ID_MARVELL_GT64011 0x4146
1700#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
1701#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 1391#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
1702#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 1392#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
1703#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 1393#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
1704#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652 1394#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652
1705#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653 1395#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653
1706 1396
1707#define PCI_VENDOR_ID_LITEON 0x11ad
1708#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002
1709 1397
1710#define PCI_VENDOR_ID_V3 0x11b0 1398#define PCI_VENDOR_ID_V3 0x11b0
1711#define PCI_DEVICE_ID_V3_V960 0x0001 1399#define PCI_DEVICE_ID_V3_V960 0x0001
1712#define PCI_DEVICE_ID_V3_V350 0x0001
1713#define PCI_DEVICE_ID_V3_V961 0x0002
1714#define PCI_DEVICE_ID_V3_V351 0x0002 1400#define PCI_DEVICE_ID_V3_V351 0x0002
1715 1401
1716#define PCI_VENDOR_ID_NP 0x11bc
1717#define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001
1718 1402
1719#define PCI_VENDOR_ID_ATT 0x11c1 1403#define PCI_VENDOR_ID_ATT 0x11c1
1720#define PCI_DEVICE_ID_ATT_L56XMF 0x0440
1721#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 1404#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
1722 1405
1723#define PCI_VENDOR_ID_NEC2 0x11c3 /* NEC (2nd) */
1724 1406
1725#define PCI_VENDOR_ID_SPECIALIX 0x11cb 1407#define PCI_VENDOR_ID_SPECIALIX 0x11cb
1726#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 1408#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
1727#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000
1728#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 1409#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
1729#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 1410#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
1730 1411
1731#define PCI_VENDOR_ID_AURAVISION 0x11d1
1732#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
1733 1412
1734#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 1413#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
1735#define PCI_DEVICE_ID_AD1889JS 0x1889 1414#define PCI_DEVICE_ID_AD1889JS 0x1889
1736 1415
1737#define PCI_VENDOR_ID_IKON 0x11d5
1738#define PCI_DEVICE_ID_IKON_10115 0x0115
1739#define PCI_DEVICE_ID_IKON_10117 0x0117
1740 1416
1741#define PCI_VENDOR_ID_SEGA 0x11db
1742#define PCI_DEVICE_ID_SEGA_BBA 0x1234 1417#define PCI_DEVICE_ID_SEGA_BBA 0x1234
1743 1418
1744#define PCI_VENDOR_ID_ZORAN 0x11de 1419#define PCI_VENDOR_ID_ZORAN 0x11de
1745#define PCI_DEVICE_ID_ZORAN_36057 0x6057 1420#define PCI_DEVICE_ID_ZORAN_36057 0x6057
1746#define PCI_DEVICE_ID_ZORAN_36120 0x6120 1421#define PCI_DEVICE_ID_ZORAN_36120 0x6120
1747 1422
1748#define PCI_VENDOR_ID_KINETIC 0x11f4
1749#define PCI_DEVICE_ID_KINETIC_2915 0x2915
1750 1423
1751#define PCI_VENDOR_ID_COMPEX 0x11f6 1424#define PCI_VENDOR_ID_COMPEX 0x11f6
1752#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 1425#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
1753#define PCI_DEVICE_ID_COMPEX_RL2000 0x1401
1754 1426
1755#define PCI_VENDOR_ID_RP 0x11fe 1427#define PCI_VENDOR_ID_RP 0x11fe
1756#define PCI_DEVICE_ID_RP32INTF 0x0001 1428#define PCI_DEVICE_ID_RP32INTF 0x0001
@@ -1764,7 +1436,6 @@
1764#define PCI_DEVICE_ID_RP16SNI 0x0009 1436#define PCI_DEVICE_ID_RP16SNI 0x0009
1765#define PCI_DEVICE_ID_RPP4 0x000A 1437#define PCI_DEVICE_ID_RPP4 0x000A
1766#define PCI_DEVICE_ID_RPP8 0x000B 1438#define PCI_DEVICE_ID_RPP8 0x000B
1767#define PCI_DEVICE_ID_RP8M 0x000C
1768#define PCI_DEVICE_ID_RP4M 0x000D 1439#define PCI_DEVICE_ID_RP4M 0x000D
1769#define PCI_DEVICE_ID_RP2_232 0x000E 1440#define PCI_DEVICE_ID_RP2_232 0x000E
1770#define PCI_DEVICE_ID_RP2_422 0x000F 1441#define PCI_DEVICE_ID_RP2_422 0x000F
@@ -1792,10 +1463,6 @@
1792#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 1463#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320
1793#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 1464#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321
1794 1465
1795/* Allied Telesyn */
1796#define PCI_VENDOR_ID_AT 0x1259
1797#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
1798
1799#define PCI_VENDOR_ID_ESSENTIAL 0x120f 1466#define PCI_VENDOR_ID_ESSENTIAL 0x120f
1800#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 1467#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001
1801 1468
@@ -1812,10 +1479,7 @@
1812#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 1479#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005
1813#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 1480#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
1814 1481
1815#define PCI_VENDOR_ID_SIGMADES 0x1236
1816#define PCI_DEVICE_ID_SIGMADES_6425 0x6401
1817 1482
1818#define PCI_VENDOR_ID_CCUBE 0x123f
1819 1483
1820#define PCI_VENDOR_ID_AVM 0x1244 1484#define PCI_VENDOR_ID_AVM 0x1244
1821#define PCI_DEVICE_ID_AVM_B1 0x0700 1485#define PCI_DEVICE_ID_AVM_B1 0x0700
@@ -1825,19 +1489,8 @@
1825#define PCI_DEVICE_ID_AVM_C2 0x1100 1489#define PCI_DEVICE_ID_AVM_C2 0x1100
1826#define PCI_DEVICE_ID_AVM_T1 0x1200 1490#define PCI_DEVICE_ID_AVM_T1 0x1200
1827 1491
1828#define PCI_VENDOR_ID_DIPIX 0x1246
1829 1492
1830#define PCI_VENDOR_ID_STALLION 0x124d 1493#define PCI_VENDOR_ID_STALLION 0x124d
1831#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
1832#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
1833#define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003
1834
1835#define PCI_VENDOR_ID_OPTIBASE 0x1255
1836#define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110
1837#define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210
1838#define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110
1839#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120
1840#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130
1841 1494
1842/* Allied Telesyn */ 1495/* Allied Telesyn */
1843#define PCI_VENDOR_ID_AT 0x1259 1496#define PCI_VENDOR_ID_AT 0x1259
@@ -1846,7 +1499,6 @@
1846 1499
1847#define PCI_VENDOR_ID_ESS 0x125d 1500#define PCI_VENDOR_ID_ESS 0x125d
1848#define PCI_DEVICE_ID_ESS_ESS1968 0x1968 1501#define PCI_DEVICE_ID_ESS_ESS1968 0x1968
1849#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969
1850#define PCI_DEVICE_ID_ESS_ESS1978 0x1978 1502#define PCI_DEVICE_ID_ESS_ESS1978 0x1978
1851#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988 1503#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988
1852#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989 1504#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989
@@ -1859,11 +1511,7 @@
1859 1511
1860#define PCI_VENDOR_ID_SATSAGEM 0x1267 1512#define PCI_VENDOR_ID_SATSAGEM 0x1267
1861#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 1513#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016
1862#define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352
1863#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
1864 1514
1865#define PCI_VENDOR_ID_HUGHES 0x1273
1866#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002
1867 1515
1868#define PCI_VENDOR_ID_ENSONIQ 0x1274 1516#define PCI_VENDOR_ID_ENSONIQ 0x1274
1869#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 1517#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
@@ -1884,13 +1532,10 @@
1884#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 1532#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886
1885 1533
1886/* formerly Platform Tech */ 1534/* formerly Platform Tech */
1887#define PCI_VENDOR_ID_ESS_OLD 0x1285
1888#define PCI_DEVICE_ID_ESS_ESS0100 0x0100 1535#define PCI_DEVICE_ID_ESS_ESS0100 0x0100
1889 1536
1890#define PCI_VENDOR_ID_ALTEON 0x12ae 1537#define PCI_VENDOR_ID_ALTEON 0x12ae
1891#define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001
1892 1538
1893#define PCI_VENDOR_ID_USR 0x12B9
1894 1539
1895#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 1540#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4
1896#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 1541#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001
@@ -1905,8 +1550,6 @@
1905#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A 1550#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A
1906#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B 1551#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B
1907 1552
1908#define PCI_VENDOR_ID_PICTUREL 0x12c5
1909#define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081
1910 1553
1911#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 1554#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
1912#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 1555#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
@@ -1928,8 +1571,6 @@
1928#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 1571#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8
1929#define PCI_DEVICE_ID_LML_33R10 0x8a02 1572#define PCI_DEVICE_ID_LML_33R10 0x8a02
1930 1573
1931#define PCI_VENDOR_ID_CBOARDS 0x1307
1932#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
1933 1574
1934#define PCI_VENDOR_ID_SIIG 0x131f 1575#define PCI_VENDOR_ID_SIIG 0x131f
1935#define PCI_SUBVENDOR_ID_SIIG 0x131f 1576#define PCI_SUBVENDOR_ID_SIIG 0x131f
@@ -1973,7 +1614,6 @@
1973#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 1614#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
1974 1615
1975#define PCI_VENDOR_ID_RADISYS 0x1331 1616#define PCI_VENDOR_ID_RADISYS 0x1331
1976#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
1977 1617
1978#define PCI_VENDOR_ID_DOMEX 0x134a 1618#define PCI_VENDOR_ID_DOMEX 0x134a
1979#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 1619#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
@@ -1981,8 +1621,6 @@
1981#define PCI_VENDOR_ID_QUATECH 0x135C 1621#define PCI_VENDOR_ID_QUATECH 0x135C
1982#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 1622#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010
1983#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 1623#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020
1984#define PCI_DEVICE_ID_QUATECH_DSC200 0x0030
1985#define PCI_DEVICE_ID_QUATECH_QSC200 0x0040
1986#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 1624#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050
1987#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 1625#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060
1988 1626
@@ -2001,7 +1639,6 @@
2001#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 1639#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106
2002#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 1640#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107
2003#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 1641#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108
2004#define PCI_SUBDEVICE_ID_HYPERCOPE_PLEXUS 0x0109
2005 1642
2006#define PCI_VENDOR_ID_KAWASAKI 0x136b 1643#define PCI_VENDOR_ID_KAWASAKI 0x136b
2007#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 1644#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01
@@ -2015,12 +1652,9 @@
2015#define PCI_DEVICE_ID_LMC_SSI 0x0005 1652#define PCI_DEVICE_ID_LMC_SSI 0x0005
2016#define PCI_DEVICE_ID_LMC_T1 0x0006 1653#define PCI_DEVICE_ID_LMC_T1 0x0006
2017 1654
2018#define PCI_VENDOR_ID_MARIAN 0x1382
2019#define PCI_DEVICE_ID_MARIAN_PRODIF_PLUS 0x2048
2020 1655
2021#define PCI_VENDOR_ID_NETGEAR 0x1385 1656#define PCI_VENDOR_ID_NETGEAR 0x1385
2022#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a 1657#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
2023#define PCI_DEVICE_ID_NETGEAR_GA622 0x622a
2024 1658
2025#define PCI_VENDOR_ID_APPLICOM 0x1389 1659#define PCI_VENDOR_ID_APPLICOM 0x1389
2026#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 1660#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001
@@ -2043,9 +1677,6 @@
2043#define PCI_DEVICE_ID_MOXA_CP134U 0x1340 1677#define PCI_DEVICE_ID_MOXA_CP134U 0x1340
2044#define PCI_DEVICE_ID_MOXA_C168 0x1680 1678#define PCI_DEVICE_ID_MOXA_C168 0x1680
2045#define PCI_DEVICE_ID_MOXA_CP168U 0x1681 1679#define PCI_DEVICE_ID_MOXA_CP168U 0x1681
2046#define PCI_DEVICE_ID_MOXA_CP204J 0x2040
2047#define PCI_DEVICE_ID_MOXA_C218 0x2180
2048#define PCI_DEVICE_ID_MOXA_C320 0x3200
2049 1680
2050#define PCI_VENDOR_ID_CCD 0x1397 1681#define PCI_VENDOR_ID_CCD 0x1397
2051#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 1682#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0
@@ -2066,9 +1697,7 @@
2066 1697
2067#define PCI_VENDOR_ID_MICROGATE 0x13c0 1698#define PCI_VENDOR_ID_MICROGATE 0x13c0
2068#define PCI_DEVICE_ID_MICROGATE_USC 0x0010 1699#define PCI_DEVICE_ID_MICROGATE_USC 0x0010
2069#define PCI_DEVICE_ID_MICROGATE_SCC 0x0020
2070#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030 1700#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030
2071#define PCI_DEVICE_ID_MICROGATE_USC2 0x0210
2072 1701
2073#define PCI_VENDOR_ID_3WARE 0x13C1 1702#define PCI_VENDOR_ID_3WARE 0x13C1
2074#define PCI_DEVICE_ID_3WARE_1000 0x1000 1703#define PCI_DEVICE_ID_3WARE_1000 0x1000
@@ -2119,10 +1748,6 @@
2119 1748
2120#define PCI_VENDOR_ID_SAMSUNG 0x144d 1749#define PCI_VENDOR_ID_SAMSUNG 0x144d
2121 1750
2122#define PCI_VENDOR_ID_AIRONET 0x14b9
2123#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001
2124#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see
2125#define PCI_DEVICE_ID_AIRONET_4500 0x4800 // drivers/net/aironet4500_card.c
2126 1751
2127#define PCI_VENDOR_ID_TITAN 0x14D2 1752#define PCI_VENDOR_ID_TITAN 0x14D2
2128#define PCI_DEVICE_ID_TITAN_010L 0x8001 1753#define PCI_DEVICE_ID_TITAN_010L 0x8001
@@ -2141,8 +1766,6 @@
2141#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 1766#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400
2142#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 1767#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402
2143 1768
2144#define PCI_VENDOR_ID_SIPACKETS 0x14d9
2145#define PCI_DEVICE_ID_SP_HT 0x0010
2146 1769
2147#define PCI_VENDOR_ID_AFAVLAB 0x14db 1770#define PCI_VENDOR_ID_AFAVLAB 0x14db
2148#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 1771#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180
@@ -2165,11 +1788,13 @@
2165#define PCI_DEVICE_ID_TIGON3_5721 0x1659 1788#define PCI_DEVICE_ID_TIGON3_5721 0x1659
2166#define PCI_DEVICE_ID_TIGON3_5705M 0x165d 1789#define PCI_DEVICE_ID_TIGON3_5705M 0x165d
2167#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e 1790#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e
1791#define PCI_DEVICE_ID_TIGON3_5714 0x1668
2168#define PCI_DEVICE_ID_TIGON3_5780 0x166a 1792#define PCI_DEVICE_ID_TIGON3_5780 0x166a
2169#define PCI_DEVICE_ID_TIGON3_5780S 0x166b 1793#define PCI_DEVICE_ID_TIGON3_5780S 0x166b
2170#define PCI_DEVICE_ID_TIGON3_5705F 0x166e 1794#define PCI_DEVICE_ID_TIGON3_5705F 0x166e
2171#define PCI_DEVICE_ID_TIGON3_5750 0x1676 1795#define PCI_DEVICE_ID_TIGON3_5750 0x1676
2172#define PCI_DEVICE_ID_TIGON3_5751 0x1677 1796#define PCI_DEVICE_ID_TIGON3_5751 0x1677
1797#define PCI_DEVICE_ID_TIGON3_5715 0x1678
2173#define PCI_DEVICE_ID_TIGON3_5750M 0x167c 1798#define PCI_DEVICE_ID_TIGON3_5750M 0x167c
2174#define PCI_DEVICE_ID_TIGON3_5751M 0x167d 1799#define PCI_DEVICE_ID_TIGON3_5751M 0x167d
2175#define PCI_DEVICE_ID_TIGON3_5751F 0x167e 1800#define PCI_DEVICE_ID_TIGON3_5751F 0x167e
@@ -2207,8 +1832,6 @@
2207 1832
2208#define PCI_VENDOR_ID_CHELSIO 0x1425 1833#define PCI_VENDOR_ID_CHELSIO 0x1425
2209 1834
2210#define PCI_VENDOR_ID_MIPS 0x153f
2211#define PCI_DEVICE_ID_SOC_IT 0x0001
2212 1835
2213#define PCI_VENDOR_ID_SYBA 0x1592 1836#define PCI_VENDOR_ID_SYBA 0x1592
2214#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 1837#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
@@ -2228,15 +1851,7 @@
2228#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 1851#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
2229 1852
2230#define PCI_VENDOR_ID_PDC 0x15e9 1853#define PCI_VENDOR_ID_PDC 0x15e9
2231#define PCI_DEVICE_ID_PDC_1841 0x1841
2232 1854
2233#define PCI_VENDOR_ID_MACROLINK 0x15ed
2234#define PCI_DEVICE_ID_MACROLINK_MCCS8 0x1000
2235#define PCI_DEVICE_ID_MACROLINK_MCCS 0x1001
2236#define PCI_DEVICE_ID_MACROLINK_MCCS8H 0x1002
2237#define PCI_DEVICE_ID_MACROLINK_MCCSH 0x1003
2238#define PCI_DEVICE_ID_MACROLINK_MCCR8 0x2000
2239#define PCI_DEVICE_ID_MACROLINK_MCCR 0x2001
2240 1855
2241#define PCI_VENDOR_ID_FARSITE 0x1619 1856#define PCI_VENDOR_ID_FARSITE 0x1619
2242#define PCI_DEVICE_ID_FARSITE_T2P 0x0400 1857#define PCI_DEVICE_ID_FARSITE_T2P 0x0400
@@ -2254,7 +1869,6 @@
2254#define PCI_DEVICE_ID_REVOLUTION 0x0044 1869#define PCI_DEVICE_ID_REVOLUTION 0x0044
2255 1870
2256#define PCI_VENDOR_ID_LINKSYS 0x1737 1871#define PCI_VENDOR_ID_LINKSYS 0x1737
2257#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032
2258#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 1872#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064
2259 1873
2260#define PCI_VENDOR_ID_ALTIMA 0x173b 1874#define PCI_VENDOR_ID_ALTIMA 0x173b
@@ -2269,7 +1883,6 @@
2269#define PCI_DEVICE_ID_HERC_WIN 0x5732 1883#define PCI_DEVICE_ID_HERC_WIN 0x5732
2270#define PCI_DEVICE_ID_HERC_UNI 0x5832 1884#define PCI_DEVICE_ID_HERC_UNI 0x5832
2271 1885
2272#define PCI_VENDOR_ID_INFINICON 0x1820
2273 1886
2274#define PCI_VENDOR_ID_SITECOM 0x182d 1887#define PCI_VENDOR_ID_SITECOM 0x182d
2275#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 1888#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069
@@ -2279,8 +1892,6 @@
2279#define PCI_VENDOR_ID_TDI 0x192E 1892#define PCI_VENDOR_ID_TDI 0x192E
2280#define PCI_DEVICE_ID_TDI_EHCI 0x0101 1893#define PCI_DEVICE_ID_TDI_EHCI 0x0101
2281 1894
2282#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
2283#define PCI_DEVICE_ID_SYMPHONY_101 0x0001
2284 1895
2285#define PCI_VENDOR_ID_TEKRAM 0x1de1 1896#define PCI_VENDOR_ID_TEKRAM 0x1de1
2286#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 1897#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
@@ -2289,70 +1900,33 @@
2289#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 1900#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013
2290 1901
2291#define PCI_VENDOR_ID_3DLABS 0x3d3d 1902#define PCI_VENDOR_ID_3DLABS 0x3d3d
2292#define PCI_DEVICE_ID_3DLABS_300SX 0x0001
2293#define PCI_DEVICE_ID_3DLABS_500TX 0x0002
2294#define PCI_DEVICE_ID_3DLABS_DELTA 0x0003
2295#define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004
2296#define PCI_DEVICE_ID_3DLABS_MX 0x0006
2297#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 1903#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007
2298#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008
2299#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 1904#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009
2300 1905
2301#define PCI_VENDOR_ID_AVANCE 0x4005
2302#define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064
2303#define PCI_DEVICE_ID_AVANCE_2302 0x2302
2304 1906
2305#define PCI_VENDOR_ID_AKS 0x416c 1907#define PCI_VENDOR_ID_AKS 0x416c
2306#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 1908#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100
2307#define PCI_DEVICE_ID_AKS_CPC 0x0200
2308 1909
2309#define PCI_VENDOR_ID_REDCREEK 0x4916
2310#define PCI_DEVICE_ID_RC45 0x1960
2311 1910
2312#define PCI_VENDOR_ID_NETVIN 0x4a14
2313#define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000
2314 1911
2315#define PCI_VENDOR_ID_S3 0x5333 1912#define PCI_VENDOR_ID_S3 0x5333
2316#define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551
2317#define PCI_DEVICE_ID_S3_ViRGE 0x5631
2318#define PCI_DEVICE_ID_S3_TRIO 0x8811 1913#define PCI_DEVICE_ID_S3_TRIO 0x8811
2319#define PCI_DEVICE_ID_S3_AURORA64VP 0x8812
2320#define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814
2321#define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d
2322#define PCI_DEVICE_ID_S3_868 0x8880 1914#define PCI_DEVICE_ID_S3_868 0x8880
2323#define PCI_DEVICE_ID_S3_928 0x88b0
2324#define PCI_DEVICE_ID_S3_864_1 0x88c0
2325#define PCI_DEVICE_ID_S3_864_2 0x88c1
2326#define PCI_DEVICE_ID_S3_964_1 0x88d0
2327#define PCI_DEVICE_ID_S3_964_2 0x88d1
2328#define PCI_DEVICE_ID_S3_968 0x88f0 1915#define PCI_DEVICE_ID_S3_968 0x88f0
2329#define PCI_DEVICE_ID_S3_TRIO64V2 0x8901
2330#define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902
2331#define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01
2332#define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10
2333#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 1916#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25
2334#define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01
2335#define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02
2336#define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03
2337#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 1917#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04
2338#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 1918#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
2339 1919
2340#define PCI_VENDOR_ID_DUNORD 0x5544 1920#define PCI_VENDOR_ID_DUNORD 0x5544
2341#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 1921#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
2342 1922
1923
2343#define PCI_VENDOR_ID_DCI 0x6666 1924#define PCI_VENDOR_ID_DCI 0x6666
2344#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 1925#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001
2345#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 1926#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
2346 1927
2347#define PCI_VENDOR_ID_DUNORD 0x5544
2348#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
2349
2350#define PCI_VENDOR_ID_GENROCO 0x5555
2351#define PCI_DEVICE_ID_GENROCO_HFP832 0x0003
2352
2353#define PCI_VENDOR_ID_INTEL 0x8086 1928#define PCI_VENDOR_ID_INTEL 0x8086
2354#define PCI_DEVICE_ID_INTEL_EESSC 0x0008 1929#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
2355#define PCI_DEVICE_ID_INTEL_21145 0x0039
2356#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320 1930#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320
2357#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321 1931#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321
2358#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 1932#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329
@@ -2361,30 +1935,17 @@
2361#define PCI_DEVICE_ID_INTEL_82375 0x0482 1935#define PCI_DEVICE_ID_INTEL_82375 0x0482
2362#define PCI_DEVICE_ID_INTEL_82424 0x0483 1936#define PCI_DEVICE_ID_INTEL_82424 0x0483
2363#define PCI_DEVICE_ID_INTEL_82378 0x0484 1937#define PCI_DEVICE_ID_INTEL_82378 0x0484
2364#define PCI_DEVICE_ID_INTEL_82430 0x0486
2365#define PCI_DEVICE_ID_INTEL_82434 0x04a3
2366#define PCI_DEVICE_ID_INTEL_I960 0x0960 1938#define PCI_DEVICE_ID_INTEL_I960 0x0960
2367#define PCI_DEVICE_ID_INTEL_I960RM 0x0962 1939#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
2368#define PCI_DEVICE_ID_INTEL_82562ET 0x1031
2369#define PCI_DEVICE_ID_INTEL_82801CAM 0x1038
2370#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 1940#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130
2371#define PCI_DEVICE_ID_INTEL_82815_AB 0x1131
2372#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 1941#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132
2373#define PCI_DEVICE_ID_INTEL_82559ER 0x1209
2374#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 1942#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
2375#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
2376#define PCI_DEVICE_ID_INTEL_7116 0x1223
2377#define PCI_DEVICE_ID_INTEL_7505_0 0x2550 1943#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
2378#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
2379#define PCI_DEVICE_ID_INTEL_7205_0 0x255d 1944#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
2380#define PCI_DEVICE_ID_INTEL_82596 0x1226
2381#define PCI_DEVICE_ID_INTEL_82865 0x1227
2382#define PCI_DEVICE_ID_INTEL_82557 0x1229
2383#define PCI_DEVICE_ID_INTEL_82437 0x122d 1945#define PCI_DEVICE_ID_INTEL_82437 0x122d
2384#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e 1946#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e
2385#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 1947#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230
2386#define PCI_DEVICE_ID_INTEL_82371MX 0x1234 1948#define PCI_DEVICE_ID_INTEL_82371MX 0x1234
2387#define PCI_DEVICE_ID_INTEL_82437MX 0x1235
2388#define PCI_DEVICE_ID_INTEL_82441 0x1237 1949#define PCI_DEVICE_ID_INTEL_82441 0x1237
2389#define PCI_DEVICE_ID_INTEL_82380FB 0x124b 1950#define PCI_DEVICE_ID_INTEL_82380FB 0x124b
2390#define PCI_DEVICE_ID_INTEL_82439 0x1250 1951#define PCI_DEVICE_ID_INTEL_82439 0x1250
@@ -2393,83 +1954,53 @@
2393#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 1954#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
2394#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 1955#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
2395#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 1956#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
2396#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412
2397#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 1957#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
2398#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 1958#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415
2399#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 1959#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416
2400#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 1960#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418
2401#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 1961#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420
2402#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 1962#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421
2403#define PCI_DEVICE_ID_INTEL_82801AB_2 0x2422
2404#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 1963#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423
2405#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 1964#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425
2406#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 1965#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426
2407#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 1966#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428
2408#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 1967#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440
2409#define PCI_DEVICE_ID_INTEL_82801BA_1 0x2442
2410#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 1968#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443
2411#define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444
2412#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 1969#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445
2413#define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446
2414#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 1970#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448
2415#define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449
2416#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a 1971#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a
2417#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b 1972#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b
2418#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c 1973#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c
2419#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e 1974#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e
2420#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 1975#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450
2421#define PCI_DEVICE_ID_INTEL_82801E_2 0x2452
2422#define PCI_DEVICE_ID_INTEL_82801E_3 0x2453
2423#define PCI_DEVICE_ID_INTEL_82801E_9 0x2459
2424#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b 1976#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b
2425#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d
2426#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e
2427#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 1977#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
2428#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
2429#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 1978#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
2430#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484
2431#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 1979#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485
2432#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 1980#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486
2433#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487
2434#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a 1981#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
2435#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b 1982#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
2436#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c 1983#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
2437#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 1984#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0
2438#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 1985#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1
2439#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2
2440#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 1986#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3
2441#define PCI_DEVICE_ID_INTEL_82801DB_4 0x24c4
2442#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 1987#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5
2443#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 1988#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6
2444#define PCI_DEVICE_ID_INTEL_82801DB_7 0x24c7
2445#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 1989#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9
2446#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca 1990#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca
2447#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb 1991#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb
2448#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc 1992#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc
2449#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd
2450#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 1993#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0
2451#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 1994#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1
2452#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2
2453#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 1995#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3
2454#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4
2455#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 1996#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5
2456#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 1997#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6
2457#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7
2458#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db 1998#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
2459#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
2460#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 1999#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
2461#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 2000#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2
2462#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3
2463#define PCI_DEVICE_ID_INTEL_ESB_31 0x25b0
2464#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 2001#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4
2465#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 2002#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6
2466#define PCI_DEVICE_ID_INTEL_ESB_6 0x25a7
2467#define PCI_DEVICE_ID_INTEL_ESB_7 0x25a9
2468#define PCI_DEVICE_ID_INTEL_ESB_8 0x25aa
2469#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab 2003#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
2470#define PCI_DEVICE_ID_INTEL_ESB_11 0x25ac
2471#define PCI_DEVICE_ID_INTEL_ESB_12 0x25ad
2472#define PCI_DEVICE_ID_INTEL_ESB_13 0x25ae
2473#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 2004#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500
2474#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 2005#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501
2475#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 2006#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530
@@ -2479,7 +2010,6 @@
2479#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 2010#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570
2480#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 2011#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572
2481#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 2012#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578
2482#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b
2483#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 2013#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580
2484#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 2014#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582
2485#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 2015#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590
@@ -2489,80 +2019,23 @@
2489#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 2019#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
2490#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 2020#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
2491#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 2021#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
2492#define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651
2493#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652
2494#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653
2495#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658
2496#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659
2497#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a
2498#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b
2499#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c
2500#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660
2501#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662
2502#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664
2503#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666
2504#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668
2505#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a 2022#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a
2506#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d 2023#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
2507#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e 2024#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
2508#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f 2025#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
2509#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 2026#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670
2510#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680
2511#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681
2512#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682
2513#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683
2514#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688
2515#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689
2516#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a
2517#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b
2518#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c
2519#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690
2520#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692
2521#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694
2522#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696
2523#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 2027#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698
2524#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699
2525#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a
2526#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b 2028#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b
2527#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e 2029#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e
2528#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 2030#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8
2529#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 2031#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9
2530#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
2531#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1
2532#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 2032#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0
2533#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd 2033#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd
2534#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4
2535#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5
2536#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8
2537#define PCI_DEVICE_ID_INTEL_ICH7_8 0x27c9
2538#define PCI_DEVICE_ID_INTEL_ICH7_9 0x27ca
2539#define PCI_DEVICE_ID_INTEL_ICH7_10 0x27cb
2540#define PCI_DEVICE_ID_INTEL_ICH7_11 0x27cc
2541#define PCI_DEVICE_ID_INTEL_ICH7_12 0x27d0
2542#define PCI_DEVICE_ID_INTEL_ICH7_13 0x27d2
2543#define PCI_DEVICE_ID_INTEL_ICH7_14 0x27d4
2544#define PCI_DEVICE_ID_INTEL_ICH7_15 0x27d6
2545#define PCI_DEVICE_ID_INTEL_ICH7_16 0x27d8
2546#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da 2034#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da
2547#define PCI_DEVICE_ID_INTEL_ICH7_18 0x27dc
2548#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd 2035#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd
2549#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de 2036#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
2550#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df 2037#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df
2551#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0
2552#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2
2553#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 2038#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
2554#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500
2555#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501
2556#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504
2557#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505
2558#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c
2559#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d
2560#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510
2561#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511
2562#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514
2563#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515
2564#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518
2565#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519
2566#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 2039#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
2567#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 2040#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
2568#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 2041#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
@@ -2576,7 +2049,6 @@
2576#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 2049#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599
2577#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a 2050#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a
2578#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e 2051#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e
2579#define PCI_DEVICE_ID_INTEL_80310 0x530d
2580#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 2052#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
2581#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 2053#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
2582#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 2054#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
@@ -2601,22 +2073,15 @@
2601#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196 2073#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196
2602#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 2074#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198
2603#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 2075#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199
2604#define PCI_DEVICE_ID_INTEL_82443MX_2 0x719a
2605#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b 2076#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b
2606#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 2077#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0
2607#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1
2608#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 2078#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2
2609#define PCI_DEVICE_ID_INTEL_82372FB_0 0x7600
2610#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 2079#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601
2611#define PCI_DEVICE_ID_INTEL_82372FB_2 0x7602
2612#define PCI_DEVICE_ID_INTEL_82372FB_3 0x7603
2613#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 2080#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4
2614#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
2615#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca 2081#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
2616#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb 2082#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
2617#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea 2083#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea
2618#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 2084#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500
2619#define PCI_DEVICE_ID_INTEL_IXP2400 0x9001
2620#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 2085#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004
2621#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 2086#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152
2622 2087
@@ -2629,7 +2094,6 @@
2629#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 2094#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003
2630 2095
2631#define PCI_VENDOR_ID_KTI 0x8e2e 2096#define PCI_VENDOR_ID_KTI 0x8e2e
2632#define PCI_DEVICE_ID_KTI_ET32P2 0x3000
2633 2097
2634#define PCI_VENDOR_ID_ADAPTEC 0x9004 2098#define PCI_VENDOR_ID_ADAPTEC 0x9004
2635#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 2099#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078
@@ -2637,7 +2101,6 @@
2637#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 2101#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860
2638#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 2102#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078
2639#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 2103#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578
2640#define PCI_DEVICE_ID_ADAPTEC_5800 0x5800
2641#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 2104#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038
2642#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 2105#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075
2643#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 2106#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078
@@ -2657,7 +2120,6 @@
2657#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 2120#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678
2658#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 2121#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778
2659#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 2122#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878
2660#define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78
2661 2123
2662#define PCI_VENDOR_ID_ADAPTEC2 0x9005 2124#define PCI_VENDOR_ID_ADAPTEC2 0x9005
2663#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 2125#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010
@@ -2677,8 +2139,6 @@
2677#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf 2139#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf
2678#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 2140#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
2679 2141
2680#define PCI_VENDOR_ID_ATRONICS 0x907f
2681#define PCI_DEVICE_ID_ATRONICS_2015 0x2015
2682 2142
2683#define PCI_VENDOR_ID_HOLTEK 0x9412 2143#define PCI_VENDOR_ID_HOLTEK 0x9412
2684#define PCI_DEVICE_ID_HOLTEK_6565 0x6565 2144#define PCI_DEVICE_ID_HOLTEK_6565 0x6565
@@ -2711,7 +2171,3 @@
2711#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 2171#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897
2712#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 2172#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898
2713 2173
2714#define PCI_VENDOR_ID_ARK 0xedd8
2715#define PCI_DEVICE_ID_ARK_STING 0xa091
2716#define PCI_DEVICE_ID_ARK_STINGARK 0xa099
2717#define PCI_DEVICE_ID_ARK_2000MT 0xa0a1
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 5cfb07648eca..c61d5de837ef 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -219,10 +219,11 @@ typedef struct pm_message {
219 219
220struct dev_pm_info { 220struct dev_pm_info {
221 pm_message_t power_state; 221 pm_message_t power_state;
222 unsigned can_wakeup:1;
222#ifdef CONFIG_PM 223#ifdef CONFIG_PM
224 unsigned should_wakeup:1;
223 pm_message_t prev_state; 225 pm_message_t prev_state;
224 void * saved_state; 226 void * saved_state;
225 atomic_t pm_users;
226 struct device * pm_parent; 227 struct device * pm_parent;
227 struct list_head entry; 228 struct list_head entry;
228#endif 229#endif
@@ -236,13 +237,48 @@ extern void device_resume(void);
236 237
237#ifdef CONFIG_PM 238#ifdef CONFIG_PM
238extern int device_suspend(pm_message_t state); 239extern int device_suspend(pm_message_t state);
239#else 240
241#define device_set_wakeup_enable(dev,val) \
242 ((dev)->power.should_wakeup = !!(val))
243#define device_may_wakeup(dev) \
244 (device_can_wakeup(dev) && (dev)->power.should_wakeup)
245
246extern int dpm_runtime_suspend(struct device *, pm_message_t);
247extern void dpm_runtime_resume(struct device *);
248
249#else /* !CONFIG_PM */
250
240static inline int device_suspend(pm_message_t state) 251static inline int device_suspend(pm_message_t state)
241{ 252{
242 return 0; 253 return 0;
243} 254}
255
256#define device_set_wakeup_enable(dev,val) do{}while(0)
257#define device_may_wakeup(dev) (0)
258
259static inline int dpm_runtime_suspend(struct device * dev, pm_message_t state)
260{
261 return 0;
262}
263
264static inline void dpm_runtime_resume(struct device * dev)
265{
266
267}
268
244#endif 269#endif
245 270
271/* changes to device_may_wakeup take effect on the next pm state change.
272 * by default, devices should wakeup if they can.
273 */
274#define device_can_wakeup(dev) \
275 ((dev)->power.can_wakeup)
276#define device_init_wakeup(dev,val) \
277 do { \
278 device_can_wakeup(dev) = !!(val); \
279 device_set_wakeup_enable(dev,val); \
280 } while(0)
281
246#endif /* __KERNEL__ */ 282#endif /* __KERNEL__ */
247 283
248#endif /* _LINUX_PM_H */ 284#endif /* _LINUX_PM_H */
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index e80fb7ee6efd..35b30e6c8cf8 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -95,8 +95,8 @@ int try_to_unmap(struct page *);
95/* 95/*
96 * Called from mm/filemap_xip.c to unmap empty zero page 96 * Called from mm/filemap_xip.c to unmap empty zero page
97 */ 97 */
98pte_t *page_check_address(struct page *, struct mm_struct *, unsigned long); 98pte_t *page_check_address(struct page *, struct mm_struct *,
99 99 unsigned long, spinlock_t **);
100 100
101/* 101/*
102 * Used by swapoff to help locate where page is expected in vma. 102 * Used by swapoff to help locate where page is expected in vma.
diff --git a/include/linux/rwsem-spinlock.h b/include/linux/rwsem-spinlock.h
index b52a2af25f1f..f30f805080ae 100644
--- a/include/linux/rwsem-spinlock.h
+++ b/include/linux/rwsem-spinlock.h
@@ -61,5 +61,10 @@ extern void FASTCALL(__up_read(struct rw_semaphore *sem));
61extern void FASTCALL(__up_write(struct rw_semaphore *sem)); 61extern void FASTCALL(__up_write(struct rw_semaphore *sem));
62extern void FASTCALL(__downgrade_write(struct rw_semaphore *sem)); 62extern void FASTCALL(__downgrade_write(struct rw_semaphore *sem));
63 63
64static inline int rwsem_is_locked(struct rw_semaphore *sem)
65{
66 return (sem->activity != 0);
67}
68
64#endif /* __KERNEL__ */ 69#endif /* __KERNEL__ */
65#endif /* _LINUX_RWSEM_SPINLOCK_H */ 70#endif /* _LINUX_RWSEM_SPINLOCK_H */
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
index 7f717e95ae37..66ff545552f7 100644
--- a/include/linux/scatterlist.h
+++ b/include/linux/scatterlist.h
@@ -1,14 +1,23 @@
1#ifndef _LINUX_SCATTERLIST_H 1#ifndef _LINUX_SCATTERLIST_H
2#define _LINUX_SCATTERLIST_H 2#define _LINUX_SCATTERLIST_H
3 3
4static inline void sg_init_one(struct scatterlist *sg, 4#include <asm/scatterlist.h>
5 u8 *buf, unsigned int buflen) 5#include <linux/mm.h>
6{ 6#include <linux/string.h>
7 memset(sg, 0, sizeof(*sg));
8 7
8static inline void sg_set_buf(struct scatterlist *sg, void *buf,
9 unsigned int buflen)
10{
9 sg->page = virt_to_page(buf); 11 sg->page = virt_to_page(buf);
10 sg->offset = offset_in_page(buf); 12 sg->offset = offset_in_page(buf);
11 sg->length = buflen; 13 sg->length = buflen;
12} 14}
13 15
16static inline void sg_init_one(struct scatterlist *sg, void *buf,
17 unsigned int buflen)
18{
19 memset(sg, 0, sizeof(*sg));
20 sg_set_buf(sg, buf, buflen);
21}
22
14#endif /* _LINUX_SCATTERLIST_H */ 23#endif /* _LINUX_SCATTERLIST_H */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 27519df0f987..1c30bc308ef1 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -249,6 +249,36 @@ arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr,
249extern void arch_unmap_area(struct mm_struct *, unsigned long); 249extern void arch_unmap_area(struct mm_struct *, unsigned long);
250extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long); 250extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long);
251 251
252#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
253/*
254 * The mm counters are not protected by its page_table_lock,
255 * so must be incremented atomically.
256 */
257#ifdef ATOMIC64_INIT
258#define set_mm_counter(mm, member, value) atomic64_set(&(mm)->_##member, value)
259#define get_mm_counter(mm, member) ((unsigned long)atomic64_read(&(mm)->_##member))
260#define add_mm_counter(mm, member, value) atomic64_add(value, &(mm)->_##member)
261#define inc_mm_counter(mm, member) atomic64_inc(&(mm)->_##member)
262#define dec_mm_counter(mm, member) atomic64_dec(&(mm)->_##member)
263typedef atomic64_t mm_counter_t;
264#else /* !ATOMIC64_INIT */
265/*
266 * The counters wrap back to 0 at 2^32 * PAGE_SIZE,
267 * that is, at 16TB if using 4kB page size.
268 */
269#define set_mm_counter(mm, member, value) atomic_set(&(mm)->_##member, value)
270#define get_mm_counter(mm, member) ((unsigned long)atomic_read(&(mm)->_##member))
271#define add_mm_counter(mm, member, value) atomic_add(value, &(mm)->_##member)
272#define inc_mm_counter(mm, member) atomic_inc(&(mm)->_##member)
273#define dec_mm_counter(mm, member) atomic_dec(&(mm)->_##member)
274typedef atomic_t mm_counter_t;
275#endif /* !ATOMIC64_INIT */
276
277#else /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */
278/*
279 * The mm counters are protected by its page_table_lock,
280 * so can be incremented directly.
281 */
252#define set_mm_counter(mm, member, value) (mm)->_##member = (value) 282#define set_mm_counter(mm, member, value) (mm)->_##member = (value)
253#define get_mm_counter(mm, member) ((mm)->_##member) 283#define get_mm_counter(mm, member) ((mm)->_##member)
254#define add_mm_counter(mm, member, value) (mm)->_##member += (value) 284#define add_mm_counter(mm, member, value) (mm)->_##member += (value)
@@ -256,6 +286,20 @@ extern void arch_unmap_area_topdown(struct mm_struct *, unsigned long);
256#define dec_mm_counter(mm, member) (mm)->_##member-- 286#define dec_mm_counter(mm, member) (mm)->_##member--
257typedef unsigned long mm_counter_t; 287typedef unsigned long mm_counter_t;
258 288
289#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */
290
291#define get_mm_rss(mm) \
292 (get_mm_counter(mm, file_rss) + get_mm_counter(mm, anon_rss))
293#define update_hiwater_rss(mm) do { \
294 unsigned long _rss = get_mm_rss(mm); \
295 if ((mm)->hiwater_rss < _rss) \
296 (mm)->hiwater_rss = _rss; \
297} while (0)
298#define update_hiwater_vm(mm) do { \
299 if ((mm)->hiwater_vm < (mm)->total_vm) \
300 (mm)->hiwater_vm = (mm)->total_vm; \
301} while (0)
302
259struct mm_struct { 303struct mm_struct {
260 struct vm_area_struct * mmap; /* list of VMAs */ 304 struct vm_area_struct * mmap; /* list of VMAs */
261 struct rb_root mm_rb; 305 struct rb_root mm_rb;
@@ -279,15 +323,20 @@ struct mm_struct {
279 * by mmlist_lock 323 * by mmlist_lock
280 */ 324 */
281 325
326 /* Special counters, in some configurations protected by the
327 * page_table_lock, in other configurations by being atomic.
328 */
329 mm_counter_t _file_rss;
330 mm_counter_t _anon_rss;
331
332 unsigned long hiwater_rss; /* High-watermark of RSS usage */
333 unsigned long hiwater_vm; /* High-water virtual memory usage */
334
335 unsigned long total_vm, locked_vm, shared_vm, exec_vm;
336 unsigned long stack_vm, reserved_vm, def_flags, nr_ptes;
282 unsigned long start_code, end_code, start_data, end_data; 337 unsigned long start_code, end_code, start_data, end_data;
283 unsigned long start_brk, brk, start_stack; 338 unsigned long start_brk, brk, start_stack;
284 unsigned long arg_start, arg_end, env_start, env_end; 339 unsigned long arg_start, arg_end, env_start, env_end;
285 unsigned long total_vm, locked_vm, shared_vm;
286 unsigned long exec_vm, stack_vm, reserved_vm, def_flags, nr_ptes;
287
288 /* Special counters protected by the page_table_lock */
289 mm_counter_t _rss;
290 mm_counter_t _anon_rss;
291 340
292 unsigned long saved_auxv[AT_VECTOR_SIZE]; /* for /proc/PID/auxv */ 341 unsigned long saved_auxv[AT_VECTOR_SIZE]; /* for /proc/PID/auxv */
293 342
@@ -308,11 +357,7 @@ struct mm_struct {
308 /* aio bits */ 357 /* aio bits */
309 rwlock_t ioctx_list_lock; 358 rwlock_t ioctx_list_lock;
310 struct kioctx *ioctx_list; 359 struct kioctx *ioctx_list;
311
312 struct kioctx default_kioctx; 360 struct kioctx default_kioctx;
313
314 unsigned long hiwater_rss; /* High-water RSS usage */
315 unsigned long hiwater_vm; /* High-water virtual memory usage */
316}; 361};
317 362
318struct sighand_struct { 363struct sighand_struct {
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 27db8da43aa4..2b0401b93f2b 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -39,7 +39,8 @@
39#define PORT_RSA 13 39#define PORT_RSA 13
40#define PORT_NS16550A 14 40#define PORT_NS16550A 14
41#define PORT_XSCALE 15 41#define PORT_XSCALE 15
42#define PORT_MAX_8250 15 /* max port ID */ 42#define PORT_IP3106 16
43#define PORT_MAX_8250 16 /* max port ID */
43 44
44/* 45/*
45 * ARM specific type numbers. These are not currently guaranteed 46 * ARM specific type numbers. These are not currently guaranteed
diff --git a/include/linux/serial_ip3106.h b/include/linux/serial_ip3106.h
new file mode 100644
index 000000000000..f500ac602c5c
--- /dev/null
+++ b/include/linux/serial_ip3106.h
@@ -0,0 +1,81 @@
1/*
2 * Embedded Alley Solutions, source@embeddedalley.com.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef _LINUX_SERIAL_IP3106_H
20#define _LINUX_SERIAL_IP3106_H
21
22#include <linux/serial_core.h>
23#include <linux/device.h>
24
25#define IP3106_NR_PORTS 2
26
27struct ip3106_port {
28 struct uart_port port;
29 struct timer_list timer;
30 unsigned int old_status;
31};
32
33/* register offsets */
34#define IP3106_LCR 0
35#define IP3106_MCR 0x004
36#define IP3106_BAUD 0x008
37#define IP3106_CFG 0x00c
38#define IP3106_FIFO 0x028
39#define IP3106_ISTAT 0xfe0
40#define IP3106_IEN 0xfe4
41#define IP3106_ICLR 0xfe8
42#define IP3106_ISET 0xfec
43#define IP3106_PD 0xff4
44#define IP3106_MID 0xffc
45
46#define IP3106_UART_LCR_TXBREAK (1<<30)
47#define IP3106_UART_LCR_PAREVN 0x10000000
48#define IP3106_UART_LCR_PAREN 0x08000000
49#define IP3106_UART_LCR_2STOPB 0x04000000
50#define IP3106_UART_LCR_8BIT 0x01000000
51#define IP3106_UART_LCR_TX_RST 0x00040000
52#define IP3106_UART_LCR_RX_RST 0x00020000
53#define IP3106_UART_LCR_RX_NEXT 0x00010000
54
55#define IP3106_UART_MCR_SCR 0xFF000000
56#define IP3106_UART_MCR_DCD 0x00800000
57#define IP3106_UART_MCR_CTS 0x00100000
58#define IP3106_UART_MCR_LOOP 0x00000010
59#define IP3106_UART_MCR_RTS 0x00000002
60#define IP3106_UART_MCR_DTR 0x00000001
61
62#define IP3106_UART_INT_TX 0x00000080
63#define IP3106_UART_INT_EMPTY 0x00000040
64#define IP3106_UART_INT_RCVTO 0x00000020
65#define IP3106_UART_INT_RX 0x00000010
66#define IP3106_UART_INT_RXOVRN 0x00000008
67#define IP3106_UART_INT_FRERR 0x00000004
68#define IP3106_UART_INT_BREAK 0x00000002
69#define IP3106_UART_INT_PARITY 0x00000001
70#define IP3106_UART_INT_ALLRX 0x0000003F
71#define IP3106_UART_INT_ALLTX 0x000000C0
72
73#define IP3106_UART_FIFO_TXFIFO 0x001F0000
74#define IP3106_UART_FIFO_TXFIFO_STA (0x1f<<16)
75#define IP3106_UART_FIFO_RXBRK 0x00008000
76#define IP3106_UART_FIFO_RXFE 0x00004000
77#define IP3106_UART_FIFO_RXPAR 0x00002000
78#define IP3106_UART_FIFO_RXFIFO 0x00001F00
79#define IP3106_UART_FIFO_RBRTHR 0x000000FF
80
81#endif
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index b756935da9c8..4286d832166f 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -137,6 +137,8 @@ struct skb_shared_info {
137 unsigned int nr_frags; 137 unsigned int nr_frags;
138 unsigned short tso_size; 138 unsigned short tso_size;
139 unsigned short tso_segs; 139 unsigned short tso_segs;
140 unsigned short ufo_size;
141 unsigned int ip6_frag_id;
140 struct sk_buff *frag_list; 142 struct sk_buff *frag_list;
141 skb_frag_t frags[MAX_SKB_FRAGS]; 143 skb_frag_t frags[MAX_SKB_FRAGS];
142}; 144};
@@ -341,6 +343,11 @@ extern void skb_over_panic(struct sk_buff *skb, int len,
341extern void skb_under_panic(struct sk_buff *skb, int len, 343extern void skb_under_panic(struct sk_buff *skb, int len,
342 void *here); 344 void *here);
343 345
346extern int skb_append_datato_frags(struct sock *sk, struct sk_buff *skb,
347 int getfrag(void *from, char *to, int offset,
348 int len,int odd, struct sk_buff *skb),
349 void *from, int length);
350
344struct skb_seq_state 351struct skb_seq_state
345{ 352{
346 __u32 lower_offset; 353 __u32 lower_offset;
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 8f731e8f2821..748d04385256 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -57,6 +57,7 @@ struct usb_host_endpoint {
57 struct usb_endpoint_descriptor desc; 57 struct usb_endpoint_descriptor desc;
58 struct list_head urb_list; 58 struct list_head urb_list;
59 void *hcpriv; 59 void *hcpriv;
60 struct kobject *kobj; /* For sysfs info */
60 61
61 unsigned char *extra; /* Extra descriptors */ 62 unsigned char *extra; /* Extra descriptors */
62 int extralen; 63 int extralen;
@@ -136,7 +137,8 @@ struct usb_interface {
136 * active alternate setting */ 137 * active alternate setting */
137 unsigned num_altsetting; /* number of alternate settings */ 138 unsigned num_altsetting; /* number of alternate settings */
138 139
139 int minor; /* minor number this interface is bound to */ 140 int minor; /* minor number this interface is
141 * bound to */
140 enum usb_interface_condition condition; /* state of binding */ 142 enum usb_interface_condition condition; /* state of binding */
141 struct device dev; /* interface specific device info */ 143 struct device dev; /* interface specific device info */
142 struct class_device *class_dev; 144 struct class_device *class_dev;
@@ -229,7 +231,7 @@ struct usb_interface_cache {
229struct usb_host_config { 231struct usb_host_config {
230 struct usb_config_descriptor desc; 232 struct usb_config_descriptor desc;
231 233
232 char *string; 234 char *string; /* iConfiguration string, if present */
233 /* the interfaces associated with this configuration, 235 /* the interfaces associated with this configuration,
234 * stored in no particular order */ 236 * stored in no particular order */
235 struct usb_interface *interface[USB_MAXINTERFACES]; 237 struct usb_interface *interface[USB_MAXINTERFACES];
@@ -248,7 +250,7 @@ int __usb_get_extra_descriptor(char *buffer, unsigned size,
248 __usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\ 250 __usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\
249 type,(void**)ptr) 251 type,(void**)ptr)
250 252
251/* -------------------------------------------------------------------------- */ 253/* ----------------------------------------------------------------------- */
252 254
253struct usb_operations; 255struct usb_operations;
254 256
@@ -268,7 +270,8 @@ struct usb_bus {
268 unsigned is_b_host:1; /* true during some HNP roleswitches */ 270 unsigned is_b_host:1; /* true during some HNP roleswitches */
269 unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */ 271 unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */
270 272
271 int devnum_next; /* Next open device number in round-robin allocation */ 273 int devnum_next; /* Next open device number in
274 * round-robin allocation */
272 275
273 struct usb_devmap devmap; /* device address allocation map */ 276 struct usb_devmap devmap; /* device address allocation map */
274 struct usb_operations *op; /* Operations (specific to the HC) */ 277 struct usb_operations *op; /* Operations (specific to the HC) */
@@ -289,15 +292,16 @@ struct usb_bus {
289 struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */ 292 struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */
290 293
291 struct class_device *class_dev; /* class device for this bus */ 294 struct class_device *class_dev; /* class device for this bus */
292 struct kref kref; /* handles reference counting this bus */ 295 struct kref kref; /* reference counting for this bus */
293 void (*release)(struct usb_bus *bus); /* function to destroy this bus's memory */ 296 void (*release)(struct usb_bus *bus);
297
294#if defined(CONFIG_USB_MON) 298#if defined(CONFIG_USB_MON)
295 struct mon_bus *mon_bus; /* non-null when associated */ 299 struct mon_bus *mon_bus; /* non-null when associated */
296 int monitored; /* non-zero when monitored */ 300 int monitored; /* non-zero when monitored */
297#endif 301#endif
298}; 302};
299 303
300/* -------------------------------------------------------------------------- */ 304/* ----------------------------------------------------------------------- */
301 305
302/* This is arbitrary. 306/* This is arbitrary.
303 * From USB 2.0 spec Table 11-13, offset 7, a hub can 307 * From USB 2.0 spec Table 11-13, offset 7, a hub can
@@ -326,7 +330,8 @@ struct usb_device {
326 330
327 struct semaphore serialize; 331 struct semaphore serialize;
328 332
329 unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ 333 unsigned int toggle[2]; /* one bit for each endpoint
334 * ([0] = IN, [1] = OUT) */
330 335
331 struct usb_device *parent; /* our hub, unless we're the root */ 336 struct usb_device *parent; /* our hub, unless we're the root */
332 struct usb_bus *bus; /* Bus we're part of */ 337 struct usb_bus *bus; /* Bus we're part of */
@@ -343,12 +348,14 @@ struct usb_device {
343 348
344 char **rawdescriptors; /* Raw descriptors for each config */ 349 char **rawdescriptors; /* Raw descriptors for each config */
345 350
346 int have_langid; /* whether string_langid is valid yet */ 351 int have_langid; /* whether string_langid is valid */
347 int string_langid; /* language ID for strings */ 352 int string_langid; /* language ID for strings */
348 353
349 char *product; 354 /* static strings from the device */
350 char *manufacturer; 355 char *product; /* iProduct string, if present */
351 char *serial; /* static strings from the device */ 356 char *manufacturer; /* iManufacturer string, if present */
357 char *serial; /* iSerialNumber string, if present */
358
352 struct list_head filelist; 359 struct list_head filelist;
353 struct class_device *class_dev; 360 struct class_device *class_dev;
354 struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */ 361 struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */
@@ -440,22 +447,31 @@ extern struct usb_host_interface *usb_altnum_to_altsetting(
440 * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are 447 * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are
441 * high speed, and a different one if they are full or low speed. 448 * high speed, and a different one if they are full or low speed.
442 */ 449 */
443static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) 450static inline int usb_make_path (struct usb_device *dev, char *buf,
451 size_t size)
444{ 452{
445 int actual; 453 int actual;
446 actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name, dev->devpath); 454 actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name,
455 dev->devpath);
447 return (actual >= (int)size) ? -1 : actual; 456 return (actual >= (int)size) ? -1 : actual;
448} 457}
449 458
450/*-------------------------------------------------------------------------*/ 459/*-------------------------------------------------------------------------*/
451 460
452#define USB_DEVICE_ID_MATCH_DEVICE (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) 461#define USB_DEVICE_ID_MATCH_DEVICE \
453#define USB_DEVICE_ID_MATCH_DEV_RANGE (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) 462 (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT)
454#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) 463#define USB_DEVICE_ID_MATCH_DEV_RANGE \
464 (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI)
465#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \
466 (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE)
455#define USB_DEVICE_ID_MATCH_DEV_INFO \ 467#define USB_DEVICE_ID_MATCH_DEV_INFO \
456 (USB_DEVICE_ID_MATCH_DEV_CLASS | USB_DEVICE_ID_MATCH_DEV_SUBCLASS | USB_DEVICE_ID_MATCH_DEV_PROTOCOL) 468 (USB_DEVICE_ID_MATCH_DEV_CLASS | \
469 USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \
470 USB_DEVICE_ID_MATCH_DEV_PROTOCOL)
457#define USB_DEVICE_ID_MATCH_INT_INFO \ 471#define USB_DEVICE_ID_MATCH_INT_INFO \
458 (USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL) 472 (USB_DEVICE_ID_MATCH_INT_CLASS | \
473 USB_DEVICE_ID_MATCH_INT_SUBCLASS | \
474 USB_DEVICE_ID_MATCH_INT_PROTOCOL)
459 475
460/** 476/**
461 * USB_DEVICE - macro used to describe a specific usb device 477 * USB_DEVICE - macro used to describe a specific usb device
@@ -466,9 +482,11 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
466 * specific device. 482 * specific device.
467 */ 483 */
468#define USB_DEVICE(vend,prod) \ 484#define USB_DEVICE(vend,prod) \
469 .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), .idProduct = (prod) 485 .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), \
486 .idProduct = (prod)
470/** 487/**
471 * USB_DEVICE_VER - macro used to describe a specific usb device with a version range 488 * USB_DEVICE_VER - macro used to describe a specific usb device with a
489 * version range
472 * @vend: the 16 bit USB Vendor ID 490 * @vend: the 16 bit USB Vendor ID
473 * @prod: the 16 bit USB Product ID 491 * @prod: the 16 bit USB Product ID
474 * @lo: the bcdDevice_lo value 492 * @lo: the bcdDevice_lo value
@@ -478,7 +496,9 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
478 * specific device, with a version range. 496 * specific device, with a version range.
479 */ 497 */
480#define USB_DEVICE_VER(vend,prod,lo,hi) \ 498#define USB_DEVICE_VER(vend,prod,lo,hi) \
481 .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, .idVendor = (vend), .idProduct = (prod), .bcdDevice_lo = (lo), .bcdDevice_hi = (hi) 499 .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \
500 .idVendor = (vend), .idProduct = (prod), \
501 .bcdDevice_lo = (lo), .bcdDevice_hi = (hi)
482 502
483/** 503/**
484 * USB_DEVICE_INFO - macro used to describe a class of usb devices 504 * USB_DEVICE_INFO - macro used to describe a class of usb devices
@@ -490,7 +510,8 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
490 * specific class of devices. 510 * specific class of devices.
491 */ 511 */
492#define USB_DEVICE_INFO(cl,sc,pr) \ 512#define USB_DEVICE_INFO(cl,sc,pr) \
493 .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), .bDeviceSubClass = (sc), .bDeviceProtocol = (pr) 513 .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), \
514 .bDeviceSubClass = (sc), .bDeviceProtocol = (pr)
494 515
495/** 516/**
496 * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces 517 * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces
@@ -502,9 +523,10 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
502 * specific class of interfaces. 523 * specific class of interfaces.
503 */ 524 */
504#define USB_INTERFACE_INFO(cl,sc,pr) \ 525#define USB_INTERFACE_INFO(cl,sc,pr) \
505 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr) 526 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), \
527 .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr)
506 528
507/* -------------------------------------------------------------------------- */ 529/* ----------------------------------------------------------------------- */
508 530
509/** 531/**
510 * struct usb_driver - identifies USB driver to usbcore 532 * struct usb_driver - identifies USB driver to usbcore
@@ -557,7 +579,8 @@ struct usb_driver {
557 579
558 void (*disconnect) (struct usb_interface *intf); 580 void (*disconnect) (struct usb_interface *intf);
559 581
560 int (*ioctl) (struct usb_interface *intf, unsigned int code, void *buf); 582 int (*ioctl) (struct usb_interface *intf, unsigned int code,
583 void *buf);
561 584
562 int (*suspend) (struct usb_interface *intf, pm_message_t message); 585 int (*suspend) (struct usb_interface *intf, pm_message_t message);
563 int (*resume) (struct usb_interface *intf); 586 int (*resume) (struct usb_interface *intf);
@@ -572,10 +595,8 @@ extern struct bus_type usb_bus_type;
572 595
573/** 596/**
574 * struct usb_class_driver - identifies a USB driver that wants to use the USB major number 597 * struct usb_class_driver - identifies a USB driver that wants to use the USB major number
575 * @name: devfs name for this driver. Will also be used by the driver 598 * @name: the usb class device name for this driver. Will show up in sysfs.
576 * class code to create a usb class device.
577 * @fops: pointer to the struct file_operations of this driver. 599 * @fops: pointer to the struct file_operations of this driver.
578 * @mode: the mode for the devfs file to be created for this driver.
579 * @minor_base: the start of the minor range for this driver. 600 * @minor_base: the start of the minor range for this driver.
580 * 601 *
581 * This structure is used for the usb_register_dev() and 602 * This structure is used for the usb_register_dev() and
@@ -585,8 +606,7 @@ extern struct bus_type usb_bus_type;
585struct usb_class_driver { 606struct usb_class_driver {
586 char *name; 607 char *name;
587 struct file_operations *fops; 608 struct file_operations *fops;
588 mode_t mode; 609 int minor_base;
589 int minor_base;
590}; 610};
591 611
592/* 612/*
@@ -603,7 +623,7 @@ extern void usb_deregister_dev(struct usb_interface *intf,
603 623
604extern int usb_disabled(void); 624extern int usb_disabled(void);
605 625
606/* -------------------------------------------------------------------------- */ 626/* ----------------------------------------------------------------------- */
607 627
608/* 628/*
609 * URB support, for asynchronous request completions 629 * URB support, for asynchronous request completions
@@ -613,12 +633,14 @@ extern int usb_disabled(void);
613 * urb->transfer_flags: 633 * urb->transfer_flags:
614 */ 634 */
615#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */ 635#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */
616#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame ignored */ 636#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame
637 * ignored */
617#define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */ 638#define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */
618#define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */ 639#define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */
619#define URB_NO_FSBR 0x0020 /* UHCI-specific */ 640#define URB_NO_FSBR 0x0020 /* UHCI-specific */
620#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUTs with short packet */ 641#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */
621#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt needed */ 642#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt
643 * needed */
622 644
623struct usb_iso_packet_descriptor { 645struct usb_iso_packet_descriptor {
624 unsigned int offset; 646 unsigned int offset;
@@ -806,7 +828,8 @@ struct urb
806 u8 reject; /* submissions will fail */ 828 u8 reject; /* submissions will fail */
807 829
808 /* public, documented fields in the urb that can be used by drivers */ 830 /* public, documented fields in the urb that can be used by drivers */
809 struct list_head urb_list; /* list head for use by the urb owner */ 831 struct list_head urb_list; /* list head for use by the urb's
832 * current owner */
810 struct usb_device *dev; /* (in) pointer to associated device */ 833 struct usb_device *dev; /* (in) pointer to associated device */
811 unsigned int pipe; /* (in) pipe information */ 834 unsigned int pipe; /* (in) pipe information */
812 int status; /* (return) non-ISO status */ 835 int status; /* (return) non-ISO status */
@@ -819,14 +842,16 @@ struct urb
819 dma_addr_t setup_dma; /* (in) dma addr for setup_packet */ 842 dma_addr_t setup_dma; /* (in) dma addr for setup_packet */
820 int start_frame; /* (modify) start frame (ISO) */ 843 int start_frame; /* (modify) start frame (ISO) */
821 int number_of_packets; /* (in) number of ISO packets */ 844 int number_of_packets; /* (in) number of ISO packets */
822 int interval; /* (modify) transfer interval (INT/ISO) */ 845 int interval; /* (modify) transfer interval
846 * (INT/ISO) */
823 int error_count; /* (return) number of ISO errors */ 847 int error_count; /* (return) number of ISO errors */
824 void *context; /* (in) context for completion */ 848 void *context; /* (in) context for completion */
825 usb_complete_t complete; /* (in) completion routine */ 849 usb_complete_t complete; /* (in) completion routine */
826 struct usb_iso_packet_descriptor iso_frame_desc[0]; /* (in) ISO ONLY */ 850 struct usb_iso_packet_descriptor iso_frame_desc[0];
851 /* (in) ISO ONLY */
827}; 852};
828 853
829/* -------------------------------------------------------------------------- */ 854/* ----------------------------------------------------------------------- */
830 855
831/** 856/**
832 * usb_fill_control_urb - initializes a control urb 857 * usb_fill_control_urb - initializes a control urb
@@ -974,11 +999,6 @@ extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,
974 void *data, int len, int *actual_length, 999 void *data, int len, int *actual_length,
975 int timeout); 1000 int timeout);
976 1001
977/* selective suspend/resume */
978extern int usb_suspend_device(struct usb_device *dev, pm_message_t message);
979extern int usb_resume_device(struct usb_device *dev);
980
981
982/* wrappers around usb_control_msg() for the most common standard requests */ 1002/* wrappers around usb_control_msg() for the most common standard requests */
983extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype, 1003extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype,
984 unsigned char descindex, void *buf, int size); 1004 unsigned char descindex, void *buf, int size);
@@ -1056,7 +1076,7 @@ void usb_sg_cancel (struct usb_sg_request *io);
1056void usb_sg_wait (struct usb_sg_request *io); 1076void usb_sg_wait (struct usb_sg_request *io);
1057 1077
1058 1078
1059/* -------------------------------------------------------------------------- */ 1079/* ----------------------------------------------------------------------- */
1060 1080
1061/* 1081/*
1062 * For various legacy reasons, Linux has a small cookie that's paired with 1082 * For various legacy reasons, Linux has a small cookie that's paired with
@@ -1097,23 +1117,34 @@ void usb_sg_wait (struct usb_sg_request *io);
1097/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */ 1117/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */
1098#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1) 1118#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1)
1099#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep))) 1119#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep)))
1100#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | ((bit) << (ep))) 1120#define usb_settoggle(dev, ep, out, bit) \
1121 ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \
1122 ((bit) << (ep)))
1101 1123
1102 1124
1103static inline unsigned int __create_pipe(struct usb_device *dev, unsigned int endpoint) 1125static inline unsigned int __create_pipe(struct usb_device *dev,
1126 unsigned int endpoint)
1104{ 1127{
1105 return (dev->devnum << 8) | (endpoint << 15); 1128 return (dev->devnum << 8) | (endpoint << 15);
1106} 1129}
1107 1130
1108/* Create various pipes... */ 1131/* Create various pipes... */
1109#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint)) 1132#define usb_sndctrlpipe(dev,endpoint) \
1110#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1133 ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint))
1111#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint)) 1134#define usb_rcvctrlpipe(dev,endpoint) \
1112#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1135 ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1113#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint)) 1136#define usb_sndisocpipe(dev,endpoint) \
1114#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1137 ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint))
1115#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint)) 1138#define usb_rcvisocpipe(dev,endpoint) \
1116#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1139 ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1140#define usb_sndbulkpipe(dev,endpoint) \
1141 ((PIPE_BULK << 30) | __create_pipe(dev,endpoint))
1142#define usb_rcvbulkpipe(dev,endpoint) \
1143 ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1144#define usb_sndintpipe(dev,endpoint) \
1145 ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint))
1146#define usb_rcvintpipe(dev,endpoint) \
1147 ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1117 1148
1118/*-------------------------------------------------------------------------*/ 1149/*-------------------------------------------------------------------------*/
1119 1150
@@ -1137,17 +1168,29 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out)
1137 return le16_to_cpu(ep->desc.wMaxPacketSize); 1168 return le16_to_cpu(ep->desc.wMaxPacketSize);
1138} 1169}
1139 1170
1140/* -------------------------------------------------------------------------- */ 1171/* ----------------------------------------------------------------------- */
1172
1173/* Events from the usb core */
1174#define USB_DEVICE_ADD 0x0001
1175#define USB_DEVICE_REMOVE 0x0002
1176#define USB_BUS_ADD 0x0003
1177#define USB_BUS_REMOVE 0x0004
1178extern void usb_register_notify(struct notifier_block *nb);
1179extern void usb_unregister_notify(struct notifier_block *nb);
1141 1180
1142#ifdef DEBUG 1181#ifdef DEBUG
1143#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , __FILE__ , ## arg) 1182#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , \
1183 __FILE__ , ## arg)
1144#else 1184#else
1145#define dbg(format, arg...) do {} while (0) 1185#define dbg(format, arg...) do {} while (0)
1146#endif 1186#endif
1147 1187
1148#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg) 1188#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
1149#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg) 1189 __FILE__ , ## arg)
1150#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg) 1190#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , \
1191 __FILE__ , ## arg)
1192#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , \
1193 __FILE__ , ## arg)
1151 1194
1152 1195
1153#endif /* __KERNEL__ */ 1196#endif /* __KERNEL__ */
diff --git a/include/linux/usb_otg.h b/include/linux/usb_otg.h
index c6683146e9b0..f827f6e203c2 100644
--- a/include/linux/usb_otg.h
+++ b/include/linux/usb_otg.h
@@ -63,6 +63,10 @@ struct otg_transceiver {
63 int (*set_power)(struct otg_transceiver *otg, 63 int (*set_power)(struct otg_transceiver *otg,
64 unsigned mA); 64 unsigned mA);
65 65
66 /* for non-OTG B devices: set transceiver into suspend mode */
67 int (*set_suspend)(struct otg_transceiver *otg,
68 int suspend);
69
66 /* for B devices only: start session with A-Host */ 70 /* for B devices only: start session with A-Host */
67 int (*start_srp)(struct otg_transceiver *otg); 71 int (*start_srp)(struct otg_transceiver *otg);
68 72
@@ -108,6 +112,15 @@ otg_set_power(struct otg_transceiver *otg, unsigned mA)
108} 112}
109 113
110static inline int 114static inline int
115otg_set_suspend(struct otg_transceiver *otg, int suspend)
116{
117 if (otg->set_suspend != NULL)
118 return otg->set_suspend(otg, suspend);
119 else
120 return 0;
121}
122
123static inline int
111otg_start_srp(struct otg_transceiver *otg) 124otg_start_srp(struct otg_transceiver *otg)
112{ 125{
113 return otg->start_srp(otg); 126 return otg->start_srp(otg);
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 9facf733800c..8859f0b41543 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -140,6 +140,12 @@ struct usbdevfs_urb32 {
140 compat_caddr_t usercontext; /* unused */ 140 compat_caddr_t usercontext; /* unused */
141 struct usbdevfs_iso_packet_desc iso_frame_desc[0]; 141 struct usbdevfs_iso_packet_desc iso_frame_desc[0];
142}; 142};
143
144struct usbdevfs_ioctl32 {
145 s32 ifno;
146 s32 ioctl_code;
147 compat_caddr_t data;
148};
143#endif 149#endif
144 150
145#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer) 151#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer)
@@ -160,6 +166,7 @@ struct usbdevfs_urb32 {
160#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int) 166#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int)
161#define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo) 167#define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo)
162#define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl) 168#define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl)
169#define USBDEVFS_IOCTL32 _IOWR('U', 18, struct usbdevfs_ioctl32)
163#define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo) 170#define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo)
164#define USBDEVFS_RESET _IO('U', 20) 171#define USBDEVFS_RESET _IO('U', 20)
165#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int) 172#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int)
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 3701a0673d2c..1d5577b2b752 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -32,10 +32,14 @@ struct vm_struct {
32 * Highlevel APIs for driver use 32 * Highlevel APIs for driver use
33 */ 33 */
34extern void *vmalloc(unsigned long size); 34extern void *vmalloc(unsigned long size);
35extern void *vmalloc_node(unsigned long size, int node);
35extern void *vmalloc_exec(unsigned long size); 36extern void *vmalloc_exec(unsigned long size);
36extern void *vmalloc_32(unsigned long size); 37extern void *vmalloc_32(unsigned long size);
37extern void *__vmalloc(unsigned long size, gfp_t gfp_mask, pgprot_t prot); 38extern void *__vmalloc(unsigned long size, gfp_t gfp_mask, pgprot_t prot);
38extern void *__vmalloc_area(struct vm_struct *area, gfp_t gfp_mask, pgprot_t prot); 39extern void *__vmalloc_area(struct vm_struct *area, gfp_t gfp_mask,
40 pgprot_t prot);
41extern void *__vmalloc_node(unsigned long size, gfp_t gfp_mask,
42 pgprot_t prot, int node);
39extern void vfree(void *addr); 43extern void vfree(void *addr);
40 44
41extern void *vmap(struct page **pages, unsigned int count, 45extern void *vmap(struct page **pages, unsigned int count,
@@ -48,6 +52,8 @@ extern void vunmap(void *addr);
48extern struct vm_struct *get_vm_area(unsigned long size, unsigned long flags); 52extern struct vm_struct *get_vm_area(unsigned long size, unsigned long flags);
49extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, 53extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags,
50 unsigned long start, unsigned long end); 54 unsigned long start, unsigned long end);
55extern struct vm_struct *get_vm_area_node(unsigned long size,
56 unsigned long flags, int node);
51extern struct vm_struct *remove_vm_area(void *addr); 57extern struct vm_struct *remove_vm_area(void *addr);
52extern struct vm_struct *__remove_vm_area(void *addr); 58extern struct vm_struct *__remove_vm_area(void *addr);
53extern int map_vm_area(struct vm_struct *area, pgprot_t prot, 59extern int map_vm_area(struct vm_struct *area, pgprot_t prot,
diff --git a/include/linux/x1205.h b/include/linux/x1205.h
new file mode 100644
index 000000000000..64fd3af894a5
--- /dev/null
+++ b/include/linux/x1205.h
@@ -0,0 +1,31 @@
1/*
2 * x1205.h - defines for drivers/i2c/chips/x1205.c
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __LINUX_X1205_H__
13#define __LINUX_X1205_H__
14
15/* commands */
16
17#define X1205_CMD_GETDATETIME 0
18#define X1205_CMD_SETTIME 1
19#define X1205_CMD_SETDATETIME 2
20#define X1205_CMD_GETALARM 3
21#define X1205_CMD_SETALARM 4
22#define X1205_CMD_GETDTRIM 5
23#define X1205_CMD_SETDTRIM 6
24#define X1205_CMD_GETATRIM 7
25#define X1205_CMD_SETATRIM 8
26
27extern int x1205_do_command(unsigned int cmd, void *arg);
28extern int x1205_direct_attach(int adapter_id,
29 struct i2c_client_address_data *address_data);
30
31#endif /* __LINUX_X1205_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-11 22:42:14 -0400