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authorOlav Kongas <ok@artecdesign.ee>2005-08-04 10:02:54 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-09-08 19:22:48 -0400
commitf8d23d309809ae69c763520dababb7e845938272 (patch)
tree0c07570e6de7e6978bd336be9fabfe1ecfee802b /include/linux
parent9d233d9faedfd8a4ee22288c1fdc698a6f75db21 (diff)
[PATCH] USB: isp116x-hcd: remove clock() and reset()
This patch removes support for user-provided platform-specific hardware reset and clock starting/stopping functions. Hardware reset was needed earlier as getting the software reset working was tricky due to the lack of documentation. Recently, a number of people using isp116x have said the software reset is working for them. I haven't heard of anybody using the clock starting/stopping. Signed-off-by: Olav Kongas <ok@artecdesign.ee> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/usb_isp116x.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/include/linux/usb_isp116x.h b/include/linux/usb_isp116x.h
index 8f0b3c226968..436dd8a2b64a 100644
--- a/include/linux/usb_isp116x.h
+++ b/include/linux/usb_isp116x.h
@@ -19,15 +19,6 @@ struct isp116x_platform_data {
19 prevents stopping internal clock, increasing 19 prevents stopping internal clock, increasing
20 thereby power consumption in suspended state. */ 20 thereby power consumption in suspended state. */
21 unsigned remote_wakeup_enable:1; 21 unsigned remote_wakeup_enable:1;
22 /* Hardware reset set/clear. If implemented, this function must:
23 if set == 0, deassert chip's HW reset pin
24 otherwise, assert chip's HW reset pin */
25 void (*reset) (struct device * dev, int set);
26 /* Hardware clock start/stop. If implemented, this function must:
27 if start == 0, stop the external clock
28 otherwise, start the external clock
29 */
30 void (*clock) (struct device * dev, int start);
31 /* Inter-io delay (ns). The chip is picky about access timings; it 22 /* Inter-io delay (ns). The chip is picky about access timings; it
32 expects at least: 23 expects at least:
33 150ns delay between consecutive accesses to DATA_REG, 24 150ns delay between consecutive accesses to DATA_REG,