diff options
| author | Marc Zyngier <marc.zyngier@arm.com> | 2014-11-24 09:35:10 -0500 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-11-26 10:55:12 -0500 |
| commit | f5c1434c217fd72ac0d24d3142d09e49a3d4e72e (patch) | |
| tree | aecaafc7fe456cd46d2b6764ca7fcb870a3f4de6 /include/linux | |
| parent | 443acc4f37f61e343f3577dc28d7e7fd8b499465 (diff) | |
irqchip: GICv3: rework redistributor structure
The basic GICv3 driver has almost no use for the redistributor
(other than the basic per-CPU interrupts), but the ITS needs
a lot more from them.
As such, rework the set of data structures. The behaviour of the
GICv3 driver is otherwise unaffected.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 03a4ea37ba86..040615a48bf5 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h | |||
| @@ -49,6 +49,10 @@ | |||
| 49 | #define GICD_CTLR_ENABLE_G1A (1U << 1) | 49 | #define GICD_CTLR_ENABLE_G1A (1U << 1) |
| 50 | #define GICD_CTLR_ENABLE_G1 (1U << 0) | 50 | #define GICD_CTLR_ENABLE_G1 (1U << 0) |
| 51 | 51 | ||
| 52 | #define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1) | ||
| 53 | #define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32) | ||
| 54 | #define GICD_TYPER_LPIS (1U << 17) | ||
| 55 | |||
| 52 | #define GICD_IROUTER_SPI_MODE_ONE (0U << 31) | 56 | #define GICD_IROUTER_SPI_MODE_ONE (0U << 31) |
| 53 | #define GICD_IROUTER_SPI_MODE_ANY (1U << 31) | 57 | #define GICD_IROUTER_SPI_MODE_ANY (1U << 31) |
| 54 | 58 | ||
| @@ -189,6 +193,17 @@ | |||
| 189 | 193 | ||
| 190 | #include <linux/stringify.h> | 194 | #include <linux/stringify.h> |
| 191 | 195 | ||
| 196 | struct rdists { | ||
| 197 | struct { | ||
| 198 | void __iomem *rd_base; | ||
| 199 | struct page *pend_page; | ||
| 200 | phys_addr_t phys_base; | ||
| 201 | } __percpu *rdist; | ||
| 202 | struct page *prop_page; | ||
| 203 | int id_bits; | ||
| 204 | u64 flags; | ||
| 205 | }; | ||
| 206 | |||
| 192 | static inline void gic_write_eoir(u64 irq) | 207 | static inline void gic_write_eoir(u64 irq) |
| 193 | { | 208 | { |
| 194 | asm volatile("msr_s " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" (irq)); | 209 | asm volatile("msr_s " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" (irq)); |
