Merge tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Fix SDIO IRQ bug
   - MMC regulator improvements
   - Fix slot-gpio card detect bug
   - Add support for Driver Stage Register
   - Convert the common MMC OF parser to use GPIO descriptors
   - Convert MMC_CAP2_NO_MULTI_READ into a callback, ->multi_io_quirk()
   - Some additional minor fixes

  MMC host:
   - mmci: Support Qualcomm specific DML layer for DMA
   - dw_mmc: Use common MMC regulators
   - dw_mmc: Add support for Rock-chips RK3288
   - tmio: Enable runtime PM support
   - tmio: Add support for R-Car Gen2 SoCs
   - tmio: Several fixes and improvements
   - omap_hsmmc: Removed Balaji from MAINTAINERS
   - jz4740: add DMA and pre/post support
   - sdhci: Add support for Intel Braswell
   - sdhci: Several fixes and improvements"

* tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc: (119 commits)
  ARM: dts: fix MMC2 regulators for Exynos5420 Arndale Octa board
  mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency
  mmc: sdhci-acpi: Pass HID and UID to probe_slot
  mmc: sdhci-acpi: Get UID directly from acpi_device
  mmc, sdhci, bcm-kona, LLVMLinux: Remove use of __initconst
  mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
  mmc: sdhci: Let a driver override timeout clock frequency
  mmc: sdhci-pci: Add Bay Trail and Braswell SD card detect
  mmc: sdhci-pci: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers
  mmc: sdhci-acpi: Add a HID and UID for a SD Card host controller
  mmc: sdhci-acpi: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel host controllers
  mmc: sdhci: Add quirk for always getting TC with stop cmd
  mmc: core: restore detect line inversion semantics
  mmc: Fix incorrect warning when setting 0 Hz via debugfs
  mmc: Fix use of wrong device in mmc_gpiod_free_cd()
  mmc: atmel-mci: fix mismatched section on atmci_cleanup_slot
  mmc: rtsx_pci: Set power related cap2 macros
  mmc: core: Add new power_mode MMC_POWER_UNDEFINED
  mmc: sdhci: execute tuning when device is not busy
  mmc: atmel-mci: Release mmc resources on failure in probe
  ..

8 files changed, 61 insertions, 7 deletions

diff --git a/include/linux/atmel-mci.h b/include/linux/atmel-mci.h
index 4c7a4b2104bf..91b77f8d495d 100644
--- a/include/linux/atmel-mci.h
+++ b/include/linux/atmel-mci.h
@@ -1,6 +1,8 @@
 #ifndef __LINUX_ATMEL_MCI_H
 #define __LINUX_ATMEL_MCI_H
 
+#include <linux/types.h>
+
 #define ATMCI_MAX_NR_SLOTS      2
 
 /**
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 8f6f2e91e7ae..57388171610d 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -5,6 +5,7 @@
 #include <linux/fb.h>
 #include <linux/io.h>
 #include <linux/jiffies.h>
+#include <linux/mmc/card.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 
@@ -83,6 +84,27 @@
  */
 #define TMIO_MMC_HAVE_HIGH_REG          (1 << 6)
 
+/*
+ * Some controllers have CMD12 automatically
+ * issue/non-issue register
+ */
+#define TMIO_MMC_HAVE_CMD12_CTRL        (1 << 7)
+
+/*
+ * Some controllers needs to set 1 on SDIO status reserved bits
+ */
+#define TMIO_MMC_SDIO_STATUS_QUIRK      (1 << 8)
+
+/*
+ * Some controllers have DMA enable/disable register
+ */
+#define TMIO_MMC_HAVE_CTL_DMA_REG       (1 << 9)
+
+/*
+ * Some controllers allows to set SDx actual clock
+ */
+#define TMIO_MMC_CLK_ACTUAL             (1 << 10)
+
 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
@@ -96,6 +118,7 @@ struct tmio_mmc_dma {
         int slave_id_tx;
         int slave_id_rx;
         int alignment_shift;
+        dma_addr_t dma_rx_offset;
         bool (*filter)(struct dma_chan *chan, void *arg);
 };
 
@@ -120,6 +143,8 @@ struct tmio_mmc_data {
         /* clock management callbacks */
         int (*clk_enable)(struct platform_device *pdev, unsigned int *f);
         void (*clk_disable)(struct platform_device *pdev);
+        int (*multi_io_quirk)(struct mmc_card *card,
+                              unsigned int direction, int blk_size);
 };
 
 /*
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index d424b9de3aff..b0692d28f8e6 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -42,7 +42,8 @@ struct mmc_csd {
         unsigned int            read_partial:1,
                                 read_misalign:1,
                                 write_partial:1,
-                                write_misalign:1;
+                                write_misalign:1,
+                                dsr_imp:1;
 };
 
 struct mmc_ext_csd {
@@ -74,7 +75,7 @@ struct mmc_ext_csd {
         unsigned int            sec_trim_mult;  /* Secure trim multiplier  */
         unsigned int            sec_erase_mult; /* Secure erase multiplier */
         unsigned int            trim_timeout;           /* In milliseconds */
-        bool                    enhanced_area_en;       /* enable bit */
+        bool                    partition_setting_completed;    /* enable bit */
         unsigned long long      enhanced_area_offset;   /* Units: Byte */
         unsigned int            enhanced_area_size;     /* Units: KB */
         unsigned int            cache_size;             /* Units: KB */
@@ -214,11 +215,12 @@ enum mmc_blk_status {
 };
 
 /* The number of MMC physical partitions.  These consist of:
- * boot partitions (2), general purpose partitions (4) in MMC v4.4.
+ * boot partitions (2), general purpose partitions (4) and
+ * RPMB partition (1) in MMC v4.4.
  */
 #define MMC_NUM_BOOT_PARTITION  2
 #define MMC_NUM_GP_PARTITION    4
-#define MMC_NUM_PHY_PARTITION   6
+#define MMC_NUM_PHY_PARTITION   7
 #define MAX_MMC_PART_NAME_LEN   20
 
 /*
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 29ce014ab421..001366927cf4 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -26,6 +26,8 @@ enum dw_mci_state {
         STATE_DATA_BUSY,
         STATE_SENDING_STOP,
         STATE_DATA_ERROR,
+        STATE_SENDING_CMD11,
+        STATE_WAITING_CMD11_DONE,
 };
 
 enum {
@@ -188,7 +190,7 @@ struct dw_mci {
         /* Workaround flags */
         u32                     quirks;
 
-        struct regulator        *vmmc;  /* Power regulator */
+        bool                    vqmmc_enabled;
         unsigned long           irq_flags; /* IRQ flags */
         int                     irq;
 };
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 7960424d0bc0..df0c15396bbf 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -42,6 +42,7 @@ struct mmc_ios {
 #define MMC_POWER_OFF           0
 #define MMC_POWER_UP            1
 #define MMC_POWER_ON            2
+#define MMC_POWER_UNDEFINED     3
 
         unsigned char   bus_width;              /* data bus width */
 
@@ -139,6 +140,13 @@ struct mmc_host_ops {
         int     (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
         void    (*hw_reset)(struct mmc_host *host);
         void    (*card_event)(struct mmc_host *host);
+
+        /*
+         * Optional callback to support controllers with HW issues for multiple
+         * I/O. Returns the number of supported blocks for the request.
+         */
+        int     (*multi_io_quirk)(struct mmc_card *card,
+                                  unsigned int direction, int blk_size);
 };
 
 struct mmc_card;
@@ -265,7 +273,6 @@ struct mmc_host {
 
 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
-#define MMC_CAP2_NO_MULTI_READ  (1 << 3)        /* Multiblock reads don't work */
 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 #define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
@@ -365,6 +372,9 @@ struct mmc_host {
 
         unsigned int            slotno; /* used for sdio acpi binding */
 
+        int                     dsr_req;        /* DSR value is valid */
+        u32                     dsr;    /* optional driver stage (DSR) value */
+
         unsigned long           private[0] ____cacheline_aligned;
 };
 
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 64ec963ed347..1cd00b3a75b9 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -53,6 +53,11 @@
 #define MMC_SEND_TUNING_BLOCK    19   /* adtc                    R1  */
 #define MMC_SEND_TUNING_BLOCK_HS200     21      /* adtc R1  */
 
+#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE         64
+#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE        128
+extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
+extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
+
   /* class 3 */
 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
 
@@ -281,6 +286,7 @@ struct _mmc_csd {
 #define EXT_CSD_EXP_EVENTS_CTRL         56      /* R/W, 2 bytes */
 #define EXT_CSD_DATA_SECTOR_SIZE        61      /* R */
 #define EXT_CSD_GP_SIZE_MULT            143     /* R/W */
+#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
 #define EXT_CSD_PARTITION_ATTRIBUTE     156     /* R/W */
 #define EXT_CSD_PARTITION_SUPPORT       160     /* RO */
 #define EXT_CSD_HPI_MGMT                161     /* R/W */
@@ -349,6 +355,7 @@ struct _mmc_csd {
 #define EXT_CSD_PART_CONFIG_ACC_RPMB    (0x3)
 #define EXT_CSD_PART_CONFIG_ACC_GP0     (0x4)
 
+#define EXT_CSD_PART_SETTING_COMPLETED  (0x1)
 #define EXT_CSD_PART_SUPPORT_PART_EN    (0x1)
 
 #define EXT_CSD_CMD_SET_NORMAL          (1<<0)
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 09ebe57d5ce9..dba793e3a331 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -98,6 +98,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_HS200                       (1<<6)
 /* Controller does not support DDR50 */
 #define SDHCI_QUIRK2_BROKEN_DDR50                       (1<<7)
+/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
+#define SDHCI_QUIRK2_STOP_WITH_TC                       (1<<8)
 
         int irq;                /* Device IRQ */
         void __iomem *ioaddr;   /* Mapped address */
@@ -146,6 +148,7 @@ struct sdhci_host {
         struct mmc_command *cmd;        /* Current command */
         struct mmc_data *data;  /* Current data request */
         unsigned int data_early:1;      /* Data finished before cmd */
+        unsigned int busy_handle:1;     /* Handling the order of Busy-end */
 
         struct sg_mapping_iter sg_miter;        /* SG state for PIO */
         unsigned int blocks;    /* remaining PIO blocks */
diff --git a/include/linux/mmc/slot-gpio.h b/include/linux/mmc/slot-gpio.h
index d2433381e828..e56fa24c9322 100644
--- a/include/linux/mmc/slot-gpio.h
+++ b/include/linux/mmc/slot-gpio.h
@@ -24,7 +24,10 @@ void mmc_gpio_free_cd(struct mmc_host *host);
 
 int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id,
                          unsigned int idx, bool override_active_level,
-                         unsigned int debounce);
+                         unsigned int debounce, bool *gpio_invert);
+int mmc_gpiod_request_ro(struct mmc_host *host, const char *con_id,
+                         unsigned int idx, bool override_active_level,
+                         unsigned int debounce, bool *gpio_invert);
 void mmc_gpiod_free_cd(struct mmc_host *host);
 void mmc_gpiod_request_cd_irq(struct mmc_host *host);