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authorMark Brown <broonie@linaro.org>2014-04-10 18:39:37 -0400
committerMark Brown <broonie@linaro.org>2014-04-10 18:39:37 -0400
commited59c8f93d153d9215222d5a2e23644a315bce2f (patch)
tree10b0991565d38c82a49520fb4a567be68bb68b26 /include/linux
parent455c6fdbd219161bd09b1165f11699d6d73de11c (diff)
parent5481b348e80fb280ff9eaa17ad99a5b592c7e145 (diff)
Merge tag 'regulator-v3.15' into regulator-linus
regulator: Updates for v3.15 This release has lots and lots of small cleanups and fixes in the regulator subsystem, mainly cleaning up some bad patterns that got duplicated in DT code, but otherwise very little of note outside of the scope of the relevant drivers: - Support for configuration of the initial state for gpio regulators with multi-voltage support. - Support for calling regulator_set_voltage() on fixed regulators. - New drivers for Broadcom BCM590xx, Freescale pfuze200, Samsung S2MPA01 & S2MPS11/4, some PWM controlled regulators found on some ST boards and TI TPS65218. # gpg: Signature made Mon 31 Mar 2014 12:29:14 BST using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/device.h1
-rw-r--r--include/linux/mfd/samsung/core.h22
-rw-r--r--include/linux/mfd/samsung/irq.h81
-rw-r--r--include/linux/mfd/samsung/rtc.h57
-rw-r--r--include/linux/mfd/samsung/s2mpa01.h192
-rw-r--r--include/linux/mfd/samsung/s2mps14.h154
-rw-r--r--include/linux/mfd/samsung/s5m8767.h7
-rw-r--r--include/linux/of.h76
-rw-r--r--include/linux/regulator/driver.h8
-rw-r--r--include/linux/regulator/pfuze100.h14
10 files changed, 597 insertions, 15 deletions
diff --git a/include/linux/device.h b/include/linux/device.h
index 952b01033c32..ec1b6e21f0ef 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -626,6 +626,7 @@ static inline void *devm_kcalloc(struct device *dev,
626 return devm_kmalloc_array(dev, n, size, flags | __GFP_ZERO); 626 return devm_kmalloc_array(dev, n, size, flags | __GFP_ZERO);
627} 627}
628extern void devm_kfree(struct device *dev, void *p); 628extern void devm_kfree(struct device *dev, void *p);
629extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp);
629 630
630void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res); 631void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res);
631void __iomem *devm_request_and_ioremap(struct device *dev, 632void __iomem *devm_request_and_ioremap(struct device *dev,
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 41c9bde410c5..157e32b6ca28 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -18,7 +18,9 @@ enum sec_device_type {
18 S5M8751X, 18 S5M8751X,
19 S5M8763X, 19 S5M8763X,
20 S5M8767X, 20 S5M8767X,
21 S2MPA01,
21 S2MPS11X, 22 S2MPS11X,
23 S2MPS14X,
22}; 24};
23 25
24/** 26/**
@@ -50,7 +52,7 @@ struct sec_pmic_dev {
50 struct regmap_irq_chip_data *irq_data; 52 struct regmap_irq_chip_data *irq_data;
51 53
52 int ono; 54 int ono;
53 int type; 55 unsigned long type;
54 bool wakeup; 56 bool wakeup;
55 bool wtsr_smpl; 57 bool wtsr_smpl;
56}; 58};
@@ -92,7 +94,7 @@ struct sec_platform_data {
92 int buck3_default_idx; 94 int buck3_default_idx;
93 int buck4_default_idx; 95 int buck4_default_idx;
94 96
95 int buck_ramp_delay; 97 int buck_ramp_delay;
96 98
97 int buck2_ramp_delay; 99 int buck2_ramp_delay;
98 int buck34_ramp_delay; 100 int buck34_ramp_delay;
@@ -100,10 +102,15 @@ struct sec_platform_data {
100 int buck16_ramp_delay; 102 int buck16_ramp_delay;
101 int buck7810_ramp_delay; 103 int buck7810_ramp_delay;
102 int buck9_ramp_delay; 104 int buck9_ramp_delay;
103 105 int buck24_ramp_delay;
104 bool buck2_ramp_enable; 106 int buck3_ramp_delay;
105 bool buck3_ramp_enable; 107 int buck7_ramp_delay;
106 bool buck4_ramp_enable; 108 int buck8910_ramp_delay;
109
110 bool buck1_ramp_enable;
111 bool buck2_ramp_enable;
112 bool buck3_ramp_enable;
113 bool buck4_ramp_enable;
107 bool buck6_ramp_enable; 114 bool buck6_ramp_enable;
108 115
109 int buck2_init; 116 int buck2_init;
@@ -119,7 +126,8 @@ struct sec_platform_data {
119struct sec_regulator_data { 126struct sec_regulator_data {
120 int id; 127 int id;
121 struct regulator_init_data *initdata; 128 struct regulator_init_data *initdata;
122 struct device_node *reg_node; 129 struct device_node *reg_node;
130 int ext_control_gpio;
123}; 131};
124 132
125/* 133/*
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index d43b4f9e7fb2..1224f447356b 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -13,6 +13,56 @@
13#ifndef __LINUX_MFD_SEC_IRQ_H 13#ifndef __LINUX_MFD_SEC_IRQ_H
14#define __LINUX_MFD_SEC_IRQ_H 14#define __LINUX_MFD_SEC_IRQ_H
15 15
16enum s2mpa01_irq {
17 S2MPA01_IRQ_PWRONF,
18 S2MPA01_IRQ_PWRONR,
19 S2MPA01_IRQ_JIGONBF,
20 S2MPA01_IRQ_JIGONBR,
21 S2MPA01_IRQ_ACOKBF,
22 S2MPA01_IRQ_ACOKBR,
23 S2MPA01_IRQ_PWRON1S,
24 S2MPA01_IRQ_MRB,
25
26 S2MPA01_IRQ_RTC60S,
27 S2MPA01_IRQ_RTCA1,
28 S2MPA01_IRQ_RTCA0,
29 S2MPA01_IRQ_SMPL,
30 S2MPA01_IRQ_RTC1S,
31 S2MPA01_IRQ_WTSR,
32
33 S2MPA01_IRQ_INT120C,
34 S2MPA01_IRQ_INT140C,
35 S2MPA01_IRQ_LDO3_TSD,
36 S2MPA01_IRQ_B16_TSD,
37 S2MPA01_IRQ_B24_TSD,
38 S2MPA01_IRQ_B35_TSD,
39
40 S2MPA01_IRQ_NR,
41};
42
43#define S2MPA01_IRQ_PWRONF_MASK (1 << 0)
44#define S2MPA01_IRQ_PWRONR_MASK (1 << 1)
45#define S2MPA01_IRQ_JIGONBF_MASK (1 << 2)
46#define S2MPA01_IRQ_JIGONBR_MASK (1 << 3)
47#define S2MPA01_IRQ_ACOKBF_MASK (1 << 4)
48#define S2MPA01_IRQ_ACOKBR_MASK (1 << 5)
49#define S2MPA01_IRQ_PWRON1S_MASK (1 << 6)
50#define S2MPA01_IRQ_MRB_MASK (1 << 7)
51
52#define S2MPA01_IRQ_RTC60S_MASK (1 << 0)
53#define S2MPA01_IRQ_RTCA1_MASK (1 << 1)
54#define S2MPA01_IRQ_RTCA0_MASK (1 << 2)
55#define S2MPA01_IRQ_SMPL_MASK (1 << 3)
56#define S2MPA01_IRQ_RTC1S_MASK (1 << 4)
57#define S2MPA01_IRQ_WTSR_MASK (1 << 5)
58
59#define S2MPA01_IRQ_INT120C_MASK (1 << 0)
60#define S2MPA01_IRQ_INT140C_MASK (1 << 1)
61#define S2MPA01_IRQ_LDO3_TSD_MASK (1 << 2)
62#define S2MPA01_IRQ_B16_TSD_MASK (1 << 3)
63#define S2MPA01_IRQ_B24_TSD_MASK (1 << 4)
64#define S2MPA01_IRQ_B35_TSD_MASK (1 << 5)
65
16enum s2mps11_irq { 66enum s2mps11_irq {
17 S2MPS11_IRQ_PWRONF, 67 S2MPS11_IRQ_PWRONF,
18 S2MPS11_IRQ_PWRONR, 68 S2MPS11_IRQ_PWRONR,
@@ -24,8 +74,8 @@ enum s2mps11_irq {
24 S2MPS11_IRQ_MRB, 74 S2MPS11_IRQ_MRB,
25 75
26 S2MPS11_IRQ_RTC60S, 76 S2MPS11_IRQ_RTC60S,
77 S2MPS11_IRQ_RTCA0,
27 S2MPS11_IRQ_RTCA1, 78 S2MPS11_IRQ_RTCA1,
28 S2MPS11_IRQ_RTCA2,
29 S2MPS11_IRQ_SMPL, 79 S2MPS11_IRQ_SMPL,
30 S2MPS11_IRQ_RTC1S, 80 S2MPS11_IRQ_RTC1S,
31 S2MPS11_IRQ_WTSR, 81 S2MPS11_IRQ_WTSR,
@@ -47,7 +97,7 @@ enum s2mps11_irq {
47 97
48#define S2MPS11_IRQ_RTC60S_MASK (1 << 0) 98#define S2MPS11_IRQ_RTC60S_MASK (1 << 0)
49#define S2MPS11_IRQ_RTCA1_MASK (1 << 1) 99#define S2MPS11_IRQ_RTCA1_MASK (1 << 1)
50#define S2MPS11_IRQ_RTCA2_MASK (1 << 2) 100#define S2MPS11_IRQ_RTCA0_MASK (1 << 2)
51#define S2MPS11_IRQ_SMPL_MASK (1 << 3) 101#define S2MPS11_IRQ_SMPL_MASK (1 << 3)
52#define S2MPS11_IRQ_RTC1S_MASK (1 << 4) 102#define S2MPS11_IRQ_RTC1S_MASK (1 << 4)
53#define S2MPS11_IRQ_WTSR_MASK (1 << 5) 103#define S2MPS11_IRQ_WTSR_MASK (1 << 5)
@@ -55,6 +105,33 @@ enum s2mps11_irq {
55#define S2MPS11_IRQ_INT120C_MASK (1 << 0) 105#define S2MPS11_IRQ_INT120C_MASK (1 << 0)
56#define S2MPS11_IRQ_INT140C_MASK (1 << 1) 106#define S2MPS11_IRQ_INT140C_MASK (1 << 1)
57 107
108enum s2mps14_irq {
109 S2MPS14_IRQ_PWRONF,
110 S2MPS14_IRQ_PWRONR,
111 S2MPS14_IRQ_JIGONBF,
112 S2MPS14_IRQ_JIGONBR,
113 S2MPS14_IRQ_ACOKBF,
114 S2MPS14_IRQ_ACOKBR,
115 S2MPS14_IRQ_PWRON1S,
116 S2MPS14_IRQ_MRB,
117
118 S2MPS14_IRQ_RTC60S,
119 S2MPS14_IRQ_RTCA1,
120 S2MPS14_IRQ_RTCA0,
121 S2MPS14_IRQ_SMPL,
122 S2MPS14_IRQ_RTC1S,
123 S2MPS14_IRQ_WTSR,
124
125 S2MPS14_IRQ_INT120C,
126 S2MPS14_IRQ_INT140C,
127 S2MPS14_IRQ_TSD,
128
129 S2MPS14_IRQ_NR,
130};
131
132/* Masks for interrupts are the same as in s2mps11 */
133#define S2MPS14_IRQ_TSD_MASK (1 << 2)
134
58enum s5m8767_irq { 135enum s5m8767_irq {
59 S5M8767_IRQ_PWRR, 136 S5M8767_IRQ_PWRR,
60 S5M8767_IRQ_PWRF, 137 S5M8767_IRQ_PWRF,
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h
index 94b7cd6d8891..3e02b768d537 100644
--- a/include/linux/mfd/samsung/rtc.h
+++ b/include/linux/mfd/samsung/rtc.h
@@ -1,12 +1,17 @@
1/* rtc.h 1/* rtc.h
2 * 2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd 3 * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd
4 * http://www.samsung.com 4 * http://www.samsung.com
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
10 * 15 *
11 */ 16 */
12 17
@@ -43,6 +48,39 @@ enum sec_rtc_reg {
43 SEC_RTC_STATUS, 48 SEC_RTC_STATUS,
44 SEC_WTSR_SMPL_CNTL, 49 SEC_WTSR_SMPL_CNTL,
45 SEC_RTC_UDR_CON, 50 SEC_RTC_UDR_CON,
51
52 SEC_RTC_REG_MAX,
53};
54
55enum s2mps_rtc_reg {
56 S2MPS_RTC_CTRL,
57 S2MPS_WTSR_SMPL_CNTL,
58 S2MPS_RTC_UDR_CON,
59 S2MPS_RSVD,
60 S2MPS_RTC_SEC,
61 S2MPS_RTC_MIN,
62 S2MPS_RTC_HOUR,
63 S2MPS_RTC_WEEKDAY,
64 S2MPS_RTC_DATE,
65 S2MPS_RTC_MONTH,
66 S2MPS_RTC_YEAR,
67 S2MPS_ALARM0_SEC,
68 S2MPS_ALARM0_MIN,
69 S2MPS_ALARM0_HOUR,
70 S2MPS_ALARM0_WEEKDAY,
71 S2MPS_ALARM0_DATE,
72 S2MPS_ALARM0_MONTH,
73 S2MPS_ALARM0_YEAR,
74 S2MPS_ALARM1_SEC,
75 S2MPS_ALARM1_MIN,
76 S2MPS_ALARM1_HOUR,
77 S2MPS_ALARM1_WEEKDAY,
78 S2MPS_ALARM1_DATE,
79 S2MPS_ALARM1_MONTH,
80 S2MPS_ALARM1_YEAR,
81 S2MPS_OFFSRC,
82
83 S2MPS_RTC_REG_MAX,
46}; 84};
47 85
48#define RTC_I2C_ADDR (0x0C >> 1) 86#define RTC_I2C_ADDR (0x0C >> 1)
@@ -54,6 +92,9 @@ enum sec_rtc_reg {
54#define ALARM1_STATUS (1 << 2) 92#define ALARM1_STATUS (1 << 2)
55#define UPDATE_AD (1 << 0) 93#define UPDATE_AD (1 << 0)
56 94
95#define S2MPS_ALARM0_STATUS (1 << 2)
96#define S2MPS_ALARM1_STATUS (1 << 1)
97
57/* RTC Control Register */ 98/* RTC Control Register */
58#define BCD_EN_SHIFT 0 99#define BCD_EN_SHIFT 0
59#define BCD_EN_MASK (1 << BCD_EN_SHIFT) 100#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
@@ -62,6 +103,10 @@ enum sec_rtc_reg {
62/* RTC Update Register1 */ 103/* RTC Update Register1 */
63#define RTC_UDR_SHIFT 0 104#define RTC_UDR_SHIFT 0
64#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) 105#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
106#define S2MPS_RTC_WUDR_SHIFT 4
107#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
108#define S2MPS_RTC_RUDR_SHIFT 0
109#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
65#define RTC_TCON_SHIFT 1 110#define RTC_TCON_SHIFT 1
66#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) 111#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
67#define RTC_TIME_EN_SHIFT 3 112#define RTC_TIME_EN_SHIFT 3
diff --git a/include/linux/mfd/samsung/s2mpa01.h b/include/linux/mfd/samsung/s2mpa01.h
new file mode 100644
index 000000000000..fbc63bc0d6a2
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mpa01.h
@@ -0,0 +1,192 @@
1/*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd
3 * http://www.samsung.com
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#ifndef __LINUX_MFD_S2MPA01_H
13#define __LINUX_MFD_S2MPA01_H
14
15/* S2MPA01 registers */
16enum s2mpa01_reg {
17 S2MPA01_REG_ID,
18 S2MPA01_REG_INT1,
19 S2MPA01_REG_INT2,
20 S2MPA01_REG_INT3,
21 S2MPA01_REG_INT1M,
22 S2MPA01_REG_INT2M,
23 S2MPA01_REG_INT3M,
24 S2MPA01_REG_ST1,
25 S2MPA01_REG_ST2,
26 S2MPA01_REG_PWRONSRC,
27 S2MPA01_REG_OFFSRC,
28 S2MPA01_REG_RTC_BUF,
29 S2MPA01_REG_CTRL1,
30 S2MPA01_REG_ETC_TEST,
31 S2MPA01_REG_RSVD1,
32 S2MPA01_REG_BU_CHG,
33 S2MPA01_REG_RAMP1,
34 S2MPA01_REG_RAMP2,
35 S2MPA01_REG_LDO_DSCH1,
36 S2MPA01_REG_LDO_DSCH2,
37 S2MPA01_REG_LDO_DSCH3,
38 S2MPA01_REG_LDO_DSCH4,
39 S2MPA01_REG_OTP_ADRL,
40 S2MPA01_REG_OTP_ADRH,
41 S2MPA01_REG_OTP_DATA,
42 S2MPA01_REG_MON1SEL,
43 S2MPA01_REG_MON2SEL,
44 S2MPA01_REG_LEE,
45 S2MPA01_REG_RSVD2,
46 S2MPA01_REG_RSVD3,
47 S2MPA01_REG_RSVD4,
48 S2MPA01_REG_RSVD5,
49 S2MPA01_REG_RSVD6,
50 S2MPA01_REG_TOP_RSVD,
51 S2MPA01_REG_DVS_SEL,
52 S2MPA01_REG_DVS_PTR,
53 S2MPA01_REG_DVS_DATA,
54 S2MPA01_REG_RSVD_NO,
55 S2MPA01_REG_UVLO,
56 S2MPA01_REG_LEE_NO,
57 S2MPA01_REG_B1CTRL1,
58 S2MPA01_REG_B1CTRL2,
59 S2MPA01_REG_B2CTRL1,
60 S2MPA01_REG_B2CTRL2,
61 S2MPA01_REG_B3CTRL1,
62 S2MPA01_REG_B3CTRL2,
63 S2MPA01_REG_B4CTRL1,
64 S2MPA01_REG_B4CTRL2,
65 S2MPA01_REG_B5CTRL1,
66 S2MPA01_REG_B5CTRL2,
67 S2MPA01_REG_B5CTRL3,
68 S2MPA01_REG_B5CTRL4,
69 S2MPA01_REG_B5CTRL5,
70 S2MPA01_REG_B5CTRL6,
71 S2MPA01_REG_B6CTRL1,
72 S2MPA01_REG_B6CTRL2,
73 S2MPA01_REG_B7CTRL1,
74 S2MPA01_REG_B7CTRL2,
75 S2MPA01_REG_B8CTRL1,
76 S2MPA01_REG_B8CTRL2,
77 S2MPA01_REG_B9CTRL1,
78 S2MPA01_REG_B9CTRL2,
79 S2MPA01_REG_B10CTRL1,
80 S2MPA01_REG_B10CTRL2,
81 S2MPA01_REG_L1CTRL,
82 S2MPA01_REG_L2CTRL,
83 S2MPA01_REG_L3CTRL,
84 S2MPA01_REG_L4CTRL,
85 S2MPA01_REG_L5CTRL,
86 S2MPA01_REG_L6CTRL,
87 S2MPA01_REG_L7CTRL,
88 S2MPA01_REG_L8CTRL,
89 S2MPA01_REG_L9CTRL,
90 S2MPA01_REG_L10CTRL,
91 S2MPA01_REG_L11CTRL,
92 S2MPA01_REG_L12CTRL,
93 S2MPA01_REG_L13CTRL,
94 S2MPA01_REG_L14CTRL,
95 S2MPA01_REG_L15CTRL,
96 S2MPA01_REG_L16CTRL,
97 S2MPA01_REG_L17CTRL,
98 S2MPA01_REG_L18CTRL,
99 S2MPA01_REG_L19CTRL,
100 S2MPA01_REG_L20CTRL,
101 S2MPA01_REG_L21CTRL,
102 S2MPA01_REG_L22CTRL,
103 S2MPA01_REG_L23CTRL,
104 S2MPA01_REG_L24CTRL,
105 S2MPA01_REG_L25CTRL,
106 S2MPA01_REG_L26CTRL,
107
108 S2MPA01_REG_LDO_OVCB1,
109 S2MPA01_REG_LDO_OVCB2,
110 S2MPA01_REG_LDO_OVCB3,
111 S2MPA01_REG_LDO_OVCB4,
112
113};
114
115/* S2MPA01 regulator ids */
116enum s2mpa01_regulators {
117 S2MPA01_LDO1,
118 S2MPA01_LDO2,
119 S2MPA01_LDO3,
120 S2MPA01_LDO4,
121 S2MPA01_LDO5,
122 S2MPA01_LDO6,
123 S2MPA01_LDO7,
124 S2MPA01_LDO8,
125 S2MPA01_LDO9,
126 S2MPA01_LDO10,
127 S2MPA01_LDO11,
128 S2MPA01_LDO12,
129 S2MPA01_LDO13,
130 S2MPA01_LDO14,
131 S2MPA01_LDO15,
132 S2MPA01_LDO16,
133 S2MPA01_LDO17,
134 S2MPA01_LDO18,
135 S2MPA01_LDO19,
136 S2MPA01_LDO20,
137 S2MPA01_LDO21,
138 S2MPA01_LDO22,
139 S2MPA01_LDO23,
140 S2MPA01_LDO24,
141 S2MPA01_LDO25,
142 S2MPA01_LDO26,
143
144 S2MPA01_BUCK1,
145 S2MPA01_BUCK2,
146 S2MPA01_BUCK3,
147 S2MPA01_BUCK4,
148 S2MPA01_BUCK5,
149 S2MPA01_BUCK6,
150 S2MPA01_BUCK7,
151 S2MPA01_BUCK8,
152 S2MPA01_BUCK9,
153 S2MPA01_BUCK10,
154
155 S2MPA01_REGULATOR_MAX,
156};
157
158#define S2MPA01_BUCK_MIN1 600000
159#define S2MPA01_BUCK_MIN2 800000
160#define S2MPA01_BUCK_MIN3 1000000
161#define S2MPA01_BUCK_MIN4 1500000
162#define S2MPA01_LDO_MIN 800000
163
164#define S2MPA01_BUCK_STEP1 6250
165#define S2MPA01_BUCK_STEP2 12500
166
167#define S2MPA01_LDO_STEP1 50000
168#define S2MPA01_LDO_STEP2 25000
169
170#define S2MPA01_LDO_VSEL_MASK 0x3F
171#define S2MPA01_BUCK_VSEL_MASK 0xFF
172#define S2MPA01_ENABLE_MASK (0x03 << S2MPA01_ENABLE_SHIFT)
173#define S2MPA01_ENABLE_SHIFT 0x06
174#define S2MPA01_LDO_N_VOLTAGES (S2MPA01_LDO_VSEL_MASK + 1)
175#define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1)
176
177#define S2MPA01_RAMP_DELAY 12500 /* uV/us */
178
179#define S2MPA01_BUCK16_RAMP_SHIFT 4
180#define S2MPA01_BUCK24_RAMP_SHIFT 6
181#define S2MPA01_BUCK3_RAMP_SHIFT 4
182#define S2MPA01_BUCK5_RAMP_SHIFT 6
183#define S2MPA01_BUCK7_RAMP_SHIFT 2
184#define S2MPA01_BUCK8910_RAMP_SHIFT 0
185
186#define S2MPA01_BUCK1_RAMP_EN_SHIFT 3
187#define S2MPA01_BUCK2_RAMP_EN_SHIFT 2
188#define S2MPA01_BUCK3_RAMP_EN_SHIFT 1
189#define S2MPA01_BUCK4_RAMP_EN_SHIFT 0
190#define S2MPA01_PMIC_EN_SHIFT 6
191
192#endif /*__LINUX_MFD_S2MPA01_H */
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h
new file mode 100644
index 000000000000..4b449b8ac548
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -0,0 +1,154 @@
1/*
2 * s2mps14.h
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __LINUX_MFD_S2MPS14_H
20#define __LINUX_MFD_S2MPS14_H
21
22/* S2MPS14 registers */
23enum s2mps14_reg {
24 S2MPS14_REG_ID,
25 S2MPS14_REG_INT1,
26 S2MPS14_REG_INT2,
27 S2MPS14_REG_INT3,
28 S2MPS14_REG_INT1M,
29 S2MPS14_REG_INT2M,
30 S2MPS14_REG_INT3M,
31 S2MPS14_REG_ST1,
32 S2MPS14_REG_ST2,
33 S2MPS14_REG_PWRONSRC,
34 S2MPS14_REG_OFFSRC,
35 S2MPS14_REG_BU_CHG,
36 S2MPS14_REG_RTCCTRL,
37 S2MPS14_REG_CTRL1,
38 S2MPS14_REG_CTRL2,
39 S2MPS14_REG_RSVD1,
40 S2MPS14_REG_RSVD2,
41 S2MPS14_REG_RSVD3,
42 S2MPS14_REG_RSVD4,
43 S2MPS14_REG_RSVD5,
44 S2MPS14_REG_RSVD6,
45 S2MPS14_REG_CTRL3,
46 S2MPS14_REG_RSVD7,
47 S2MPS14_REG_RSVD8,
48 S2MPS14_REG_WRSTBI,
49 S2MPS14_REG_B1CTRL1,
50 S2MPS14_REG_B1CTRL2,
51 S2MPS14_REG_B2CTRL1,
52 S2MPS14_REG_B2CTRL2,
53 S2MPS14_REG_B3CTRL1,
54 S2MPS14_REG_B3CTRL2,
55 S2MPS14_REG_B4CTRL1,
56 S2MPS14_REG_B4CTRL2,
57 S2MPS14_REG_B5CTRL1,
58 S2MPS14_REG_B5CTRL2,
59 S2MPS14_REG_L1CTRL,
60 S2MPS14_REG_L2CTRL,
61 S2MPS14_REG_L3CTRL,
62 S2MPS14_REG_L4CTRL,
63 S2MPS14_REG_L5CTRL,
64 S2MPS14_REG_L6CTRL,
65 S2MPS14_REG_L7CTRL,
66 S2MPS14_REG_L8CTRL,
67 S2MPS14_REG_L9CTRL,
68 S2MPS14_REG_L10CTRL,
69 S2MPS14_REG_L11CTRL,
70 S2MPS14_REG_L12CTRL,
71 S2MPS14_REG_L13CTRL,
72 S2MPS14_REG_L14CTRL,
73 S2MPS14_REG_L15CTRL,
74 S2MPS14_REG_L16CTRL,
75 S2MPS14_REG_L17CTRL,
76 S2MPS14_REG_L18CTRL,
77 S2MPS14_REG_L19CTRL,
78 S2MPS14_REG_L20CTRL,
79 S2MPS14_REG_L21CTRL,
80 S2MPS14_REG_L22CTRL,
81 S2MPS14_REG_L23CTRL,
82 S2MPS14_REG_L24CTRL,
83 S2MPS14_REG_L25CTRL,
84 S2MPS14_REG_LDODSCH1,
85 S2MPS14_REG_LDODSCH2,
86 S2MPS14_REG_LDODSCH3,
87};
88
89/* S2MPS14 regulator ids */
90enum s2mps14_regulators {
91 S2MPS14_LDO1,
92 S2MPS14_LDO2,
93 S2MPS14_LDO3,
94 S2MPS14_LDO4,
95 S2MPS14_LDO5,
96 S2MPS14_LDO6,
97 S2MPS14_LDO7,
98 S2MPS14_LDO8,
99 S2MPS14_LDO9,
100 S2MPS14_LDO10,
101 S2MPS14_LDO11,
102 S2MPS14_LDO12,
103 S2MPS14_LDO13,
104 S2MPS14_LDO14,
105 S2MPS14_LDO15,
106 S2MPS14_LDO16,
107 S2MPS14_LDO17,
108 S2MPS14_LDO18,
109 S2MPS14_LDO19,
110 S2MPS14_LDO20,
111 S2MPS14_LDO21,
112 S2MPS14_LDO22,
113 S2MPS14_LDO23,
114 S2MPS14_LDO24,
115 S2MPS14_LDO25,
116 S2MPS14_BUCK1,
117 S2MPS14_BUCK2,
118 S2MPS14_BUCK3,
119 S2MPS14_BUCK4,
120 S2MPS14_BUCK5,
121
122 S2MPS14_REGULATOR_MAX,
123};
124
125/* Regulator constraints for BUCKx */
126#define S2MPS14_BUCK1235_MIN_600MV 600000
127#define S2MPS14_BUCK4_MIN_1400MV 1400000
128#define S2MPS14_BUCK1235_STEP_6_25MV 6250
129#define S2MPS14_BUCK4_STEP_12_5MV 12500
130#define S2MPS14_BUCK1235_START_SEL 0x20
131#define S2MPS14_BUCK4_START_SEL 0x40
132/*
133 * Default ramp delay in uv/us. Datasheet says that ramp delay can be
134 * controlled however it does not specify which register is used for that.
135 * Let's assume that default value will be set.
136 */
137#define S2MPS14_BUCK_RAMP_DELAY 12500
138
139/* Regulator constraints for different types of LDOx */
140#define S2MPS14_LDO_MIN_800MV 800000
141#define S2MPS14_LDO_MIN_1800MV 1800000
142#define S2MPS14_LDO_STEP_12_5MV 12500
143#define S2MPS14_LDO_STEP_25MV 25000
144
145#define S2MPS14_LDO_VSEL_MASK 0x3F
146#define S2MPS14_BUCK_VSEL_MASK 0xFF
147#define S2MPS14_ENABLE_MASK (0x03 << S2MPS14_ENABLE_SHIFT)
148#define S2MPS14_ENABLE_SHIFT 6
149/* On/Off controlled by PWREN */
150#define S2MPS14_ENABLE_SUSPEND (0x01 << S2MPS14_ENABLE_SHIFT)
151#define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1)
152#define S2MPS14_BUCK_N_VOLTAGES (S2MPS14_BUCK_VSEL_MASK + 1)
153
154#endif /* __LINUX_MFD_S2MPS14_H */
diff --git a/include/linux/mfd/samsung/s5m8767.h b/include/linux/mfd/samsung/s5m8767.h
index 2ab0b0f03641..243b58fec33d 100644
--- a/include/linux/mfd/samsung/s5m8767.h
+++ b/include/linux/mfd/samsung/s5m8767.h
@@ -183,10 +183,17 @@ enum s5m8767_regulators {
183 S5M8767_REG_MAX, 183 S5M8767_REG_MAX,
184}; 184};
185 185
186/* LDO_EN/BUCK_EN field in registers */
186#define S5M8767_ENCTRL_SHIFT 6 187#define S5M8767_ENCTRL_SHIFT 6
187#define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT) 188#define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT)
188 189
189/* 190/*
191 * LDO_EN/BUCK_EN register value for controlling this Buck or LDO
192 * by GPIO (PWREN, BUCKEN).
193 */
194#define S5M8767_ENCTRL_USE_GPIO 0x1
195
196/*
190 * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values 197 * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
191 * in mV/us. 198 * in mV/us.
192 */ 199 */
diff --git a/include/linux/of.h b/include/linux/of.h
index 435cb995904d..83d1ac80c91e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -198,6 +198,8 @@ extern struct device_node *of_find_node_with_property(
198extern struct property *of_find_property(const struct device_node *np, 198extern struct property *of_find_property(const struct device_node *np,
199 const char *name, 199 const char *name,
200 int *lenp); 200 int *lenp);
201extern int of_property_count_elems_of_size(const struct device_node *np,
202 const char *propname, int elem_size);
201extern int of_property_read_u32_index(const struct device_node *np, 203extern int of_property_read_u32_index(const struct device_node *np,
202 const char *propname, 204 const char *propname,
203 u32 index, u32 *out_value); 205 u32 index, u32 *out_value);
@@ -390,6 +392,12 @@ static inline struct device_node *of_find_compatible_node(
390 return NULL; 392 return NULL;
391} 393}
392 394
395static inline int of_property_count_elems_of_size(const struct device_node *np,
396 const char *propname, int elem_size)
397{
398 return -ENOSYS;
399}
400
393static inline int of_property_read_u32_index(const struct device_node *np, 401static inline int of_property_read_u32_index(const struct device_node *np,
394 const char *propname, u32 index, u32 *out_value) 402 const char *propname, u32 index, u32 *out_value)
395{ 403{
@@ -536,6 +544,74 @@ static inline struct device_node *of_find_matching_node(
536} 544}
537 545
538/** 546/**
547 * of_property_count_u8_elems - Count the number of u8 elements in a property
548 *
549 * @np: device node from which the property value is to be read.
550 * @propname: name of the property to be searched.
551 *
552 * Search for a property in a device node and count the number of u8 elements
553 * in it. Returns number of elements on sucess, -EINVAL if the property does
554 * not exist or its length does not match a multiple of u8 and -ENODATA if the
555 * property does not have a value.
556 */
557static inline int of_property_count_u8_elems(const struct device_node *np,
558 const char *propname)
559{
560 return of_property_count_elems_of_size(np, propname, sizeof(u8));
561}
562
563/**
564 * of_property_count_u16_elems - Count the number of u16 elements in a property
565 *
566 * @np: device node from which the property value is to be read.
567 * @propname: name of the property to be searched.
568 *
569 * Search for a property in a device node and count the number of u16 elements
570 * in it. Returns number of elements on sucess, -EINVAL if the property does
571 * not exist or its length does not match a multiple of u16 and -ENODATA if the
572 * property does not have a value.
573 */
574static inline int of_property_count_u16_elems(const struct device_node *np,
575 const char *propname)
576{
577 return of_property_count_elems_of_size(np, propname, sizeof(u16));
578}
579
580/**
581 * of_property_count_u32_elems - Count the number of u32 elements in a property
582 *
583 * @np: device node from which the property value is to be read.
584 * @propname: name of the property to be searched.
585 *
586 * Search for a property in a device node and count the number of u32 elements
587 * in it. Returns number of elements on sucess, -EINVAL if the property does
588 * not exist or its length does not match a multiple of u32 and -ENODATA if the
589 * property does not have a value.
590 */
591static inline int of_property_count_u32_elems(const struct device_node *np,
592 const char *propname)
593{
594 return of_property_count_elems_of_size(np, propname, sizeof(u32));
595}
596
597/**
598 * of_property_count_u64_elems - Count the number of u64 elements in a property
599 *
600 * @np: device node from which the property value is to be read.
601 * @propname: name of the property to be searched.
602 *
603 * Search for a property in a device node and count the number of u64 elements
604 * in it. Returns number of elements on sucess, -EINVAL if the property does
605 * not exist or its length does not match a multiple of u64 and -ENODATA if the
606 * property does not have a value.
607 */
608static inline int of_property_count_u64_elems(const struct device_node *np,
609 const char *propname)
610{
611 return of_property_count_elems_of_size(np, propname, sizeof(u64));
612}
613
614/**
539 * of_property_read_bool - Findfrom a property 615 * of_property_read_bool - Findfrom a property
540 * @np: device node from which the property value is to be read. 616 * @np: device node from which the property value is to be read.
541 * @propname: name of the property to be searched. 617 * @propname: name of the property to be searched.
diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h
index 9370e65348a4..bbe03a1924c0 100644
--- a/include/linux/regulator/driver.h
+++ b/include/linux/regulator/driver.h
@@ -228,10 +228,14 @@ enum regulator_type {
228 * output when using regulator_set_voltage_sel_regmap 228 * output when using regulator_set_voltage_sel_regmap
229 * @enable_reg: Register for control when using regmap enable/disable ops 229 * @enable_reg: Register for control when using regmap enable/disable ops
230 * @enable_mask: Mask for control when using regmap enable/disable ops 230 * @enable_mask: Mask for control when using regmap enable/disable ops
231 * @enable_val: Enabling value for control when using regmap enable/disable ops
232 * @disable_val: Disabling value for control when using regmap enable/disable ops
231 * @enable_is_inverted: A flag to indicate set enable_mask bits to disable 233 * @enable_is_inverted: A flag to indicate set enable_mask bits to disable
232 * when using regulator_enable_regmap and friends APIs. 234 * when using regulator_enable_regmap and friends APIs.
233 * @bypass_reg: Register for control when using regmap set_bypass 235 * @bypass_reg: Register for control when using regmap set_bypass
234 * @bypass_mask: Mask for control when using regmap set_bypass 236 * @bypass_mask: Mask for control when using regmap set_bypass
237 * @bypass_val_on: Enabling value for control when using regmap set_bypass
238 * @bypass_val_off: Disabling value for control when using regmap set_bypass
235 * 239 *
236 * @enable_time: Time taken for initial enable of regulator (in uS). 240 * @enable_time: Time taken for initial enable of regulator (in uS).
237 */ 241 */
@@ -263,9 +267,13 @@ struct regulator_desc {
263 unsigned int apply_bit; 267 unsigned int apply_bit;
264 unsigned int enable_reg; 268 unsigned int enable_reg;
265 unsigned int enable_mask; 269 unsigned int enable_mask;
270 unsigned int enable_val;
271 unsigned int disable_val;
266 bool enable_is_inverted; 272 bool enable_is_inverted;
267 unsigned int bypass_reg; 273 unsigned int bypass_reg;
268 unsigned int bypass_mask; 274 unsigned int bypass_mask;
275 unsigned int bypass_val_on;
276 unsigned int bypass_val_off;
269 277
270 unsigned int enable_time; 278 unsigned int enable_time;
271}; 279};
diff --git a/include/linux/regulator/pfuze100.h b/include/linux/regulator/pfuze100.h
index 65d550bf3954..364f7a7c43db 100644
--- a/include/linux/regulator/pfuze100.h
+++ b/include/linux/regulator/pfuze100.h
@@ -35,6 +35,20 @@
35#define PFUZE100_VGEN6 14 35#define PFUZE100_VGEN6 14
36#define PFUZE100_MAX_REGULATOR 15 36#define PFUZE100_MAX_REGULATOR 15
37 37
38#define PFUZE200_SW1AB 0
39#define PFUZE200_SW2 1
40#define PFUZE200_SW3A 2
41#define PFUZE200_SW3B 3
42#define PFUZE200_SWBST 4
43#define PFUZE200_VSNVS 5
44#define PFUZE200_VREFDDR 6
45#define PFUZE200_VGEN1 7
46#define PFUZE200_VGEN2 8
47#define PFUZE200_VGEN3 9
48#define PFUZE200_VGEN4 10
49#define PFUZE200_VGEN5 11
50#define PFUZE200_VGEN6 12
51
38struct regulator_init_data; 52struct regulator_init_data;
39 53
40struct pfuze_regulator_platform_data { 54struct pfuze_regulator_platform_data {