aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux
diff options
context:
space:
mode:
authorPrashant Gaikwad <pgaikwad@nvidia.com>2013-03-20 08:00:34 -0400
committerMike Turquette <mturquette@linaro.org>2013-03-26 15:51:48 -0400
commitece70094f6ab2107d4313fa1802b13dab0234ac5 (patch)
tree0e864397c7e15afe1c3d94d028945187b32d723f /include/linux
parentce4f3313b05c836c21a91ac89f87dccf84ce9561 (diff)
clk: Add composite clock type
Not all clocks are required to be decomposed into basic clock types but at the same time want to use the functionality provided by these basic clock types instead of duplicating. For example, Tegra SoC has ~100 clocks which can be decomposed into Mux -> Div -> Gate clock types making the clock count to ~300. Also, parent change operation can not be performed on gate clock which forces to use mux clock in driver if want to change the parent. Instead aggregate the basic clock types functionality into one clock and just use this clock for all operations. This clock type re-uses the functionality of basic clock types and not limited to basic clock types but any hardware-specific implementation. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/clk-provider.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 63ba3b740794..1f0352802794 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -342,6 +342,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
342 const char *parent_name, unsigned long flags, 342 const char *parent_name, unsigned long flags,
343 unsigned int mult, unsigned int div); 343 unsigned int mult, unsigned int div);
344 344
345/***
346 * struct clk_composite - aggregate clock of mux, divider and gate clocks
347 *
348 * @hw: handle between common and hardware-specific interfaces
349 * @mux_hw: handle between composite and hardware-specifix mux clock
350 * @div_hw: handle between composite and hardware-specifix divider clock
351 * @gate_hw: handle between composite and hardware-specifix gate clock
352 * @mux_ops: clock ops for mux
353 * @div_ops: clock ops for divider
354 * @gate_ops: clock ops for gate
355 */
356struct clk_composite {
357 struct clk_hw hw;
358 struct clk_ops ops;
359
360 struct clk_hw *mux_hw;
361 struct clk_hw *div_hw;
362 struct clk_hw *gate_hw;
363
364 const struct clk_ops *mux_ops;
365 const struct clk_ops *div_ops;
366 const struct clk_ops *gate_ops;
367};
368
369struct clk *clk_register_composite(struct device *dev, const char *name,
370 const char **parent_names, int num_parents,
371 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
372 struct clk_hw *div_hw, const struct clk_ops *div_ops,
373 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
374 unsigned long flags);
375
345/** 376/**
346 * clk_register - allocate a new clock, register it and return an opaque cookie 377 * clk_register - allocate a new clock, register it and return an opaque cookie
347 * @dev: device that is registering this clock 378 * @dev: device that is registering this clock