diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-11-26 06:57:58 -0500 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-26 06:57:58 -0500 |
| commit | eabc5fa51c1fae4b66cf883e3a3c2b3ca794494c (patch) | |
| tree | 7e17333920f4ab9986f3f40e881b4bc890a91724 /include/linux | |
| parent | 9489e9dcae718d5fde988e4a684a0f55b5f94d17 (diff) | |
| parent | df1590d9ae5e37e07e7cf91107e4c2c946ce8bf4 (diff) | |
Merge branch 'spear-for-3.8' of git://git.linaro.org/people/vireshk/linux into next/dt2
From Viresh Kumar <viresh.kumar@linaro.org>:
These are DT updates for SPEAr SoCs. There aren't any fixes that we want
to get into 3.7-rc* and we are happy with 3.8.
Some of the dtbs which use gpiopinctrl have dependency on Linus's
pinctrl tree, where an earlier update for adding gpiopinctrl node is present.
* 'spear-for-3.8' of git://git.linaro.org/people/vireshk/linux:
ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
ARM: SPEAr1310: Fix AUXDATA for compact flash controller
ARM: SPEAr13xx: Remove fields not required for ssp controller
ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
ARM: SPEAr: DT: Update device nodes
ARM: SPEAr: DT: add uart state to fix warning
ARM: SPEAr: DT: Modify DT bindings for STMMAC
ARM: SPEAr: DT: Fix existing DT support
ARM: SPEAr: DT: Update partition info for MTD devices
ARM: SPEAr: DT: Update pinctrl list
ARM: SPEAr13xx: DT: Add spics gpio controller nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/gpio.h | 20 | ||||
| -rw-r--r-- | include/linux/irqchip/spear-shirq.h | 64 | ||||
| -rw-r--r-- | include/linux/pinctrl/pinctrl.h | 16 | ||||
| -rw-r--r-- | include/linux/platform_data/pinctrl-coh901.h | 2 |
4 files changed, 97 insertions, 5 deletions
diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 2e31e8b3a190..7ba2762abbc9 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h | |||
| @@ -72,9 +72,9 @@ static inline int irq_to_gpio(unsigned int irq) | |||
| 72 | return -EINVAL; | 72 | return -EINVAL; |
| 73 | } | 73 | } |
| 74 | 74 | ||
| 75 | #endif | 75 | #endif /* ! CONFIG_ARCH_HAVE_CUSTOM_GPIO_H */ |
| 76 | 76 | ||
| 77 | #else | 77 | #else /* ! CONFIG_GENERIC_GPIO */ |
| 78 | 78 | ||
| 79 | #include <linux/kernel.h> | 79 | #include <linux/kernel.h> |
| 80 | #include <linux/types.h> | 80 | #include <linux/types.h> |
| @@ -231,6 +231,20 @@ static inline int irq_to_gpio(unsigned irq) | |||
| 231 | return -EINVAL; | 231 | return -EINVAL; |
| 232 | } | 232 | } |
| 233 | 233 | ||
| 234 | #endif | 234 | static inline int |
| 235 | gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, | ||
| 236 | unsigned int pin_base, unsigned int npins) | ||
| 237 | { | ||
| 238 | WARN_ON(1); | ||
| 239 | return -EINVAL; | ||
| 240 | } | ||
| 241 | |||
| 242 | static inline void | ||
| 243 | gpiochip_remove_pin_ranges(struct gpio_chip *chip) | ||
| 244 | { | ||
| 245 | WARN_ON(1); | ||
| 246 | } | ||
| 247 | |||
| 248 | #endif /* ! CONFIG_GENERIC_GPIO */ | ||
| 235 | 249 | ||
| 236 | #endif /* __LINUX_GPIO_H */ | 250 | #endif /* __LINUX_GPIO_H */ |
diff --git a/include/linux/irqchip/spear-shirq.h b/include/linux/irqchip/spear-shirq.h new file mode 100644 index 000000000000..c8be16d213a3 --- /dev/null +++ b/include/linux/irqchip/spear-shirq.h | |||
| @@ -0,0 +1,64 @@ | |||
| 1 | /* | ||
| 2 | * SPEAr platform shared irq layer header file | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009-2012 ST Microelectronics | ||
| 5 | * Viresh Kumar <viresh.linux@gmail.com> | ||
| 6 | * | ||
| 7 | * This file is licensed under the terms of the GNU General Public | ||
| 8 | * License version 2. This program is licensed "as is" without any | ||
| 9 | * warranty of any kind, whether express or implied. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __SPEAR_SHIRQ_H | ||
| 13 | #define __SPEAR_SHIRQ_H | ||
| 14 | |||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | /* | ||
| 19 | * struct shirq_regs: shared irq register configuration | ||
| 20 | * | ||
| 21 | * enb_reg: enable register offset | ||
| 22 | * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt | ||
| 23 | * status_reg: status register offset | ||
| 24 | * status_reg_mask: status register valid mask | ||
| 25 | * clear_reg: clear register offset | ||
| 26 | * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt | ||
| 27 | */ | ||
| 28 | struct shirq_regs { | ||
| 29 | u32 enb_reg; | ||
| 30 | u32 reset_to_enb; | ||
| 31 | u32 status_reg; | ||
| 32 | u32 clear_reg; | ||
| 33 | u32 reset_to_clear; | ||
| 34 | }; | ||
| 35 | |||
| 36 | /* | ||
| 37 | * struct spear_shirq: shared irq structure | ||
| 38 | * | ||
| 39 | * irq: hardware irq number | ||
| 40 | * irq_base: base irq in linux domain | ||
| 41 | * irq_nr: no. of shared interrupts in a particular block | ||
| 42 | * irq_bit_off: starting bit offset in the status register | ||
| 43 | * invalid_irq: irq group is currently disabled | ||
| 44 | * base: base address of shared irq register | ||
| 45 | * regs: register configuration for shared irq block | ||
| 46 | */ | ||
| 47 | struct spear_shirq { | ||
| 48 | u32 irq; | ||
| 49 | u32 irq_base; | ||
| 50 | u32 irq_nr; | ||
| 51 | u32 irq_bit_off; | ||
| 52 | int invalid_irq; | ||
| 53 | void __iomem *base; | ||
| 54 | struct shirq_regs regs; | ||
| 55 | }; | ||
| 56 | |||
| 57 | int __init spear300_shirq_of_init(struct device_node *np, | ||
| 58 | struct device_node *parent); | ||
| 59 | int __init spear310_shirq_of_init(struct device_node *np, | ||
| 60 | struct device_node *parent); | ||
| 61 | int __init spear320_shirq_of_init(struct device_node *np, | ||
| 62 | struct device_node *parent); | ||
| 63 | |||
| 64 | #endif /* __SPEAR_SHIRQ_H */ | ||
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h index 7d087f03e91e..4a58428bc793 100644 --- a/include/linux/pinctrl/pinctrl.h +++ b/include/linux/pinctrl/pinctrl.h | |||
| @@ -134,6 +134,22 @@ extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |||
| 134 | extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, | 134 | extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
| 135 | struct pinctrl_gpio_range *ranges, | 135 | struct pinctrl_gpio_range *ranges, |
| 136 | unsigned nranges); | 136 | unsigned nranges); |
| 137 | extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | ||
| 138 | struct pinctrl_gpio_range *range); | ||
| 139 | |||
| 140 | extern struct pinctrl_dev *find_pinctrl_and_add_gpio_range(const char *devname, | ||
| 141 | struct pinctrl_gpio_range *range); | ||
| 142 | |||
| 143 | #ifdef CONFIG_OF | ||
| 144 | extern struct pinctrl_dev *of_pinctrl_get(struct device_node *np); | ||
| 145 | #else | ||
| 146 | static inline | ||
| 147 | struct pinctrl_dev *of_pinctrl_get(struct device_node *np) | ||
| 148 | { | ||
| 149 | return NULL; | ||
| 150 | } | ||
| 151 | #endif /* CONFIG_OF */ | ||
| 152 | |||
| 137 | extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); | 153 | extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); |
| 138 | extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); | 154 | extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); |
| 139 | #else | 155 | #else |
diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h index 30dea251b835..27a23b318cef 100644 --- a/include/linux/platform_data/pinctrl-coh901.h +++ b/include/linux/platform_data/pinctrl-coh901.h | |||
| @@ -13,13 +13,11 @@ | |||
| 13 | * struct u300_gpio_platform - U300 GPIO platform data | 13 | * struct u300_gpio_platform - U300 GPIO platform data |
| 14 | * @ports: number of GPIO block ports | 14 | * @ports: number of GPIO block ports |
| 15 | * @gpio_base: first GPIO number for this block (use a free range) | 15 | * @gpio_base: first GPIO number for this block (use a free range) |
| 16 | * @gpio_irq_base: first GPIO IRQ number for this block (use a free range) | ||
| 17 | * @pinctrl_device: pin control device to spawn as child | 16 | * @pinctrl_device: pin control device to spawn as child |
| 18 | */ | 17 | */ |
| 19 | struct u300_gpio_platform { | 18 | struct u300_gpio_platform { |
| 20 | u8 ports; | 19 | u8 ports; |
| 21 | int gpio_base; | 20 | int gpio_base; |
| 22 | int gpio_irq_base; | ||
| 23 | struct platform_device *pinctrl_device; | 21 | struct platform_device *pinctrl_device; |
| 24 | }; | 22 | }; |
| 25 | 23 | ||
