Merge tag 'for-linus-20141215' of git://git.infradead.org/linux-mtd

Pull MTD updates from Brian Norris:
 "Summary:
   - Add device tree support for DoC3

   - SPI NOR:
        Refactoring, for better layering between spi-nor.c and its
        driver users (e.g., m25p80.c)

        New flash device support

        Support 6-byte ID strings

   - NAND:
        New NAND driver for Allwinner SoC's (sunxi)

        GPMI NAND: add support for raw (no ECC) access, for testing
        purposes

        Add ATO manufacturer ID

        A few odd driver fixes

   - MTD tests:
        Allow testers to compensate for OOB bitflips in oobtest

        Fix a torturetest regression

   - nandsim: Support longer ID byte strings

  And more"

* tag 'for-linus-20141215' of git://git.infradead.org/linux-mtd: (63 commits)
  mtd: tests: abort torturetest on erase errors
  mtd: physmap_of: fix potential NULL dereference
  mtd: spi-nor: allow NULL as chip name and try to auto detect it
  mtd: nand: gpmi: add raw oob access functions
  mtd: nand: gpmi: add proper raw access support
  mtd: nand: gpmi: add gpmi_copy_bits function
  mtd: spi-nor: factor out write_enable() for erase commands
  mtd: spi-nor: add support for s25fl128s
  mtd: spi-nor: remove the jedec_id/ext_id
  mtd: spi-nor: add id/id_len for flash_info{}
  mtd: nand: correct the comment of function nand_block_isreserved()
  jffs2: Drop bogus if in comment
  mtd: atmel_nand: replace memcpy32_toio/memcpy32_fromio with memcpy
  mtd: cafe_nand: drop duplicate .write_page implementation
  mtd: m25p80: Add support for serial flash Spansion S25FL132K
  MTD: m25p80: fix inconsistency in m25p_ids compared to spi_nor_ids
  mtd: spi-nor: improve wait-till-ready timeout loop
  mtd: delete unnecessary checks before two function calls
  mtd: nand: omap: Fix NAND enumeration on 3430 LDP
  mtd: nand: add ATO manufacturer info
  ...

3 files changed, 38 insertions, 12 deletions

diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
index 84d60cb841b1..bf0321eabbda 100644
--- a/include/linux/fsl_ifc.h
+++ b/include/linux/fsl_ifc.h
@@ -29,7 +29,16 @@
 #include <linux/of_platform.h>
 #include <linux/interrupt.h>
 
-#define FSL_IFC_BANK_COUNT 4
+/*
+ * The actual number of banks implemented depends on the IFC version
+ *    - IFC version 1.0 implements 4 banks.
+ *    - IFC version 1.1 onward implements 8 banks.
+ */
+#define FSL_IFC_BANK_COUNT 8
+
+#define FSL_IFC_VERSION_MASK    0x0F0F0000
+#define FSL_IFC_VERSION_1_0_0   0x01000000
+#define FSL_IFC_VERSION_1_1_0   0x01010000
 
 /*
  * CSPR - Chip Select Property Register
@@ -776,23 +785,23 @@ struct fsl_ifc_regs {
                 __be32 cspr;
                 u32 res2;
         } cspr_cs[FSL_IFC_BANK_COUNT];
-        u32 res3[0x19];
+        u32 res3[0xd];
         struct {
                 __be32 amask;
                 u32 res4[0x2];
         } amask_cs[FSL_IFC_BANK_COUNT];
-        u32 res5[0x18];
+        u32 res5[0xc];
         struct {
                 __be32 csor;
                 __be32 csor_ext;
                 u32 res6;
         } csor_cs[FSL_IFC_BANK_COUNT];
-        u32 res7[0x18];
+        u32 res7[0xc];
         struct {
                 __be32 ftim[4];
                 u32 res8[0x8];
         } ftim_cs[FSL_IFC_BANK_COUNT];
-        u32 res9[0x60];
+        u32 res9[0x30];
         __be32 rb_stat;
         u32 res10[0x2];
         __be32 ifc_gcr;
@@ -827,6 +836,8 @@ struct fsl_ifc_ctrl {
         int                             nand_irq;
         spinlock_t                      lock;
         void                            *nand;
+        int                             version;
+        int                             banks;
 
         u32 nand_stat;
         wait_queue_head_t nand_wait;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index e4d451e4600b..3d4ea7eb2b68 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -455,8 +455,21 @@ struct nand_hw_control {
  *              be provided if an hardware ECC is available
  * @calculate:  function for ECC calculation or readback from ECC hardware
  * @correct:    function for ECC correction, matching to ECC generator (sw/hw)
- * @read_page_raw:      function to read a raw page without ECC
- * @write_page_raw:     function to write a raw page without ECC
+ * @read_page_raw:      function to read a raw page without ECC. This function
+ *                      should hide the specific layout used by the ECC
+ *                      controller and always return contiguous in-band and
+ *                      out-of-band data even if they're not stored
+ *                      contiguously on the NAND chip (e.g.
+ *                      NAND_ECC_HW_SYNDROME interleaves in-band and
+ *                      out-of-band data).
+ * @write_page_raw:     function to write a raw page without ECC. This function
+ *                      should hide the specific layout used by the ECC
+ *                      controller and consider the passed data as contiguous
+ *                      in-band and out-of-band data. ECC controller is
+ *                      responsible for doing the appropriate transformations
+ *                      to adapt to its specific layout (e.g.
+ *                      NAND_ECC_HW_SYNDROME interleaves in-band and
+ *                      out-of-band data).
  * @read_page:  function to read a page according to the ECC generator
  *              requirements; returns maximum number of bitflips corrected in
  *              any single ECC step, 0 if bitflips uncorrectable, -EIO hw error
@@ -723,6 +736,7 @@ struct nand_chip {
 #define NAND_MFR_EON            0x92
 #define NAND_MFR_SANDISK        0x45
 #define NAND_MFR_INTEL          0x89
+#define NAND_MFR_ATO            0x9b
 
 /* The maximum expected count of bytes in the NAND ID sequence */
 #define NAND_MAX_ID_LEN 8
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 046a0a2e4c4e..63aeccf9ddc8 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -116,6 +116,10 @@ enum spi_nor_ops {
         SPI_NOR_OPS_UNLOCK,
 };
 
+enum spi_nor_option_flags {
+        SNOR_F_USE_FSR          = BIT(0),
+};
+
 /**
  * struct spi_nor - Structure for defining a the SPI NOR layer
  * @mtd:                point to a mtd_info structure
@@ -129,6 +133,7 @@ enum spi_nor_ops {
  * @program_opcode:     the program opcode
  * @flash_read:         the mode of the read
  * @sst_write_second:   used by the SST write operation
+ * @flags:              flag options for the current SPI-NOR (SNOR_F_*)
  * @cfg:                used by the read_xfer/write_xfer
  * @cmd_buf:            used by the write_reg
  * @prepare:            [OPTIONAL] do some preparations for the
@@ -139,9 +144,6 @@ enum spi_nor_ops {
  * @write_xfer:         [OPTIONAL] the writefundamental primitive
  * @read_reg:           [DRIVER-SPECIFIC] read out the register
  * @write_reg:          [DRIVER-SPECIFIC] write data to the register
- * @read_id:            [REPLACEABLE] read out the ID data, and find
- *                      the proper spi_device_id
- * @wait_till_ready:    [REPLACEABLE] wait till the NOR becomes ready
  * @read:               [DRIVER-SPECIFIC] read data from the SPI NOR
  * @write:              [DRIVER-SPECIFIC] write data to the SPI NOR
  * @erase:              [DRIVER-SPECIFIC] erase a sector of the SPI NOR
@@ -160,6 +162,7 @@ struct spi_nor {
         u8                      program_opcode;
         enum read_mode          flash_read;
         bool                    sst_write_second;
+        u32                     flags;
         struct spi_nor_xfer_cfg cfg;
         u8                      cmd_buf[SPI_NOR_MAX_CMD_SIZE];
 
@@ -172,8 +175,6 @@ struct spi_nor {
         int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
         int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
                         int write_enable);
-        const struct spi_device_id *(*read_id)(struct spi_nor *nor);
-        int (*wait_till_ready)(struct spi_nor *nor);
 
         int (*read)(struct spi_nor *nor, loff_t from,
                         size_t len, size_t *retlen, u_char *read_buf);