diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
| commit | d01e4afdbb65e030fd6f1f96c30a558e2eb0f279 (patch) | |
| tree | 02ef82b2740cf93a98199eded5ef765fa6e03052 /include/linux | |
| parent | 8287361abca36504da813638310d2547469283eb (diff) | |
| parent | 794b175fc0c0c4844dbb7b137a73bbfd01f6c608 (diff) | |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
"Cleanup patches for various ARM platforms and some of their associated
drivers. There's also a branch in here that enables Freescale i.MX to
be part of the multiplatform support -- the first "big" SoC that is
moved over (more multiplatform work comes in a separate branch later
during the merge window)."
Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
ARM: omap: fix typo on timer cleanup
ARM: EXYNOS: Remove unused regs-mem.h file
ARM: EXYNOS: Remove unused non-dt support for dwmci controller
ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
ARM: OMAP3: cm-t3517: use GPTIMER for system clock
ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
ARM: SAMSUNG: use devm_ functions for ADC driver
ARM: EXYNOS: no duplicate mask/unmask in eint0_15
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
ARM: EXYNOS: Remove i2c0 resource information and setting of device names
ARM: Kirkwood: checkpatch cleanups
ARM: Kirkwood: Fix sparse warnings.
ARM: Kirkwood: Remove unused includes
ARM: kirkwood: cleanup lsxl board includes
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
...
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/dma/ipu-dma.h | 177 | ||||
| -rw-r--r-- | include/linux/platform_data/asoc-imx-ssi.h | 2 | ||||
| -rw-r--r-- | include/linux/platform_data/dma-imx.h | 4 | ||||
| -rw-r--r-- | include/linux/platform_data/dmtimer-omap.h | 31 | ||||
| -rw-r--r-- | include/linux/platform_data/omap-wd-timer.h | 38 | ||||
| -rw-r--r-- | include/linux/tegra-ahb.h | 19 |
6 files changed, 270 insertions, 1 deletions
diff --git a/include/linux/dma/ipu-dma.h b/include/linux/dma/ipu-dma.h new file mode 100644 index 000000000000..18031115c668 --- /dev/null +++ b/include/linux/dma/ipu-dma.h | |||
| @@ -0,0 +1,177 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 | ||
| 3 | * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> | ||
| 4 | * | ||
| 5 | * Copyright (C) 2005-2007 Freescale Semiconductor, Inc. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __LINUX_DMA_IPU_DMA_H | ||
| 13 | #define __LINUX_DMA_IPU_DMA_H | ||
| 14 | |||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/dmaengine.h> | ||
| 17 | |||
| 18 | /* IPU DMA Controller channel definitions. */ | ||
| 19 | enum ipu_channel { | ||
| 20 | IDMAC_IC_0 = 0, /* IC (encoding task) to memory */ | ||
| 21 | IDMAC_IC_1 = 1, /* IC (viewfinder task) to memory */ | ||
| 22 | IDMAC_ADC_0 = 1, | ||
| 23 | IDMAC_IC_2 = 2, | ||
| 24 | IDMAC_ADC_1 = 2, | ||
| 25 | IDMAC_IC_3 = 3, | ||
| 26 | IDMAC_IC_4 = 4, | ||
| 27 | IDMAC_IC_5 = 5, | ||
| 28 | IDMAC_IC_6 = 6, | ||
| 29 | IDMAC_IC_7 = 7, /* IC (sensor data) to memory */ | ||
| 30 | IDMAC_IC_8 = 8, | ||
| 31 | IDMAC_IC_9 = 9, | ||
| 32 | IDMAC_IC_10 = 10, | ||
| 33 | IDMAC_IC_11 = 11, | ||
| 34 | IDMAC_IC_12 = 12, | ||
| 35 | IDMAC_IC_13 = 13, | ||
| 36 | IDMAC_SDC_0 = 14, /* Background synchronous display data */ | ||
| 37 | IDMAC_SDC_1 = 15, /* Foreground data (overlay) */ | ||
| 38 | IDMAC_SDC_2 = 16, | ||
| 39 | IDMAC_SDC_3 = 17, | ||
| 40 | IDMAC_ADC_2 = 18, | ||
| 41 | IDMAC_ADC_3 = 19, | ||
| 42 | IDMAC_ADC_4 = 20, | ||
| 43 | IDMAC_ADC_5 = 21, | ||
| 44 | IDMAC_ADC_6 = 22, | ||
| 45 | IDMAC_ADC_7 = 23, | ||
| 46 | IDMAC_PF_0 = 24, | ||
| 47 | IDMAC_PF_1 = 25, | ||
| 48 | IDMAC_PF_2 = 26, | ||
| 49 | IDMAC_PF_3 = 27, | ||
| 50 | IDMAC_PF_4 = 28, | ||
| 51 | IDMAC_PF_5 = 29, | ||
| 52 | IDMAC_PF_6 = 30, | ||
| 53 | IDMAC_PF_7 = 31, | ||
| 54 | }; | ||
| 55 | |||
| 56 | /* Order significant! */ | ||
| 57 | enum ipu_channel_status { | ||
| 58 | IPU_CHANNEL_FREE, | ||
| 59 | IPU_CHANNEL_INITIALIZED, | ||
| 60 | IPU_CHANNEL_READY, | ||
| 61 | IPU_CHANNEL_ENABLED, | ||
| 62 | }; | ||
| 63 | |||
| 64 | #define IPU_CHANNELS_NUM 32 | ||
| 65 | |||
| 66 | enum pixel_fmt { | ||
| 67 | /* 1 byte */ | ||
| 68 | IPU_PIX_FMT_GENERIC, | ||
| 69 | IPU_PIX_FMT_RGB332, | ||
| 70 | IPU_PIX_FMT_YUV420P, | ||
| 71 | IPU_PIX_FMT_YUV422P, | ||
| 72 | IPU_PIX_FMT_YUV420P2, | ||
| 73 | IPU_PIX_FMT_YVU422P, | ||
| 74 | /* 2 bytes */ | ||
| 75 | IPU_PIX_FMT_RGB565, | ||
| 76 | IPU_PIX_FMT_RGB666, | ||
| 77 | IPU_PIX_FMT_BGR666, | ||
| 78 | IPU_PIX_FMT_YUYV, | ||
| 79 | IPU_PIX_FMT_UYVY, | ||
| 80 | /* 3 bytes */ | ||
| 81 | IPU_PIX_FMT_RGB24, | ||
| 82 | IPU_PIX_FMT_BGR24, | ||
| 83 | /* 4 bytes */ | ||
| 84 | IPU_PIX_FMT_GENERIC_32, | ||
| 85 | IPU_PIX_FMT_RGB32, | ||
| 86 | IPU_PIX_FMT_BGR32, | ||
| 87 | IPU_PIX_FMT_ABGR32, | ||
| 88 | IPU_PIX_FMT_BGRA32, | ||
| 89 | IPU_PIX_FMT_RGBA32, | ||
| 90 | }; | ||
| 91 | |||
| 92 | enum ipu_color_space { | ||
| 93 | IPU_COLORSPACE_RGB, | ||
| 94 | IPU_COLORSPACE_YCBCR, | ||
| 95 | IPU_COLORSPACE_YUV | ||
| 96 | }; | ||
| 97 | |||
| 98 | /* | ||
| 99 | * Enumeration of IPU rotation modes | ||
| 100 | */ | ||
| 101 | enum ipu_rotate_mode { | ||
| 102 | /* Note the enum values correspond to BAM value */ | ||
| 103 | IPU_ROTATE_NONE = 0, | ||
| 104 | IPU_ROTATE_VERT_FLIP = 1, | ||
| 105 | IPU_ROTATE_HORIZ_FLIP = 2, | ||
| 106 | IPU_ROTATE_180 = 3, | ||
| 107 | IPU_ROTATE_90_RIGHT = 4, | ||
| 108 | IPU_ROTATE_90_RIGHT_VFLIP = 5, | ||
| 109 | IPU_ROTATE_90_RIGHT_HFLIP = 6, | ||
| 110 | IPU_ROTATE_90_LEFT = 7, | ||
| 111 | }; | ||
| 112 | |||
| 113 | /* | ||
| 114 | * Enumeration of DI ports for ADC. | ||
| 115 | */ | ||
| 116 | enum display_port { | ||
| 117 | DISP0, | ||
| 118 | DISP1, | ||
| 119 | DISP2, | ||
| 120 | DISP3 | ||
| 121 | }; | ||
| 122 | |||
| 123 | struct idmac_video_param { | ||
| 124 | unsigned short in_width; | ||
| 125 | unsigned short in_height; | ||
| 126 | uint32_t in_pixel_fmt; | ||
| 127 | unsigned short out_width; | ||
| 128 | unsigned short out_height; | ||
| 129 | uint32_t out_pixel_fmt; | ||
| 130 | unsigned short out_stride; | ||
| 131 | bool graphics_combine_en; | ||
| 132 | bool global_alpha_en; | ||
| 133 | bool key_color_en; | ||
| 134 | enum display_port disp; | ||
| 135 | unsigned short out_left; | ||
| 136 | unsigned short out_top; | ||
| 137 | }; | ||
| 138 | |||
| 139 | /* | ||
| 140 | * Union of initialization parameters for a logical channel. So far only video | ||
| 141 | * parameters are used. | ||
| 142 | */ | ||
| 143 | union ipu_channel_param { | ||
| 144 | struct idmac_video_param video; | ||
| 145 | }; | ||
| 146 | |||
| 147 | struct idmac_tx_desc { | ||
| 148 | struct dma_async_tx_descriptor txd; | ||
| 149 | struct scatterlist *sg; /* scatterlist for this */ | ||
| 150 | unsigned int sg_len; /* tx-descriptor. */ | ||
| 151 | struct list_head list; | ||
| 152 | }; | ||
| 153 | |||
| 154 | struct idmac_channel { | ||
| 155 | struct dma_chan dma_chan; | ||
| 156 | dma_cookie_t completed; /* last completed cookie */ | ||
| 157 | union ipu_channel_param params; | ||
| 158 | enum ipu_channel link; /* input channel, linked to the output */ | ||
| 159 | enum ipu_channel_status status; | ||
| 160 | void *client; /* Only one client per channel */ | ||
| 161 | unsigned int n_tx_desc; | ||
| 162 | struct idmac_tx_desc *desc; /* allocated tx-descriptors */ | ||
| 163 | struct scatterlist *sg[2]; /* scatterlist elements in buffer-0 and -1 */ | ||
| 164 | struct list_head free_list; /* free tx-descriptors */ | ||
| 165 | struct list_head queue; /* queued tx-descriptors */ | ||
| 166 | spinlock_t lock; /* protects sg[0,1], queue */ | ||
| 167 | struct mutex chan_mutex; /* protects status, cookie, free_list */ | ||
| 168 | bool sec_chan_en; | ||
| 169 | int active_buffer; | ||
| 170 | unsigned int eof_irq; | ||
| 171 | char eof_name[16]; /* EOF IRQ name for request_irq() */ | ||
| 172 | }; | ||
| 173 | |||
| 174 | #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd) | ||
| 175 | #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan) | ||
| 176 | |||
| 177 | #endif /* __LINUX_DMA_IPU_DMA_H */ | ||
diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h index 63f3c2804239..92c7fd72f636 100644 --- a/include/linux/platform_data/asoc-imx-ssi.h +++ b/include/linux/platform_data/asoc-imx-ssi.h | |||
| @@ -17,5 +17,7 @@ struct imx_ssi_platform_data { | |||
| 17 | void (*ac97_warm_reset)(struct snd_ac97 *ac97); | 17 | void (*ac97_warm_reset)(struct snd_ac97 *ac97); |
| 18 | }; | 18 | }; |
| 19 | 19 | ||
| 20 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); | ||
| 21 | |||
| 20 | #endif /* __MACH_SSI_H */ | 22 | #endif /* __MACH_SSI_H */ |
| 21 | 23 | ||
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h index 1b9080385b46..f6d30cc1cb77 100644 --- a/include/linux/platform_data/dma-imx.h +++ b/include/linux/platform_data/dma-imx.h | |||
| @@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan) | |||
| 61 | static inline int imx_dma_is_general_purpose(struct dma_chan *chan) | 61 | static inline int imx_dma_is_general_purpose(struct dma_chan *chan) |
| 62 | { | 62 | { |
| 63 | return strstr(dev_name(chan->device->dev), "sdma") || | 63 | return strstr(dev_name(chan->device->dev), "sdma") || |
| 64 | !strcmp(dev_name(chan->device->dev), "imx-dma"); | 64 | !strcmp(dev_name(chan->device->dev), "imx1-dma") || |
| 65 | !strcmp(dev_name(chan->device->dev), "imx21-dma") || | ||
| 66 | !strcmp(dev_name(chan->device->dev), "imx27-dma"); | ||
| 65 | } | 67 | } |
| 66 | 68 | ||
| 67 | #endif | 69 | #endif |
diff --git a/include/linux/platform_data/dmtimer-omap.h b/include/linux/platform_data/dmtimer-omap.h new file mode 100644 index 000000000000..a19b78d826e9 --- /dev/null +++ b/include/linux/platform_data/dmtimer-omap.h | |||
| @@ -0,0 +1,31 @@ | |||
| 1 | /* | ||
| 2 | * DMTIMER platform data for TI OMAP platforms | ||
| 3 | * | ||
| 4 | * Copyright (C) 2012 Texas Instruments | ||
| 5 | * Author: Jon Hunter <jon-hunter@ti.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License version 2 as published by | ||
| 9 | * the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 14 | * more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License along with | ||
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__ | ||
| 21 | #define __PLATFORM_DATA_DMTIMER_OMAP_H__ | ||
| 22 | |||
| 23 | struct dmtimer_platform_data { | ||
| 24 | /* set_timer_src - Only used for OMAP1 devices */ | ||
| 25 | int (*set_timer_src)(struct platform_device *pdev, int source); | ||
| 26 | u32 timer_capability; | ||
| 27 | u32 timer_errata; | ||
| 28 | int (*get_context_loss_count)(struct device *); | ||
| 29 | }; | ||
| 30 | |||
| 31 | #endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */ | ||
diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h new file mode 100644 index 000000000000..d75f5f802d98 --- /dev/null +++ b/include/linux/platform_data/omap-wd-timer.h | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | /* | ||
| 2 | * OMAP2+ WDTIMER-specific function prototypes | ||
| 3 | * | ||
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H | ||
| 14 | #define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H | ||
| 15 | |||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Standardized OMAP reset source bits | ||
| 20 | * | ||
| 21 | * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h | ||
| 22 | * and are the only ones needed in the watchdog driver. | ||
| 23 | */ | ||
| 24 | #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 | ||
| 25 | |||
| 26 | /** | ||
| 27 | * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC | ||
| 28 | * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause | ||
| 29 | * | ||
| 30 | * The function pointed to by @read_reset_sources must return its data | ||
| 31 | * in a standard format - search for RST_SRC_ID_SHIFT in | ||
| 32 | * arch/arm/mach-omap2 | ||
| 33 | */ | ||
| 34 | struct omap_wd_timer_platform_data { | ||
| 35 | u32 (*read_reset_sources)(void); | ||
| 36 | }; | ||
| 37 | |||
| 38 | #endif | ||
diff --git a/include/linux/tegra-ahb.h b/include/linux/tegra-ahb.h new file mode 100644 index 000000000000..f1cd075ceee1 --- /dev/null +++ b/include/linux/tegra-ahb.h | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify it | ||
| 5 | * under the terms and conditions of the GNU General Public License, | ||
| 6 | * version 2, as published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 11 | * more details. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __LINUX_AHB_H__ | ||
| 15 | #define __LINUX_AHB_H__ | ||
| 16 | |||
| 17 | extern int tegra_ahb_enable_smmu(struct device_node *ahb); | ||
| 18 | |||
| 19 | #endif /* __LINUX_AHB_H__ */ | ||
