mtd: spi-nor: re-name OPCODE_* to SPINOR_OP_*

Qualify these with a better namespace, and prepare them for use in more
drivers.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Huang Shijie <b32955@freescale.com>

1 files changed, 27 insertions, 27 deletions

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a6e87190ead1..f1fe1a6659a3 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -11,41 +11,41 @@
 #define __LINUX_MTD_SPI_NOR_H
 
 /* Flash opcodes. */
-#define OPCODE_WREN             0x06    /* Write enable */
-#define OPCODE_RDSR             0x05    /* Read status register */
-#define OPCODE_WRSR             0x01    /* Write status register 1 byte */
-#define OPCODE_NORM_READ        0x03    /* Read data bytes (low frequency) */
-#define OPCODE_FAST_READ        0x0b    /* Read data bytes (high frequency) */
-#define OPCODE_DUAL_READ        0x3b    /* Read data bytes (Dual SPI) */
-#define OPCODE_QUAD_READ        0x6b    /* Read data bytes (Quad SPI) */
-#define OPCODE_PP               0x02    /* Page program (up to 256 bytes) */
-#define OPCODE_BE_4K            0x20    /* Erase 4KiB block */
-#define OPCODE_BE_4K_PMC        0xd7    /* Erase 4KiB block on PMC chips */
-#define OPCODE_BE_32K           0x52    /* Erase 32KiB block */
-#define OPCODE_CHIP_ERASE       0xc7    /* Erase whole flash chip */
-#define OPCODE_SE               0xd8    /* Sector erase (usually 64KiB) */
-#define OPCODE_RDID             0x9f    /* Read JEDEC ID */
-#define OPCODE_RDCR             0x35    /* Read configuration register */
+#define SPINOR_OP_WREN          0x06    /* Write enable */
+#define SPINOR_OP_RDSR          0x05    /* Read status register */
+#define SPINOR_OP_WRSR          0x01    /* Write status register 1 byte */
+#define SPINOR_OP_NORM_READ     0x03    /* Read data bytes (low frequency) */
+#define SPINOR_OP_FAST_READ     0x0b    /* Read data bytes (high frequency) */
+#define SPINOR_OP_DUAL_READ     0x3b    /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_QUAD_READ     0x6b    /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP            0x02    /* Page program (up to 256 bytes) */
+#define SPINOR_OP_BE_4K         0x20    /* Erase 4KiB block */
+#define SPINOR_OP_BE_4K_PMC     0xd7    /* Erase 4KiB block on PMC chips */
+#define SPINOR_OP_BE_32K        0x52    /* Erase 32KiB block */
+#define SPINOR_OP_CHIP_ERASE    0xc7    /* Erase whole flash chip */
+#define SPINOR_OP_SE            0xd8    /* Sector erase (usually 64KiB) */
+#define SPINOR_OP_RDID          0x9f    /* Read JEDEC ID */
+#define SPINOR_OP_RDCR          0x35    /* Read configuration register */
 
 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
-#define OPCODE_NORM_READ_4B     0x13    /* Read data bytes (low frequency) */
-#define OPCODE_FAST_READ_4B     0x0c    /* Read data bytes (high frequency) */
-#define OPCODE_DUAL_READ_4B     0x3c    /* Read data bytes (Dual SPI) */
-#define OPCODE_QUAD_READ_4B     0x6c    /* Read data bytes (Quad SPI) */
-#define OPCODE_PP_4B            0x12    /* Page program (up to 256 bytes) */
-#define OPCODE_SE_4B            0xdc    /* Sector erase (usually 64KiB) */
+#define SPINOR_OP_NORM_READ_4B  0x13    /* Read data bytes (low frequency) */
+#define SPINOR_OP_FAST_READ_4B  0x0c    /* Read data bytes (high frequency) */
+#define SPINOR_OP_DUAL_READ_4B  0x3c    /* Read data bytes (Dual SPI) */
+#define SPINOR_OP_QUAD_READ_4B  0x6c    /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_PP_4B         0x12    /* Page program (up to 256 bytes) */
+#define SPINOR_OP_SE_4B         0xdc    /* Sector erase (usually 64KiB) */
 
 /* Used for SST flashes only. */
-#define OPCODE_BP               0x02    /* Byte program */
-#define OPCODE_WRDI             0x04    /* Write disable */
-#define OPCODE_AAI_WP           0xad    /* Auto address increment word program */
+#define SPINOR_OP_BP            0x02    /* Byte program */
+#define SPINOR_OP_WRDI          0x04    /* Write disable */
+#define SPINOR_OP_AAI_WP        0xad    /* Auto address increment word program */
 
 /* Used for Macronix and Winbond flashes. */
-#define OPCODE_EN4B             0xb7    /* Enter 4-byte mode */
-#define OPCODE_EX4B             0xe9    /* Exit 4-byte mode */
+#define SPINOR_OP_EN4B          0xb7    /* Enter 4-byte mode */
+#define SPINOR_OP_EX4B          0xe9    /* Exit 4-byte mode */
 
 /* Used for Spansion flashes only. */
-#define OPCODE_BRWR             0x17    /* Bank register write */
+#define SPINOR_OP_BRWR          0x17    /* Bank register write */
 
 /* Status Register bits. */
 #define SR_WIP                  1       /* Write in progress */