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authorLinus Walleij <linus.walleij@linaro.org>2015-03-17 20:56:17 -0400
committerLinus Walleij <linus.walleij@linaro.org>2015-03-19 04:45:54 -0400
commit964cb341882f920a1a1043864178f22def3193e4 (patch)
treed59a49475e7c5a869f1c5be1c7a673e254847aff /include/linux
parent7e9603638ac69696be5bcc2614365c1e8cc892dd (diff)
gpio: move pincontrol calls to <linux/gpio/driver.h>
These functions do not belong in <asm-generic/gpio.h> since the split into separate GPIO headers under <linux/gpio/*>. Move them to <linux/gpio/driver.h> as is apropriate. Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/gpio/driver.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index c497c62889d1..f1b36593ec9f 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -6,6 +6,7 @@
6#include <linux/irq.h> 6#include <linux/irq.h>
7#include <linux/irqchip/chained_irq.h> 7#include <linux/irqchip/chained_irq.h>
8#include <linux/irqdomain.h> 8#include <linux/irqdomain.h>
9#include <linux/pinctrl/pinctrl.h>
9 10
10struct device; 11struct device;
11struct gpio_desc; 12struct gpio_desc;
@@ -173,6 +174,53 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
173 174
174#endif /* CONFIG_GPIOLIB_IRQCHIP */ 175#endif /* CONFIG_GPIOLIB_IRQCHIP */
175 176
177#ifdef CONFIG_PINCTRL
178
179/**
180 * struct gpio_pin_range - pin range controlled by a gpio chip
181 * @head: list for maintaining set of pin ranges, used internally
182 * @pctldev: pinctrl device which handles corresponding pins
183 * @range: actual range of pins controlled by a gpio controller
184 */
185
186struct gpio_pin_range {
187 struct list_head node;
188 struct pinctrl_dev *pctldev;
189 struct pinctrl_gpio_range range;
190};
191
192int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
193 unsigned int gpio_offset, unsigned int pin_offset,
194 unsigned int npins);
195int gpiochip_add_pingroup_range(struct gpio_chip *chip,
196 struct pinctrl_dev *pctldev,
197 unsigned int gpio_offset, const char *pin_group);
198void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
199
200#else
201
202static inline int
203gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
204 unsigned int gpio_offset, unsigned int pin_offset,
205 unsigned int npins)
206{
207 return 0;
208}
209static inline int
210gpiochip_add_pingroup_range(struct gpio_chip *chip,
211 struct pinctrl_dev *pctldev,
212 unsigned int gpio_offset, const char *pin_group)
213{
214 return 0;
215}
216
217static inline void
218gpiochip_remove_pin_ranges(struct gpio_chip *chip)
219{
220}
221
222#endif /* CONFIG_PINCTRL */
223
176struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, 224struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
177 const char *label); 225 const char *label);
178void gpiochip_free_own_desc(struct gpio_desc *desc); 226void gpiochip_free_own_desc(struct gpio_desc *desc);