Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

Pull infiniband updates from Roland Dreier:
 "Main batch of InfiniBand/RDMA changes for 3.15:

   - The biggest change is core API extensions and mlx5 low-level driver
     support for handling DIF/DIX-style protection information, and the
     addition of PI support to the iSER initiator.  Target support will
     be arriving shortly through the SCSI target tree.

   - A nice simplification to the "umem" memory pinning library now that
     we have chained sg lists.  Kudos to Yishai Hadas for realizing our
     code didn't have to be so crazy.

   - Another nice simplification to the sg wrappers used by qib, ipath
     and ehca to handle their mapping of memory to adapter.

   - The usual batch of fixes to bugs found by static checkers etc.
     from intrepid people like Dan Carpenter and Yann Droneaud.

   - A large batch of cxgb4, ocrdma, qib driver updates"

* tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (102 commits)
  RDMA/ocrdma: Unregister inet notifier when unloading ocrdma
  RDMA/ocrdma: Fix warnings about pointer <-> integer casts
  RDMA/ocrdma: Code clean-up
  RDMA/ocrdma: Display FW version
  RDMA/ocrdma: Query controller information
  RDMA/ocrdma: Support non-embedded mailbox commands
  RDMA/ocrdma: Handle CQ overrun error
  RDMA/ocrdma: Display proper value for max_mw
  RDMA/ocrdma: Use non-zero tag in SRQ posting
  RDMA/ocrdma: Memory leak fix in ocrdma_dereg_mr()
  RDMA/ocrdma: Increment abi version count
  RDMA/ocrdma: Update version string
  be2net: Add abi version between be2net and ocrdma
  RDMA/ocrdma: ABI versioning between ocrdma and be2net
  RDMA/ocrdma: Allow DPP QP creation
  RDMA/ocrdma: Read ASIC_ID register to select asic_gen
  RDMA/ocrdma: SQ and RQ doorbell offset clean up
  RDMA/ocrdma: EQ full catastrophe avoidance
  RDMA/cxgb4: Disable DSGL use by default
  RDMA/cxgb4: rx_data() needs to hold the ep mutex
  ...

4 files changed, 152 insertions, 0 deletions

diff --git a/include/linux/mlx5/cq.h b/include/linux/mlx5/cq.h
index 2202c7f72b75..f6b17ac601bd 100644
--- a/include/linux/mlx5/cq.h
+++ b/include/linux/mlx5/cq.h
@@ -80,6 +80,7 @@ enum {
         MLX5_CQE_RESP_SEND_IMM  = 3,
         MLX5_CQE_RESP_SEND_INV  = 4,
         MLX5_CQE_RESIZE_CQ      = 5,
+        MLX5_CQE_SIG_ERR        = 12,
         MLX5_CQE_REQ_ERR        = 13,
         MLX5_CQE_RESP_ERR       = 14,
         MLX5_CQE_INVALID        = 15,
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 817a6fae6d2c..407bdb67fd4f 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -48,6 +48,8 @@ enum {
         MLX5_MAX_COMMANDS               = 32,
         MLX5_CMD_DATA_BLOCK_SIZE        = 512,
         MLX5_PCI_CMD_XPORT              = 7,
+        MLX5_MKEY_BSF_OCTO_SIZE         = 4,
+        MLX5_MAX_PSVS                   = 4,
 };
 
 enum {
@@ -116,6 +118,7 @@ enum {
         MLX5_MKEY_MASK_START_ADDR       = 1ull << 6,
         MLX5_MKEY_MASK_PD               = 1ull << 7,
         MLX5_MKEY_MASK_EN_RINVAL        = 1ull << 8,
+        MLX5_MKEY_MASK_EN_SIGERR        = 1ull << 9,
         MLX5_MKEY_MASK_BSF_EN           = 1ull << 12,
         MLX5_MKEY_MASK_KEY              = 1ull << 13,
         MLX5_MKEY_MASK_QPN              = 1ull << 14,
@@ -555,6 +558,23 @@ struct mlx5_cqe64 {
         u8              op_own;
 };
 
+struct mlx5_sig_err_cqe {
+        u8              rsvd0[16];
+        __be32          expected_trans_sig;
+        __be32          actual_trans_sig;
+        __be32          expected_reftag;
+        __be32          actual_reftag;
+        __be16          syndrome;
+        u8              rsvd22[2];
+        __be32          mkey;
+        __be64          err_offset;
+        u8              rsvd30[8];
+        __be32          qpn;
+        u8              rsvd38[2];
+        u8              signature;
+        u8              op_own;
+};
+
 struct mlx5_wqe_srq_next_seg {
         u8                      rsvd0[2];
         __be16                  next_wqe_index;
@@ -936,4 +956,27 @@ enum {
         MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO        = 1 <<  0
 };
 
+struct mlx5_allocate_psv_in {
+        struct mlx5_inbox_hdr   hdr;
+        __be32                  npsv_pd;
+        __be32                  rsvd_psv0;
+};
+
+struct mlx5_allocate_psv_out {
+        struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
+        __be32                  psv_idx[4];
+};
+
+struct mlx5_destroy_psv_in {
+        struct mlx5_inbox_hdr   hdr;
+        __be32                  psv_number;
+        u8                      rsvd[4];
+};
+
+struct mlx5_destroy_psv_out {
+        struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
+};
+
 #endif /* MLX5_DEVICE_H */
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 130bc8d77fa5..93cef6313e72 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -401,6 +401,26 @@ struct mlx5_eq {
         struct mlx5_rsc_debug   *dbg;
 };
 
+struct mlx5_core_psv {
+        u32     psv_idx;
+        struct psv_layout {
+                u32     pd;
+                u16     syndrome;
+                u16     reserved;
+                u16     bg;
+                u16     app_tag;
+                u32     ref_tag;
+        } psv;
+};
+
+struct mlx5_core_sig_ctx {
+        struct mlx5_core_psv    psv_memory;
+        struct mlx5_core_psv    psv_wire;
+        struct ib_sig_err       err_item;
+        bool                    sig_status_checked;
+        bool                    sig_err_exists;
+        u32                     sigerr_count;
+};
 
 struct mlx5_core_mr {
         u64                     iova;
@@ -475,6 +495,13 @@ struct mlx5_srq_table {
         struct radix_tree_root  tree;
 };
 
+struct mlx5_mr_table {
+        /* protect radix tree
+         */
+        rwlock_t                lock;
+        struct radix_tree_root  tree;
+};
+
 struct mlx5_priv {
         char                    name[MLX5_MAX_NAME_LEN];
         struct mlx5_eq_table    eq_table;
@@ -504,6 +531,10 @@ struct mlx5_priv {
         struct mlx5_cq_table    cq_table;
         /* end: cq staff */
 
+        /* start: mr staff */
+        struct mlx5_mr_table    mr_table;
+        /* end: mr staff */
+
         /* start: alloc staff */
         struct mutex            pgdir_mutex;
         struct list_head        pgdir_list;
@@ -651,6 +682,11 @@ static inline void mlx5_vfree(const void *addr)
                 kfree(addr);
 }
 
+static inline u32 mlx5_base_mkey(const u32 key)
+{
+        return key & 0xffffff00u;
+}
+
 int mlx5_dev_init(struct mlx5_core_dev *dev, struct pci_dev *pdev);
 void mlx5_dev_cleanup(struct mlx5_core_dev *dev);
 int mlx5_cmd_init(struct mlx5_core_dev *dev);
@@ -685,6 +721,8 @@ int mlx5_core_query_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
                         struct mlx5_query_srq_mbox_out *out);
 int mlx5_core_arm_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
                       u16 lwm, int is_srq);
+void mlx5_init_mr_table(struct mlx5_core_dev *dev);
+void mlx5_cleanup_mr_table(struct mlx5_core_dev *dev);
 int mlx5_core_create_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mr *mr,
                           struct mlx5_create_mkey_mbox_in *in, int inlen,
                           mlx5_cmd_cbk_t callback, void *context,
@@ -746,6 +784,9 @@ void mlx5_db_free(struct mlx5_core_dev *dev, struct mlx5_db *db);
 const char *mlx5_command_str(int command);
 int mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_cmdif_debugfs_cleanup(struct mlx5_core_dev *dev);
+int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn,
+                         int npsvs, u32 *sig_index);
+int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num);
 
 static inline u32 mlx5_mkey_to_idx(u32 mkey)
 {
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index d51eff713549..f829ad80ff28 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -37,6 +37,9 @@
 #include <linux/mlx5/driver.h>
 
 #define MLX5_INVALID_LKEY       0x100
+#define MLX5_SIG_WQE_SIZE       (MLX5_SEND_WQE_BB * 5)
+#define MLX5_DIF_SIZE           8
+#define MLX5_STRIDE_BLOCK_OP    0x400
 
 enum mlx5_qp_optpar {
         MLX5_QP_OPTPAR_ALT_ADDR_PATH            = 1 << 0,
@@ -151,6 +154,11 @@ enum {
         MLX5_SND_DBR    = 1,
 };
 
+enum {
+        MLX5_FLAGS_INLINE       = 1<<7,
+        MLX5_FLAGS_CHECK_FREE   = 1<<5,
+};
+
 struct mlx5_wqe_fmr_seg {
         __be32                  flags;
         __be32                  mem_key;
@@ -278,6 +286,60 @@ struct mlx5_wqe_inline_seg {
         __be32  byte_count;
 };
 
+struct mlx5_bsf {
+        struct mlx5_bsf_basic {
+                u8              bsf_size_sbs;
+                u8              check_byte_mask;
+                union {
+                        u8      copy_byte_mask;
+                        u8      bs_selector;
+                        u8      rsvd_wflags;
+                } wire;
+                union {
+                        u8      bs_selector;
+                        u8      rsvd_mflags;
+                } mem;
+                __be32          raw_data_size;
+                __be32          w_bfs_psv;
+                __be32          m_bfs_psv;
+        } basic;
+        struct mlx5_bsf_ext {
+                __be32          t_init_gen_pro_size;
+                __be32          rsvd_epi_size;
+                __be32          w_tfs_psv;
+                __be32          m_tfs_psv;
+        } ext;
+        struct mlx5_bsf_inl {
+                __be32          w_inl_vld;
+                __be32          w_rsvd;
+                __be64          w_block_format;
+                __be32          m_inl_vld;
+                __be32          m_rsvd;
+                __be64          m_block_format;
+        } inl;
+};
+
+struct mlx5_klm {
+        __be32          bcount;
+        __be32          key;
+        __be64          va;
+};
+
+struct mlx5_stride_block_entry {
+        __be16          stride;
+        __be16          bcount;
+        __be32          key;
+        __be64          va;
+};
+
+struct mlx5_stride_block_ctrl_seg {
+        __be32          bcount_per_cycle;
+        __be32          op;
+        __be32          repeat_count;
+        u16             rsvd;
+        __be16          num_entries;
+};
+
 struct mlx5_core_qp {
         void (*event)           (struct mlx5_core_qp *, int);
         int                     qpn;
@@ -444,6 +506,11 @@ static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u
         return radix_tree_lookup(&dev->priv.qp_table.tree, qpn);
 }
 
+static inline struct mlx5_core_mr *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key)
+{
+        return radix_tree_lookup(&dev->priv.mr_table.tree, key);
+}
+
 int mlx5_core_create_qp(struct mlx5_core_dev *dev,
                         struct mlx5_core_qp *qp,
                         struct mlx5_create_qp_mbox_in *in,