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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 12:18:17 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 12:18:17 -0400
commit7d2b6ef19cf0f98cef17aa5185de3631a618710a (patch)
treed4e87f3c47837fef59ef15273f89f68b73d963af /include/linux
parent5c73cc4b6c83e88863a5de869cc5df3b913aef4a (diff)
parent7415d97ee2b809119270fc3a365968ff8d4f544b (diff)
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson: "Driver updates for v4.1. Some of these are for drivers/soc, where we find more and more SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. The larger parts of this branch are: - MediaTek support for their PMIC wrapper interface, a high-level interface for talking to the system PMIC over a dedicated I2C interface. - Qualcomm SCM driver has been moved to drivers/firmware. It's used for CPU up/down and needs to be in a shared location for arm/arm64 common code. - cleanup of ARM-CCI PMU code. - another set of cleanusp to the OMAP GPMC code" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits) soc/mediatek: Remove unused variables clocksource: atmel-st: select MFD_SYSCON soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCs arm-cci: Fix CCI PMU event validation arm-cci: Split the code for PMU vs driver support arm-cci: Get rid of secure transactions for PMU driver arm-cci: Abstract the CCI400 PMU specific definitions arm-cci: Rearrange code for splitting PMU vs driver code drivers: cci: reject groups spanning multiple HW PMUs ARM: at91: remove useless include clocksource: atmel-st: remove mach/hardware dependency clocksource: atmel-st: use syscon/regmap ARM: at91: time: move the system timer driver to drivers/clocksource ARM: at91: properly initialize timer ARM: at91: at91rm9200: remove deprecated arm_pm_restart watchdog: at91rm9200: implement restart handler watchdog: at91rm9200: use the system timer syscon mfd: syscon: Add atmel system timer registers definition ARM: at91/dt: declare atmel,at91rm9200-st as a syscon soc: qcom: gsbi: Add support for ADM CRCI muxing ...
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/arm-cci.h9
-rw-r--r--include/linux/mfd/syscon/atmel-st.h49
-rw-r--r--include/linux/omap-gpmc.h3
-rw-r--r--include/linux/qcom_scm.h28
4 files changed, 87 insertions, 2 deletions
diff --git a/include/linux/arm-cci.h b/include/linux/arm-cci.h
index 79d6edf446d5..521ec1f2e6bc 100644
--- a/include/linux/arm-cci.h
+++ b/include/linux/arm-cci.h
@@ -24,16 +24,22 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/arm-cci.h>
28
27struct device_node; 29struct device_node;
28 30
29#ifdef CONFIG_ARM_CCI 31#ifdef CONFIG_ARM_CCI
30extern bool cci_probed(void); 32extern bool cci_probed(void);
33#else
34static inline bool cci_probed(void) { return false; }
35#endif
36
37#ifdef CONFIG_ARM_CCI400_PORT_CTRL
31extern int cci_ace_get_port(struct device_node *dn); 38extern int cci_ace_get_port(struct device_node *dn);
32extern int cci_disable_port_by_cpu(u64 mpidr); 39extern int cci_disable_port_by_cpu(u64 mpidr);
33extern int __cci_control_port_by_device(struct device_node *dn, bool enable); 40extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
34extern int __cci_control_port_by_index(u32 port, bool enable); 41extern int __cci_control_port_by_index(u32 port, bool enable);
35#else 42#else
36static inline bool cci_probed(void) { return false; }
37static inline int cci_ace_get_port(struct device_node *dn) 43static inline int cci_ace_get_port(struct device_node *dn)
38{ 44{
39 return -ENODEV; 45 return -ENODEV;
@@ -49,6 +55,7 @@ static inline int __cci_control_port_by_index(u32 port, bool enable)
49 return -ENODEV; 55 return -ENODEV;
50} 56}
51#endif 57#endif
58
52#define cci_disable_port_by_device(dev) \ 59#define cci_disable_port_by_device(dev) \
53 __cci_control_port_by_device(dev, false) 60 __cci_control_port_by_device(dev, false)
54#define cci_enable_port_by_device(dev) \ 61#define cci_enable_port_by_device(dev) \
diff --git a/include/linux/mfd/syscon/atmel-st.h b/include/linux/mfd/syscon/atmel-st.h
new file mode 100644
index 000000000000..8acf1ec1fa32
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-st.h
@@ -0,0 +1,49 @@
1/*
2 * Copyright (C) 2005 Ivan Kokshaysky
3 * Copyright (C) SAN People
4 *
5 * System Timer (ST) - System peripherals registers.
6 * Based on AT91RM9200 datasheet revision E.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef _LINUX_MFD_SYSCON_ATMEL_ST_H
15#define _LINUX_MFD_SYSCON_ATMEL_ST_H
16
17#include <linux/bitops.h>
18
19#define AT91_ST_CR 0x00 /* Control Register */
20#define AT91_ST_WDRST BIT(0) /* Watchdog Timer Restart */
21
22#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */
23#define AT91_ST_PIV 0xffff /* Period Interval Value */
24
25#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */
26#define AT91_ST_WDV 0xffff /* Watchdog Counter Value */
27#define AT91_ST_RSTEN BIT(16) /* Reset Enable */
28#define AT91_ST_EXTEN BIT(17) /* External Signal Assertion Enable */
29
30#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */
31#define AT91_ST_RTPRES 0xffff /* Real-time Prescalar Value */
32
33#define AT91_ST_SR 0x10 /* Status Register */
34#define AT91_ST_PITS BIT(0) /* Period Interval Timer Status */
35#define AT91_ST_WDOVF BIT(1) /* Watchdog Overflow */
36#define AT91_ST_RTTINC BIT(2) /* Real-time Timer Increment */
37#define AT91_ST_ALMS BIT(3) /* Alarm Status */
38
39#define AT91_ST_IER 0x14 /* Interrupt Enable Register */
40#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */
41#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */
42
43#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */
44#define AT91_ST_ALMV 0xfffff /* Alarm Value */
45
46#define AT91_ST_CRTR 0x24 /* Current Real-time Register */
47#define AT91_ST_CRTV 0xfffff /* Current Real-Time Value */
48
49#endif /* _LINUX_MFD_SYSCON_ATMEL_ST_H */
diff --git a/include/linux/omap-gpmc.h b/include/linux/omap-gpmc.h
index c2080eebbb47..7dee00143afd 100644
--- a/include/linux/omap-gpmc.h
+++ b/include/linux/omap-gpmc.h
@@ -163,7 +163,8 @@ extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
163 163
164extern void gpmc_cs_write_reg(int cs, int idx, u32 val); 164extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
165extern int gpmc_calc_divider(unsigned int sync_clk); 165extern int gpmc_calc_divider(unsigned int sync_clk);
166extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); 166extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
167 const struct gpmc_settings *s);
167extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p); 168extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p);
168extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); 169extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
169extern void gpmc_cs_free(int cs); 170extern void gpmc_cs_free(int cs);
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
new file mode 100644
index 000000000000..d7a974d5f57c
--- /dev/null
+++ b/include/linux/qcom_scm.h
@@ -0,0 +1,28 @@
1/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2015 Linaro Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#ifndef __QCOM_SCM_H
14#define __QCOM_SCM_H
15
16extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
17extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
18
19#define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
20#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
21
22extern void qcom_scm_cpu_power_down(u32 flags);
23
24#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
25
26extern u32 qcom_scm_get_version(void);
27
28#endif