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authorMatan Barak <matanb@mellanox.com>2014-12-11 03:58:00 -0500
committerDavid S. Miller <davem@davemloft.net>2014-12-11 14:47:36 -0500
commit7d077cd34eabb2ffd05abe0f2cad01da1ef11712 (patch)
tree91215913abb8d16177517d254f677c7119461875 /include/linux
parent431df8c7e9708433459fd806a08308997de43121 (diff)
net/mlx4: Add support for A0 steering
Add the required firmware commands for A0 steering and a way to enable that. The firmware support focuses on INIT_HCA, QUERY_HCA, QUERY_PORT, QUERY_DEV_CAP and QUERY_FUNC_CAP commands. Those commands are used to configure and query the device. The different A0 DMFS (steering) modes are: Static - optimized performance, but flow steering rules are limited. This mode should be choosed explicitly by the user in order to be used. Dynamic - this mode should be explicitly choosed by the user. In this mode, the FW works in optimized steering mode as long as it can and afterwards automatically drops to classic (full) DMFS. Disable - this mode should be explicitly choosed by the user. The user instructs the system not to use optimized steering, even if the FW supports Dynamic A0 DMFS (and thus will be able to use optimized steering in Default A0 DMFS mode). Default - this mode is implicitly choosed. In this mode, if the FW supports Dynamic A0 DMFS, it'll work in this mode. Otherwise, it'll work at Disable A0 DMFS mode. Under SRIOV configuration, when the A0 steering mode is enabled, older guest VF drivers who aren't using the RX QP allocation flag (MLX4_RESERVE_A0_QP) will get a QP from the general range and fail when attempting to register a steering rule. To avoid that, the PF context behaviour is changed once on A0 static mode, to require support for the allocation flag in VF drivers too. In order to enable A0 steering, we use log_num_mgm_entry_size param. If the value of the parameter is not positive, we treat the absolute value of log_num_mgm_entry_size as a bit field. Setting bit 2 of this bit field enables static A0 steering. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mlx4/device.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 39890cddc5fa..25c791e295fd 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -117,6 +117,14 @@ enum {
117 MLX4_STEERING_MODE_DEVICE_MANAGED 117 MLX4_STEERING_MODE_DEVICE_MANAGED
118}; 118};
119 119
120enum {
121 MLX4_STEERING_DMFS_A0_DEFAULT,
122 MLX4_STEERING_DMFS_A0_DYNAMIC,
123 MLX4_STEERING_DMFS_A0_STATIC,
124 MLX4_STEERING_DMFS_A0_DISABLE,
125 MLX4_STEERING_DMFS_A0_NOT_SUPPORTED
126};
127
120static inline const char *mlx4_steering_mode_str(int steering_mode) 128static inline const char *mlx4_steering_mode_str(int steering_mode)
121{ 129{
122 switch (steering_mode) { 130 switch (steering_mode) {
@@ -191,7 +199,8 @@ enum {
191 MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 15, 199 MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 15,
192 MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16, 200 MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16,
193 MLX4_DEV_CAP_FLAG2_SYS_EQS = 1LL << 17, 201 MLX4_DEV_CAP_FLAG2_SYS_EQS = 1LL << 17,
194 MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18 202 MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18,
203 MLX4_DEV_CAP_FLAG2_FS_A0 = 1LL << 19
195}; 204};
196 205
197enum { 206enum {
@@ -225,7 +234,8 @@ enum {
225 234
226enum { 235enum {
227 MLX4_FUNC_CAP_64B_EQE_CQE = 1L << 0, 236 MLX4_FUNC_CAP_64B_EQE_CQE = 1L << 0,
228 MLX4_FUNC_CAP_EQE_CQE_STRIDE = 1L << 1 237 MLX4_FUNC_CAP_EQE_CQE_STRIDE = 1L << 1,
238 MLX4_FUNC_CAP_DMFS_A0_STATIC = 1L << 2
229}; 239};
230 240
231 241
@@ -482,6 +492,7 @@ struct mlx4_caps {
482 int reserved_mcgs; 492 int reserved_mcgs;
483 int num_qp_per_mgm; 493 int num_qp_per_mgm;
484 int steering_mode; 494 int steering_mode;
495 int dmfs_high_steer_mode;
485 int fs_log_max_ucast_qp_range_size; 496 int fs_log_max_ucast_qp_range_size;
486 int num_pds; 497 int num_pds;
487 int reserved_pds; 498 int reserved_pds;
@@ -522,6 +533,8 @@ struct mlx4_caps {
522 int tunnel_offload_mode; 533 int tunnel_offload_mode;
523 u8 rx_checksum_flags_port[MLX4_MAX_PORTS + 1]; 534 u8 rx_checksum_flags_port[MLX4_MAX_PORTS + 1];
524 u8 alloc_res_qp_mask; 535 u8 alloc_res_qp_mask;
536 u32 dmfs_high_rate_qpn_base;
537 u32 dmfs_high_rate_qpn_range;
525}; 538};
526 539
527struct mlx4_buf_list { 540struct mlx4_buf_list {