diff options
| author | Florian Fainelli <florian@openwrt.org> | 2013-12-05 21:26:06 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-01-23 07:02:36 -0500 |
| commit | 74e200c781501fc7a551ae04e2d4171ba0a60d9b (patch) | |
| tree | 073435f141950f102972a6944a4eff19c8eb8eed /include/linux | |
| parent | 99cf97907015025bb4d386115afacaafc9fa6da0 (diff) | |
MIPS: BCM63XX: move UART register definitions
Move the BCM63XX UART driver definitions to
include/linux/serial_bcm63xx.h such that we do not rely on the MIPS
BCM63XX code to provide these for us.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6202/
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/serial_bcm63xx.h | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/include/linux/serial_bcm63xx.h b/include/linux/serial_bcm63xx.h new file mode 100644 index 000000000000..570e964dc899 --- /dev/null +++ b/include/linux/serial_bcm63xx.h | |||
| @@ -0,0 +1,119 @@ | |||
| 1 | #ifndef _LINUX_SERIAL_BCM63XX_H | ||
| 2 | #define _LINUX_SERIAL_BCM63XX_H | ||
| 3 | |||
| 4 | /* UART Control Register */ | ||
| 5 | #define UART_CTL_REG 0x0 | ||
| 6 | #define UART_CTL_RXTMOUTCNT_SHIFT 0 | ||
| 7 | #define UART_CTL_RXTMOUTCNT_MASK (0x1f << UART_CTL_RXTMOUTCNT_SHIFT) | ||
| 8 | #define UART_CTL_RSTTXDN_SHIFT 5 | ||
| 9 | #define UART_CTL_RSTTXDN_MASK (1 << UART_CTL_RSTTXDN_SHIFT) | ||
| 10 | #define UART_CTL_RSTRXFIFO_SHIFT 6 | ||
| 11 | #define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT) | ||
| 12 | #define UART_CTL_RSTTXFIFO_SHIFT 7 | ||
| 13 | #define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT) | ||
| 14 | #define UART_CTL_STOPBITS_SHIFT 8 | ||
| 15 | #define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT) | ||
| 16 | #define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT) | ||
| 17 | #define UART_CTL_STOPBITS_2 (0xf << UART_CTL_STOPBITS_SHIFT) | ||
| 18 | #define UART_CTL_BITSPERSYM_SHIFT 12 | ||
| 19 | #define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT) | ||
| 20 | #define UART_CTL_XMITBRK_SHIFT 14 | ||
| 21 | #define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT) | ||
| 22 | #define UART_CTL_RSVD_SHIFT 15 | ||
| 23 | #define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT) | ||
| 24 | #define UART_CTL_RXPAREVEN_SHIFT 16 | ||
| 25 | #define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT) | ||
| 26 | #define UART_CTL_RXPAREN_SHIFT 17 | ||
| 27 | #define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT) | ||
| 28 | #define UART_CTL_TXPAREVEN_SHIFT 18 | ||
| 29 | #define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT) | ||
| 30 | #define UART_CTL_TXPAREN_SHIFT 18 | ||
| 31 | #define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT) | ||
| 32 | #define UART_CTL_LOOPBACK_SHIFT 20 | ||
| 33 | #define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT) | ||
| 34 | #define UART_CTL_RXEN_SHIFT 21 | ||
| 35 | #define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT) | ||
| 36 | #define UART_CTL_TXEN_SHIFT 22 | ||
| 37 | #define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT) | ||
| 38 | #define UART_CTL_BRGEN_SHIFT 23 | ||
| 39 | #define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT) | ||
| 40 | |||
| 41 | /* UART Baudword register */ | ||
| 42 | #define UART_BAUD_REG 0x4 | ||
| 43 | |||
| 44 | /* UART Misc Control register */ | ||
| 45 | #define UART_MCTL_REG 0x8 | ||
| 46 | #define UART_MCTL_DTR_SHIFT 0 | ||
| 47 | #define UART_MCTL_DTR_MASK (1 << UART_MCTL_DTR_SHIFT) | ||
| 48 | #define UART_MCTL_RTS_SHIFT 1 | ||
| 49 | #define UART_MCTL_RTS_MASK (1 << UART_MCTL_RTS_SHIFT) | ||
| 50 | #define UART_MCTL_RXFIFOTHRESH_SHIFT 8 | ||
| 51 | #define UART_MCTL_RXFIFOTHRESH_MASK (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT) | ||
| 52 | #define UART_MCTL_TXFIFOTHRESH_SHIFT 12 | ||
| 53 | #define UART_MCTL_TXFIFOTHRESH_MASK (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT) | ||
| 54 | #define UART_MCTL_RXFIFOFILL_SHIFT 16 | ||
| 55 | #define UART_MCTL_RXFIFOFILL_MASK (0x1f << UART_MCTL_RXFIFOFILL_SHIFT) | ||
| 56 | #define UART_MCTL_TXFIFOFILL_SHIFT 24 | ||
| 57 | #define UART_MCTL_TXFIFOFILL_MASK (0x1f << UART_MCTL_TXFIFOFILL_SHIFT) | ||
| 58 | |||
| 59 | /* UART External Input Configuration register */ | ||
| 60 | #define UART_EXTINP_REG 0xc | ||
| 61 | #define UART_EXTINP_RI_SHIFT 0 | ||
| 62 | #define UART_EXTINP_RI_MASK (1 << UART_EXTINP_RI_SHIFT) | ||
| 63 | #define UART_EXTINP_CTS_SHIFT 1 | ||
| 64 | #define UART_EXTINP_CTS_MASK (1 << UART_EXTINP_CTS_SHIFT) | ||
| 65 | #define UART_EXTINP_DCD_SHIFT 2 | ||
| 66 | #define UART_EXTINP_DCD_MASK (1 << UART_EXTINP_DCD_SHIFT) | ||
| 67 | #define UART_EXTINP_DSR_SHIFT 3 | ||
| 68 | #define UART_EXTINP_DSR_MASK (1 << UART_EXTINP_DSR_SHIFT) | ||
| 69 | #define UART_EXTINP_IRSTAT(x) (1 << (x + 4)) | ||
| 70 | #define UART_EXTINP_IRMASK(x) (1 << (x + 8)) | ||
| 71 | #define UART_EXTINP_IR_RI 0 | ||
| 72 | #define UART_EXTINP_IR_CTS 1 | ||
| 73 | #define UART_EXTINP_IR_DCD 2 | ||
| 74 | #define UART_EXTINP_IR_DSR 3 | ||
| 75 | #define UART_EXTINP_RI_NOSENSE_SHIFT 16 | ||
| 76 | #define UART_EXTINP_RI_NOSENSE_MASK (1 << UART_EXTINP_RI_NOSENSE_SHIFT) | ||
| 77 | #define UART_EXTINP_CTS_NOSENSE_SHIFT 17 | ||
| 78 | #define UART_EXTINP_CTS_NOSENSE_MASK (1 << UART_EXTINP_CTS_NOSENSE_SHIFT) | ||
| 79 | #define UART_EXTINP_DCD_NOSENSE_SHIFT 18 | ||
| 80 | #define UART_EXTINP_DCD_NOSENSE_MASK (1 << UART_EXTINP_DCD_NOSENSE_SHIFT) | ||
| 81 | #define UART_EXTINP_DSR_NOSENSE_SHIFT 19 | ||
| 82 | #define UART_EXTINP_DSR_NOSENSE_MASK (1 << UART_EXTINP_DSR_NOSENSE_SHIFT) | ||
| 83 | |||
| 84 | /* UART Interrupt register */ | ||
| 85 | #define UART_IR_REG 0x10 | ||
| 86 | #define UART_IR_MASK(x) (1 << (x + 16)) | ||
| 87 | #define UART_IR_STAT(x) (1 << (x)) | ||
| 88 | #define UART_IR_EXTIP 0 | ||
| 89 | #define UART_IR_TXUNDER 1 | ||
| 90 | #define UART_IR_TXOVER 2 | ||
| 91 | #define UART_IR_TXTRESH 3 | ||
| 92 | #define UART_IR_TXRDLATCH 4 | ||
| 93 | #define UART_IR_TXEMPTY 5 | ||
| 94 | #define UART_IR_RXUNDER 6 | ||
| 95 | #define UART_IR_RXOVER 7 | ||
| 96 | #define UART_IR_RXTIMEOUT 8 | ||
| 97 | #define UART_IR_RXFULL 9 | ||
| 98 | #define UART_IR_RXTHRESH 10 | ||
| 99 | #define UART_IR_RXNOTEMPTY 11 | ||
| 100 | #define UART_IR_RXFRAMEERR 12 | ||
| 101 | #define UART_IR_RXPARERR 13 | ||
| 102 | #define UART_IR_RXBRK 14 | ||
| 103 | #define UART_IR_TXDONE 15 | ||
| 104 | |||
| 105 | /* UART Fifo register */ | ||
| 106 | #define UART_FIFO_REG 0x14 | ||
| 107 | #define UART_FIFO_VALID_SHIFT 0 | ||
| 108 | #define UART_FIFO_VALID_MASK 0xff | ||
| 109 | #define UART_FIFO_FRAMEERR_SHIFT 8 | ||
| 110 | #define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT) | ||
| 111 | #define UART_FIFO_PARERR_SHIFT 9 | ||
| 112 | #define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT) | ||
| 113 | #define UART_FIFO_BRKDET_SHIFT 10 | ||
| 114 | #define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT) | ||
| 115 | #define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \ | ||
| 116 | UART_FIFO_PARERR_MASK | \ | ||
| 117 | UART_FIFO_BRKDET_MASK) | ||
| 118 | |||
| 119 | #endif /* _LINUX_SERIAL_BCM63XX_H */ | ||
