diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2009-01-06 13:38:16 -0500 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-01-06 13:38:16 -0500 |
| commit | 74465b4ff9ac1da503025c0a0042e023bfa6505c (patch) | |
| tree | ce63f4a4b055b65cae1edaddd334931bf512c76e /include/linux | |
| parent | 33df8ca068123457db56c316946a3c0e4ef787d6 (diff) | |
atmel-mci: convert to dma_request_channel and down-level dma_slave
dma_request_channel provides an exclusive channel, so we no longer need to
pass slave data through dmaengine.
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/dmaengine.h | 38 | ||||
| -rw-r--r-- | include/linux/dw_dmac.h | 31 |
2 files changed, 23 insertions, 46 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 6f2d070ac7f3..d63544cf8a1a 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h | |||
| @@ -96,17 +96,6 @@ enum dma_transaction_type { | |||
| 96 | /* last transaction type for creation of the capabilities mask */ | 96 | /* last transaction type for creation of the capabilities mask */ |
| 97 | #define DMA_TX_TYPE_END (DMA_SLAVE + 1) | 97 | #define DMA_TX_TYPE_END (DMA_SLAVE + 1) |
| 98 | 98 | ||
| 99 | /** | ||
| 100 | * enum dma_slave_width - DMA slave register access width. | ||
| 101 | * @DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses | ||
| 102 | * @DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses | ||
| 103 | * @DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses | ||
| 104 | */ | ||
| 105 | enum dma_slave_width { | ||
| 106 | DMA_SLAVE_WIDTH_8BIT, | ||
| 107 | DMA_SLAVE_WIDTH_16BIT, | ||
| 108 | DMA_SLAVE_WIDTH_32BIT, | ||
| 109 | }; | ||
| 110 | 99 | ||
| 111 | /** | 100 | /** |
| 112 | * enum dma_ctrl_flags - DMA flags to augment operation preparation, | 101 | * enum dma_ctrl_flags - DMA flags to augment operation preparation, |
| @@ -133,32 +122,6 @@ enum dma_ctrl_flags { | |||
| 133 | typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; | 122 | typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; |
| 134 | 123 | ||
| 135 | /** | 124 | /** |
| 136 | * struct dma_slave - Information about a DMA slave | ||
| 137 | * @dev: device acting as DMA slave | ||
| 138 | * @dma_dev: required DMA master device. If non-NULL, the client can not be | ||
| 139 | * bound to other masters than this. | ||
| 140 | * @tx_reg: physical address of data register used for | ||
| 141 | * memory-to-peripheral transfers | ||
| 142 | * @rx_reg: physical address of data register used for | ||
| 143 | * peripheral-to-memory transfers | ||
| 144 | * @reg_width: peripheral register width | ||
| 145 | * | ||
| 146 | * If dma_dev is non-NULL, the client can not be bound to other DMA | ||
| 147 | * masters than the one corresponding to this device. The DMA master | ||
| 148 | * driver may use this to determine if there is controller-specific | ||
| 149 | * data wrapped around this struct. Drivers of platform code that sets | ||
| 150 | * the dma_dev field must therefore make sure to use an appropriate | ||
| 151 | * controller-specific dma slave structure wrapping this struct. | ||
| 152 | */ | ||
| 153 | struct dma_slave { | ||
| 154 | struct device *dev; | ||
| 155 | struct device *dma_dev; | ||
| 156 | dma_addr_t tx_reg; | ||
| 157 | dma_addr_t rx_reg; | ||
| 158 | enum dma_slave_width reg_width; | ||
| 159 | }; | ||
| 160 | |||
| 161 | /** | ||
| 162 | * struct dma_chan_percpu - the per-CPU part of struct dma_chan | 125 | * struct dma_chan_percpu - the per-CPU part of struct dma_chan |
| 163 | * @refcount: local_t used for open-coded "bigref" counting | 126 | * @refcount: local_t used for open-coded "bigref" counting |
| 164 | * @memcpy_count: transaction counter | 127 | * @memcpy_count: transaction counter |
| @@ -248,7 +211,6 @@ typedef enum dma_state_client (*dma_filter_fn)(struct dma_chan *chan, void *filt | |||
| 248 | struct dma_client { | 211 | struct dma_client { |
| 249 | dma_event_callback event_callback; | 212 | dma_event_callback event_callback; |
| 250 | dma_cap_mask_t cap_mask; | 213 | dma_cap_mask_t cap_mask; |
| 251 | struct dma_slave *slave; | ||
| 252 | struct list_head global_node; | 214 | struct list_head global_node; |
| 253 | }; | 215 | }; |
| 254 | 216 | ||
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index 04d217b442bf..d797dde247f7 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h | |||
| @@ -22,14 +22,34 @@ struct dw_dma_platform_data { | |||
| 22 | }; | 22 | }; |
| 23 | 23 | ||
| 24 | /** | 24 | /** |
| 25 | * enum dw_dma_slave_width - DMA slave register access width. | ||
| 26 | * @DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses | ||
| 27 | * @DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses | ||
| 28 | * @DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses | ||
| 29 | */ | ||
| 30 | enum dw_dma_slave_width { | ||
| 31 | DW_DMA_SLAVE_WIDTH_8BIT, | ||
| 32 | DW_DMA_SLAVE_WIDTH_16BIT, | ||
| 33 | DW_DMA_SLAVE_WIDTH_32BIT, | ||
| 34 | }; | ||
| 35 | |||
| 36 | /** | ||
| 25 | * struct dw_dma_slave - Controller-specific information about a slave | 37 | * struct dw_dma_slave - Controller-specific information about a slave |
| 26 | * @slave: Generic information about the slave | 38 | * |
| 27 | * @ctl_lo: Platform-specific initializer for the CTL_LO register | 39 | * @dma_dev: required DMA master device |
| 40 | * @tx_reg: physical address of data register used for | ||
| 41 | * memory-to-peripheral transfers | ||
| 42 | * @rx_reg: physical address of data register used for | ||
| 43 | * peripheral-to-memory transfers | ||
| 44 | * @reg_width: peripheral register width | ||
| 28 | * @cfg_hi: Platform-specific initializer for the CFG_HI register | 45 | * @cfg_hi: Platform-specific initializer for the CFG_HI register |
| 29 | * @cfg_lo: Platform-specific initializer for the CFG_LO register | 46 | * @cfg_lo: Platform-specific initializer for the CFG_LO register |
| 30 | */ | 47 | */ |
| 31 | struct dw_dma_slave { | 48 | struct dw_dma_slave { |
| 32 | struct dma_slave slave; | 49 | struct device *dma_dev; |
| 50 | dma_addr_t tx_reg; | ||
| 51 | dma_addr_t rx_reg; | ||
| 52 | enum dw_dma_slave_width reg_width; | ||
| 33 | u32 cfg_hi; | 53 | u32 cfg_hi; |
| 34 | u32 cfg_lo; | 54 | u32 cfg_lo; |
| 35 | }; | 55 | }; |
| @@ -54,9 +74,4 @@ struct dw_dma_slave { | |||
| 54 | #define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ | 74 | #define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */ |
| 55 | #define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ | 75 | #define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */ |
| 56 | 76 | ||
| 57 | static inline struct dw_dma_slave *to_dw_dma_slave(struct dma_slave *slave) | ||
| 58 | { | ||
| 59 | return container_of(slave, struct dw_dma_slave, slave); | ||
| 60 | } | ||
| 61 | |||
| 62 | #endif /* DW_DMAC_H */ | 77 | #endif /* DW_DMAC_H */ |
