diff options
| author | Chanwoo Choi <cw00.choi@samsung.com> | 2014-07-22 21:05:34 -0400 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2014-07-22 21:05:34 -0400 |
| commit | 6b18aa180645706155da991847bb36b10c1c84c8 (patch) | |
| tree | d2c2ed47d2b2290cfdcb6261e932dd07e6523485 /include/linux | |
| parent | ac65a625a0961e7a96f2e5e182073691d0474c04 (diff) | |
| parent | 342d669c1ee421323f552a62729d3a3d0065093c (diff) | |
Merge tag 'mfd-extcon-regulator-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into extcon-next
Immutable branch between MFD, Extcon and Regulator due for v3.17
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mfd/max77693-private.h | 54 |
1 files changed, 44 insertions, 10 deletions
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 3e050b933dd0..c466ff3e16b8 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h | |||
| @@ -262,6 +262,41 @@ enum max77693_irq_source { | |||
| 262 | MAX77693_IRQ_GROUP_NR, | 262 | MAX77693_IRQ_GROUP_NR, |
| 263 | }; | 263 | }; |
| 264 | 264 | ||
| 265 | #define LED_IRQ_FLED2_OPEN BIT(0) | ||
| 266 | #define LED_IRQ_FLED2_SHORT BIT(1) | ||
| 267 | #define LED_IRQ_FLED1_OPEN BIT(2) | ||
| 268 | #define LED_IRQ_FLED1_SHORT BIT(3) | ||
| 269 | #define LED_IRQ_MAX_FLASH BIT(4) | ||
| 270 | |||
| 271 | #define TOPSYS_IRQ_T120C_INT BIT(0) | ||
| 272 | #define TOPSYS_IRQ_T140C_INT BIT(1) | ||
| 273 | #define TOPSYS_IRQ_LOWSYS_INT BIT(3) | ||
| 274 | |||
| 275 | #define CHG_IRQ_BYP_I BIT(0) | ||
| 276 | #define CHG_IRQ_THM_I BIT(2) | ||
| 277 | #define CHG_IRQ_BAT_I BIT(3) | ||
| 278 | #define CHG_IRQ_CHG_I BIT(4) | ||
| 279 | #define CHG_IRQ_CHGIN_I BIT(6) | ||
| 280 | |||
| 281 | #define MUIC_IRQ_INT1_ADC BIT(0) | ||
| 282 | #define MUIC_IRQ_INT1_ADC_LOW BIT(1) | ||
| 283 | #define MUIC_IRQ_INT1_ADC_ERR BIT(2) | ||
| 284 | #define MUIC_IRQ_INT1_ADC1K BIT(3) | ||
| 285 | |||
| 286 | #define MUIC_IRQ_INT2_CHGTYP BIT(0) | ||
| 287 | #define MUIC_IRQ_INT2_CHGDETREUN BIT(1) | ||
| 288 | #define MUIC_IRQ_INT2_DCDTMR BIT(2) | ||
| 289 | #define MUIC_IRQ_INT2_DXOVP BIT(3) | ||
| 290 | #define MUIC_IRQ_INT2_VBVOLT BIT(4) | ||
| 291 | #define MUIC_IRQ_INT2_VIDRM BIT(5) | ||
| 292 | |||
| 293 | #define MUIC_IRQ_INT3_EOC BIT(0) | ||
| 294 | #define MUIC_IRQ_INT3_CGMBC BIT(1) | ||
| 295 | #define MUIC_IRQ_INT3_OVP BIT(2) | ||
| 296 | #define MUIC_IRQ_INT3_MBCCHG_ERR BIT(3) | ||
| 297 | #define MUIC_IRQ_INT3_CHG_ENABLED BIT(4) | ||
| 298 | #define MUIC_IRQ_INT3_BAT_DET BIT(5) | ||
| 299 | |||
| 265 | enum max77693_irq { | 300 | enum max77693_irq { |
| 266 | /* PMIC - FLASH */ | 301 | /* PMIC - FLASH */ |
| 267 | MAX77693_LED_IRQ_FLED2_OPEN, | 302 | MAX77693_LED_IRQ_FLED2_OPEN, |
| @@ -282,6 +317,10 @@ enum max77693_irq { | |||
| 282 | MAX77693_CHG_IRQ_CHG_I, | 317 | MAX77693_CHG_IRQ_CHG_I, |
| 283 | MAX77693_CHG_IRQ_CHGIN_I, | 318 | MAX77693_CHG_IRQ_CHGIN_I, |
| 284 | 319 | ||
| 320 | MAX77693_IRQ_NR, | ||
| 321 | }; | ||
| 322 | |||
| 323 | enum max77693_irq_muic { | ||
| 285 | /* MUIC INT1 */ | 324 | /* MUIC INT1 */ |
| 286 | MAX77693_MUIC_IRQ_INT1_ADC, | 325 | MAX77693_MUIC_IRQ_INT1_ADC, |
| 287 | MAX77693_MUIC_IRQ_INT1_ADC_LOW, | 326 | MAX77693_MUIC_IRQ_INT1_ADC_LOW, |
| @@ -304,7 +343,7 @@ enum max77693_irq { | |||
| 304 | MAX77693_MUIC_IRQ_INT3_CHG_ENABLED, | 343 | MAX77693_MUIC_IRQ_INT3_CHG_ENABLED, |
| 305 | MAX77693_MUIC_IRQ_INT3_BAT_DET, | 344 | MAX77693_MUIC_IRQ_INT3_BAT_DET, |
| 306 | 345 | ||
| 307 | MAX77693_IRQ_NR, | 346 | MAX77693_MUIC_IRQ_NR, |
| 308 | }; | 347 | }; |
| 309 | 348 | ||
| 310 | struct max77693_dev { | 349 | struct max77693_dev { |
| @@ -319,7 +358,10 @@ struct max77693_dev { | |||
| 319 | struct regmap *regmap_muic; | 358 | struct regmap *regmap_muic; |
| 320 | struct regmap *regmap_haptic; | 359 | struct regmap *regmap_haptic; |
| 321 | 360 | ||
| 322 | struct irq_domain *irq_domain; | 361 | struct regmap_irq_chip_data *irq_data_led; |
| 362 | struct regmap_irq_chip_data *irq_data_topsys; | ||
| 363 | struct regmap_irq_chip_data *irq_data_charger; | ||
| 364 | struct regmap_irq_chip_data *irq_data_muic; | ||
| 323 | 365 | ||
| 324 | int irq; | 366 | int irq; |
| 325 | int irq_gpio; | 367 | int irq_gpio; |
| @@ -332,14 +374,6 @@ enum max77693_types { | |||
| 332 | TYPE_MAX77693, | 374 | TYPE_MAX77693, |
| 333 | }; | 375 | }; |
| 334 | 376 | ||
| 335 | extern int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest); | ||
| 336 | extern int max77693_bulk_read(struct regmap *map, u8 reg, int count, | ||
| 337 | u8 *buf); | ||
| 338 | extern int max77693_write_reg(struct regmap *map, u8 reg, u8 value); | ||
| 339 | extern int max77693_bulk_write(struct regmap *map, u8 reg, int count, | ||
| 340 | u8 *buf); | ||
| 341 | extern int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask); | ||
| 342 | |||
| 343 | extern int max77693_irq_init(struct max77693_dev *max77686); | 377 | extern int max77693_irq_init(struct max77693_dev *max77686); |
| 344 | extern void max77693_irq_exit(struct max77693_dev *max77686); | 378 | extern void max77693_irq_exit(struct max77693_dev *max77686); |
| 345 | extern int max77693_irq_resume(struct max77693_dev *max77686); | 379 | extern int max77693_irq_resume(struct max77693_dev *max77686); |
