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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-03-15 15:56:11 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-03-15 15:56:11 -0400 |
| commit | 61ec7e77d724f3150338ecaa2d16d4379b7498b1 (patch) | |
| tree | eb47e147131eeeb641664931aadd8079382c2b8d /include/linux | |
| parent | 68f8ea184bf7a552b59a38c4b0c7dc243822d2d5 (diff) | |
| parent | 0ec83bd2460ed6aed0e7f29f9e0633b054621c02 (diff) | |
Merge tag 'extcon-3.9-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-linus
Chanwoo writes:
extcon fixes for 3.9-rc3
This is small fixes against 3.9-rc2.
Fix to max77693 extcon driver:
- Set default value of MUIC register to bring up it.
Fix to max8997 extcon driver:
- Fix null pointer error duing probe when platform data
isn't used.
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mfd/max77693-private.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 5b18ecde69b5..1aa4f13cdfa6 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h | |||
| @@ -106,6 +106,29 @@ enum max77693_muic_reg { | |||
| 106 | MAX77693_MUIC_REG_END, | 106 | MAX77693_MUIC_REG_END, |
| 107 | }; | 107 | }; |
| 108 | 108 | ||
| 109 | /* MAX77693 INTMASK1~2 Register */ | ||
| 110 | #define INTMASK1_ADC1K_SHIFT 3 | ||
| 111 | #define INTMASK1_ADCERR_SHIFT 2 | ||
| 112 | #define INTMASK1_ADCLOW_SHIFT 1 | ||
| 113 | #define INTMASK1_ADC_SHIFT 0 | ||
| 114 | #define INTMASK1_ADC1K_MASK (1 << INTMASK1_ADC1K_SHIFT) | ||
| 115 | #define INTMASK1_ADCERR_MASK (1 << INTMASK1_ADCERR_SHIFT) | ||
| 116 | #define INTMASK1_ADCLOW_MASK (1 << INTMASK1_ADCLOW_SHIFT) | ||
| 117 | #define INTMASK1_ADC_MASK (1 << INTMASK1_ADC_SHIFT) | ||
| 118 | |||
| 119 | #define INTMASK2_VIDRM_SHIFT 5 | ||
| 120 | #define INTMASK2_VBVOLT_SHIFT 4 | ||
| 121 | #define INTMASK2_DXOVP_SHIFT 3 | ||
| 122 | #define INTMASK2_DCDTMR_SHIFT 2 | ||
| 123 | #define INTMASK2_CHGDETRUN_SHIFT 1 | ||
| 124 | #define INTMASK2_CHGTYP_SHIFT 0 | ||
| 125 | #define INTMASK2_VIDRM_MASK (1 << INTMASK2_VIDRM_SHIFT) | ||
| 126 | #define INTMASK2_VBVOLT_MASK (1 << INTMASK2_VBVOLT_SHIFT) | ||
| 127 | #define INTMASK2_DXOVP_MASK (1 << INTMASK2_DXOVP_SHIFT) | ||
| 128 | #define INTMASK2_DCDTMR_MASK (1 << INTMASK2_DCDTMR_SHIFT) | ||
| 129 | #define INTMASK2_CHGDETRUN_MASK (1 << INTMASK2_CHGDETRUN_SHIFT) | ||
| 130 | #define INTMASK2_CHGTYP_MASK (1 << INTMASK2_CHGTYP_SHIFT) | ||
| 131 | |||
| 109 | /* MAX77693 MUIC - STATUS1~3 Register */ | 132 | /* MAX77693 MUIC - STATUS1~3 Register */ |
| 110 | #define STATUS1_ADC_SHIFT (0) | 133 | #define STATUS1_ADC_SHIFT (0) |
| 111 | #define STATUS1_ADCLOW_SHIFT (5) | 134 | #define STATUS1_ADCLOW_SHIFT (5) |
