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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2014-05-25 08:40:34 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2014-05-25 08:40:34 -0400
commit5a3c7c09e015c1ba23e6e4951daeccfcfa4189ca (patch)
tree6f4c654c366c8a9421e2ea80c525fc6e2ceaf04f /include/linux
parentc78b0830667a7e7c1f0ca65b76b33166a84806b3 (diff)
parente2d0e90fae82809667f1dcf4d0d9baa421691c7a (diff)
Merge branch 'pm-clk' into acpi-lpss
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/clk-provider.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 511917416fb0..fb4eca6907cd 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -413,6 +413,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
413 const char *parent_name, unsigned long flags, 413 const char *parent_name, unsigned long flags,
414 unsigned int mult, unsigned int div); 414 unsigned int mult, unsigned int div);
415 415
416/**
417 * struct clk_fractional_divider - adjustable fractional divider clock
418 *
419 * @hw: handle between common and hardware-specific interfaces
420 * @reg: register containing the divider
421 * @mshift: shift to the numerator bit field
422 * @mwidth: width of the numerator bit field
423 * @nshift: shift to the denominator bit field
424 * @nwidth: width of the denominator bit field
425 * @lock: register lock
426 *
427 * Clock with adjustable fractional divider affecting its output frequency.
428 */
429
430struct clk_fractional_divider {
431 struct clk_hw hw;
432 void __iomem *reg;
433 u8 mshift;
434 u32 mmask;
435 u8 nshift;
436 u32 nmask;
437 u8 flags;
438 spinlock_t *lock;
439};
440
441extern const struct clk_ops clk_fractional_divider_ops;
442struct clk *clk_register_fractional_divider(struct device *dev,
443 const char *name, const char *parent_name, unsigned long flags,
444 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
445 u8 clk_divider_flags, spinlock_t *lock);
446
416/*** 447/***
417 * struct clk_composite - aggregate clock of mux, divider and gate clocks 448 * struct clk_composite - aggregate clock of mux, divider and gate clocks
418 * 449 *