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authorStephen Warren <swarren@nvidia.com>2013-04-04 18:08:13 -0400
committerStephen Warren <swarren@nvidia.com>2013-04-04 18:08:13 -0400
commit43089433b00a086980fc6e9571535477fb749e84 (patch)
tree194817879be6f5cc5e56bc2ab2c3276af146238c /include/linux
parent8aa15d82df291b398d604b527a20310f10c1c706 (diff)
parent533ddeb1e86f506129ee388a6cc13796dcf31311 (diff)
Merge remote-tracking branch 'linaro_mturquette_linux/clk-for-3.10' into for-3.10/clk
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/clk-private.h2
-rw-r--r--include/linux/clk-provider.h51
-rw-r--r--include/linux/clk/sunxi.h22
3 files changed, 73 insertions, 2 deletions
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index 9c7f5807824b..dd7adff76e81 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -152,7 +152,7 @@ struct clk {
152 }, \ 152 }, \
153 .reg = _reg, \ 153 .reg = _reg, \
154 .shift = _shift, \ 154 .shift = _shift, \
155 .width = _width, \ 155 .mask = BIT(_width) - 1, \
156 .flags = _mux_flags, \ 156 .flags = _mux_flags, \
157 .lock = _lock, \ 157 .lock = _lock, \
158 }; \ 158 }; \
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 7f197d7addb0..1f0352802794 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -45,6 +45,14 @@ struct clk_hw;
45 * undo any work done in the @prepare callback. Called with 45 * undo any work done in the @prepare callback. Called with
46 * prepare_lock held. 46 * prepare_lock held.
47 * 47 *
48 * @is_prepared: Queries the hardware to determine if the clock is prepared.
49 * This function is allowed to sleep. Optional, if this op is not
50 * set then the prepare count will be used.
51 *
52 * @unprepare_unused: Unprepare the clock atomically. Only called from
53 * clk_disable_unused for prepare clocks with special needs.
54 * Called with prepare mutex held. This function may sleep.
55 *
48 * @enable: Enable the clock atomically. This must not return until the 56 * @enable: Enable the clock atomically. This must not return until the
49 * clock is generating a valid clock signal, usable by consumer 57 * clock is generating a valid clock signal, usable by consumer
50 * devices. Called with enable_lock held. This function must not 58 * devices. Called with enable_lock held. This function must not
@@ -108,6 +116,8 @@ struct clk_hw;
108struct clk_ops { 116struct clk_ops {
109 int (*prepare)(struct clk_hw *hw); 117 int (*prepare)(struct clk_hw *hw);
110 void (*unprepare)(struct clk_hw *hw); 118 void (*unprepare)(struct clk_hw *hw);
119 int (*is_prepared)(struct clk_hw *hw);
120 void (*unprepare_unused)(struct clk_hw *hw);
111 int (*enable)(struct clk_hw *hw); 121 int (*enable)(struct clk_hw *hw);
112 void (*disable)(struct clk_hw *hw); 122 void (*disable)(struct clk_hw *hw);
113 int (*is_enabled)(struct clk_hw *hw); 123 int (*is_enabled)(struct clk_hw *hw);
@@ -287,8 +297,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
287struct clk_mux { 297struct clk_mux {
288 struct clk_hw hw; 298 struct clk_hw hw;
289 void __iomem *reg; 299 void __iomem *reg;
300 u32 *table;
301 u32 mask;
290 u8 shift; 302 u8 shift;
291 u8 width;
292 u8 flags; 303 u8 flags;
293 spinlock_t *lock; 304 spinlock_t *lock;
294}; 305};
@@ -297,11 +308,17 @@ struct clk_mux {
297#define CLK_MUX_INDEX_BIT BIT(1) 308#define CLK_MUX_INDEX_BIT BIT(1)
298 309
299extern const struct clk_ops clk_mux_ops; 310extern const struct clk_ops clk_mux_ops;
311
300struct clk *clk_register_mux(struct device *dev, const char *name, 312struct clk *clk_register_mux(struct device *dev, const char *name,
301 const char **parent_names, u8 num_parents, unsigned long flags, 313 const char **parent_names, u8 num_parents, unsigned long flags,
302 void __iomem *reg, u8 shift, u8 width, 314 void __iomem *reg, u8 shift, u8 width,
303 u8 clk_mux_flags, spinlock_t *lock); 315 u8 clk_mux_flags, spinlock_t *lock);
304 316
317struct clk *clk_register_mux_table(struct device *dev, const char *name,
318 const char **parent_names, u8 num_parents, unsigned long flags,
319 void __iomem *reg, u8 shift, u32 mask,
320 u8 clk_mux_flags, u32 *table, spinlock_t *lock);
321
305/** 322/**
306 * struct clk_fixed_factor - fixed multiplier and divider clock 323 * struct clk_fixed_factor - fixed multiplier and divider clock
307 * 324 *
@@ -325,6 +342,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
325 const char *parent_name, unsigned long flags, 342 const char *parent_name, unsigned long flags,
326 unsigned int mult, unsigned int div); 343 unsigned int mult, unsigned int div);
327 344
345/***
346 * struct clk_composite - aggregate clock of mux, divider and gate clocks
347 *
348 * @hw: handle between common and hardware-specific interfaces
349 * @mux_hw: handle between composite and hardware-specifix mux clock
350 * @div_hw: handle between composite and hardware-specifix divider clock
351 * @gate_hw: handle between composite and hardware-specifix gate clock
352 * @mux_ops: clock ops for mux
353 * @div_ops: clock ops for divider
354 * @gate_ops: clock ops for gate
355 */
356struct clk_composite {
357 struct clk_hw hw;
358 struct clk_ops ops;
359
360 struct clk_hw *mux_hw;
361 struct clk_hw *div_hw;
362 struct clk_hw *gate_hw;
363
364 const struct clk_ops *mux_ops;
365 const struct clk_ops *div_ops;
366 const struct clk_ops *gate_ops;
367};
368
369struct clk *clk_register_composite(struct device *dev, const char *name,
370 const char **parent_names, int num_parents,
371 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
372 struct clk_hw *div_hw, const struct clk_ops *div_ops,
373 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
374 unsigned long flags);
375
328/** 376/**
329 * clk_register - allocate a new clock, register it and return an opaque cookie 377 * clk_register - allocate a new clock, register it and return an opaque cookie
330 * @dev: device that is registering this clock 378 * @dev: device that is registering this clock
@@ -351,6 +399,7 @@ unsigned int __clk_get_enable_count(struct clk *clk);
351unsigned int __clk_get_prepare_count(struct clk *clk); 399unsigned int __clk_get_prepare_count(struct clk *clk);
352unsigned long __clk_get_rate(struct clk *clk); 400unsigned long __clk_get_rate(struct clk *clk);
353unsigned long __clk_get_flags(struct clk *clk); 401unsigned long __clk_get_flags(struct clk *clk);
402bool __clk_is_prepared(struct clk *clk);
354bool __clk_is_enabled(struct clk *clk); 403bool __clk_is_enabled(struct clk *clk);
355struct clk *__clk_lookup(const char *name); 404struct clk *__clk_lookup(const char *name);
356 405
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
new file mode 100644
index 000000000000..e074fdd5a236
--- /dev/null
+++ b/include/linux/clk/sunxi.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright 2012 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef __LINUX_CLK_SUNXI_H_
18#define __LINUX_CLK_SUNXI_H_
19
20void __init sunxi_init_clocks(void);
21
22#endif