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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-18 11:01:44 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-18 11:01:44 -0500 |
| commit | 402521b8f7cc1f4f442418cc98ec6e37388207b0 (patch) | |
| tree | a2cb155ff909fc8e26e3e5ebd484577697f30d79 /include/linux | |
| parent | f5af19d10d151c5a2afae3306578f485c244db25 (diff) | |
| parent | eb928d40a93f73dd5bdad62c2d363df296ff94ea (diff) | |
Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"NAND:
- Add new Hisilicon NAND driver for Hip04
- Add default reboot handler, to ensure all outstanding erase
transactions complete in time
- jz4740: convert to use GPIO descriptor API
- Atmel: add support for sama5d4
- Change default bitflip threshold to 75% of correction strength
- Miscellaneous cleanups and bugfixes
SPI NOR:
- Freescale QuadSPI:
- Fix a few probe() and remove() issues
- Add a MAINTAINERS entry for this driver
- Tweak transfer size to increase read performance
- Add suspend/resume support
- Add Micron quad I/O support
- ST FSM SPI: miscellaneous fixes
JFFS2:
- gracefully handle corrupted 'offset' field found on flash
Other:
- bcm47xxpart: add tweaks for a few new devices
- mtdconcat: set return lengths properly for mtd_write_oob()
- map_ram: enable use with mtdoops
- maps: support fallback to ROM/UBI for write-protected NOR flash"
* tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd: (46 commits)
mtd: hisilicon: && vs & typo
jffs2: fix handling of corrupted summary length
mtd: hisilicon: add device tree binding documentation
mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc
mtd: avoid registering reboot notifier twice
mtd: concat: set the return lengths properly
mtd: kconfig: replace PPC_OF with PPC
mtd: denali: remove unnecessary stubs
mtd: nand: remove redundant local variable
MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driver
mtd: fsl-quadspi: improve read performance by increase AHB transfer size
mtd: fsl-quadspi: Remove unnecessary 'map_failed' label
mtd: fsl-quadspi: Remove unneeded success/error messages
mtd: fsl-quadspi: Fix the error paths
mtd: nand: omap: drop condition with no effect
mtd: nand: jz4740: Convert to GPIO descriptor API
mtd: nand: Request strength instead of bytes for soft BCH
mtd: nand: default bitflip-reporting threshold to 75% of correction strength
mtd: atmel_nand: introduce a new compatible string for sama5d4 chip
mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction()
...
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mtd/mtd.h | 1 | ||||
| -rw-r--r-- | include/linux/mtd/spi-nor.h | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 3301c4c289d6..f17fa75809aa 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h | |||
| @@ -227,6 +227,7 @@ struct mtd_info { | |||
| 227 | int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs); | 227 | int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs); |
| 228 | int (*_suspend) (struct mtd_info *mtd); | 228 | int (*_suspend) (struct mtd_info *mtd); |
| 229 | void (*_resume) (struct mtd_info *mtd); | 229 | void (*_resume) (struct mtd_info *mtd); |
| 230 | void (*_reboot) (struct mtd_info *mtd); | ||
| 230 | /* | 231 | /* |
| 231 | * If the driver is something smart, like UBI, it may need to maintain | 232 | * If the driver is something smart, like UBI, it may need to maintain |
| 232 | * its own reference counting. The below functions are only for driver. | 233 | * its own reference counting. The below functions are only for driver. |
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 63aeccf9ddc8..4720b86ee73d 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h | |||
| @@ -56,6 +56,10 @@ | |||
| 56 | /* Used for Spansion flashes only. */ | 56 | /* Used for Spansion flashes only. */ |
| 57 | #define SPINOR_OP_BRWR 0x17 /* Bank register write */ | 57 | #define SPINOR_OP_BRWR 0x17 /* Bank register write */ |
| 58 | 58 | ||
| 59 | /* Used for Micron flashes only. */ | ||
| 60 | #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ | ||
| 61 | #define SPINOR_OP_WD_EVCR 0x61 /* Write EVCR register */ | ||
| 62 | |||
| 59 | /* Status Register bits. */ | 63 | /* Status Register bits. */ |
| 60 | #define SR_WIP 1 /* Write in progress */ | 64 | #define SR_WIP 1 /* Write in progress */ |
| 61 | #define SR_WEL 2 /* Write enable latch */ | 65 | #define SR_WEL 2 /* Write enable latch */ |
| @@ -67,6 +71,9 @@ | |||
| 67 | 71 | ||
| 68 | #define SR_QUAD_EN_MX 0x40 /* Macronix Quad I/O */ | 72 | #define SR_QUAD_EN_MX 0x40 /* Macronix Quad I/O */ |
| 69 | 73 | ||
| 74 | /* Enhanced Volatile Configuration Register bits */ | ||
| 75 | #define EVCR_QUAD_EN_MICRON 0x80 /* Micron Quad I/O */ | ||
| 76 | |||
| 70 | /* Flag Status Register bits */ | 77 | /* Flag Status Register bits */ |
| 71 | #define FSR_READY 0x80 | 78 | #define FSR_READY 0x80 |
| 72 | 79 | ||
