diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-09-04 05:21:24 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-09-04 05:52:53 -0400 |
commit | 47734f89be0614b5acbd6a532390f9c72f019648 (patch) | |
tree | 48c7a765e90927ffed0158518157650c9b09dda8 /include/linux/topology.h | |
parent | d7ea17a76916e456fcc78e45142c66f7fb875e3d (diff) |
sched: Clean up topology.h
Re-organize the flag settings so that it's visible at a glance
which sched-domains flags are set and which not.
With the new balancer code we'll need to re-tune these details
anyway, so make it cleaner to make fewer mistakes down the
road ;-)
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Gautham R Shenoy <ego@in.ibm.com>
Cc: Balbir Singh <balbir@in.ibm.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/topology.h')
-rw-r--r-- | include/linux/topology.h | 169 |
1 files changed, 101 insertions, 68 deletions
diff --git a/include/linux/topology.h b/include/linux/topology.h index 6203ae5067ce..fe2c0329f82f 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h | |||
@@ -85,21 +85,29 @@ int arch_update_cpu_topology(void); | |||
85 | #define ARCH_HAS_SCHED_WAKE_IDLE | 85 | #define ARCH_HAS_SCHED_WAKE_IDLE |
86 | /* Common values for SMT siblings */ | 86 | /* Common values for SMT siblings */ |
87 | #ifndef SD_SIBLING_INIT | 87 | #ifndef SD_SIBLING_INIT |
88 | #define SD_SIBLING_INIT (struct sched_domain) { \ | 88 | #define SD_SIBLING_INIT (struct sched_domain) { \ |
89 | .min_interval = 1, \ | 89 | .min_interval = 1, \ |
90 | .max_interval = 2, \ | 90 | .max_interval = 2, \ |
91 | .busy_factor = 64, \ | 91 | .busy_factor = 64, \ |
92 | .imbalance_pct = 110, \ | 92 | .imbalance_pct = 110, \ |
93 | .flags = SD_LOAD_BALANCE \ | 93 | \ |
94 | | SD_BALANCE_NEWIDLE \ | 94 | .flags = 1*SD_LOAD_BALANCE \ |
95 | | SD_BALANCE_FORK \ | 95 | | 1*SD_BALANCE_NEWIDLE \ |
96 | | SD_BALANCE_EXEC \ | 96 | | 1*SD_BALANCE_EXEC \ |
97 | | SD_WAKE_AFFINE \ | 97 | | 1*SD_BALANCE_FORK \ |
98 | | SD_WAKE_BALANCE \ | 98 | | 0*SD_WAKE_IDLE \ |
99 | | SD_SHARE_CPUPOWER, \ | 99 | | 1*SD_WAKE_AFFINE \ |
100 | .last_balance = jiffies, \ | 100 | | 1*SD_WAKE_BALANCE \ |
101 | .balance_interval = 1, \ | 101 | | 1*SD_SHARE_CPUPOWER \ |
102 | .smt_gain = 1178, /* 15% */ \ | 102 | | 0*SD_POWERSAVINGS_BALANCE \ |
103 | | 0*SD_SHARE_PKG_RESOURCES \ | ||
104 | | 0*SD_SERIALIZE \ | ||
105 | | 0*SD_WAKE_IDLE_FAR \ | ||
106 | | 0*SD_PREFER_SIBLING \ | ||
107 | , \ | ||
108 | .last_balance = jiffies, \ | ||
109 | .balance_interval = 1, \ | ||
110 | .smt_gain = 1178, /* 15% */ \ | ||
103 | } | 111 | } |
104 | #endif | 112 | #endif |
105 | #endif /* CONFIG_SCHED_SMT */ | 113 | #endif /* CONFIG_SCHED_SMT */ |
@@ -107,69 +115,94 @@ int arch_update_cpu_topology(void); | |||
107 | #ifdef CONFIG_SCHED_MC | 115 | #ifdef CONFIG_SCHED_MC |
108 | /* Common values for MC siblings. for now mostly derived from SD_CPU_INIT */ | 116 | /* Common values for MC siblings. for now mostly derived from SD_CPU_INIT */ |
109 | #ifndef SD_MC_INIT | 117 | #ifndef SD_MC_INIT |
110 | #define SD_MC_INIT (struct sched_domain) { \ | 118 | #define SD_MC_INIT (struct sched_domain) { \ |
111 | .min_interval = 1, \ | 119 | .min_interval = 1, \ |
112 | .max_interval = 4, \ | 120 | .max_interval = 4, \ |
113 | .busy_factor = 64, \ | 121 | .busy_factor = 64, \ |
114 | .imbalance_pct = 125, \ | 122 | .imbalance_pct = 125, \ |
115 | .cache_nice_tries = 1, \ | 123 | .cache_nice_tries = 1, \ |
116 | .busy_idx = 2, \ | 124 | .busy_idx = 2, \ |
117 | .wake_idx = 1, \ | 125 | .wake_idx = 1, \ |
118 | .forkexec_idx = 1, \ | 126 | .forkexec_idx = 1, \ |
119 | .flags = SD_LOAD_BALANCE \ | 127 | \ |
120 | | SD_BALANCE_FORK \ | 128 | .flags = 1*SD_LOAD_BALANCE \ |
121 | | SD_BALANCE_EXEC \ | 129 | | 0*SD_BALANCE_NEWIDLE \ |
122 | | SD_WAKE_AFFINE \ | 130 | | 1*SD_BALANCE_EXEC \ |
123 | | SD_WAKE_BALANCE \ | 131 | | 1*SD_BALANCE_FORK \ |
124 | | SD_SHARE_PKG_RESOURCES\ | 132 | | 0*SD_WAKE_IDLE \ |
125 | | sd_balance_for_mc_power()\ | 133 | | 1*SD_WAKE_AFFINE \ |
126 | | sd_power_saving_flags(),\ | 134 | | 1*SD_WAKE_BALANCE \ |
127 | .last_balance = jiffies, \ | 135 | | 0*SD_SHARE_CPUPOWER \ |
128 | .balance_interval = 1, \ | 136 | | 1*SD_SHARE_PKG_RESOURCES \ |
137 | | 0*SD_SERIALIZE \ | ||
138 | | 0*SD_WAKE_IDLE_FAR \ | ||
139 | | sd_balance_for_mc_power() \ | ||
140 | | sd_power_saving_flags() \ | ||
141 | , \ | ||
142 | .last_balance = jiffies, \ | ||
143 | .balance_interval = 1, \ | ||
129 | } | 144 | } |
130 | #endif | 145 | #endif |
131 | #endif /* CONFIG_SCHED_MC */ | 146 | #endif /* CONFIG_SCHED_MC */ |
132 | 147 | ||
133 | /* Common values for CPUs */ | 148 | /* Common values for CPUs */ |
134 | #ifndef SD_CPU_INIT | 149 | #ifndef SD_CPU_INIT |
135 | #define SD_CPU_INIT (struct sched_domain) { \ | 150 | #define SD_CPU_INIT (struct sched_domain) { \ |
136 | .min_interval = 1, \ | 151 | .min_interval = 1, \ |
137 | .max_interval = 4, \ | 152 | .max_interval = 4, \ |
138 | .busy_factor = 64, \ | 153 | .busy_factor = 64, \ |
139 | .imbalance_pct = 125, \ | 154 | .imbalance_pct = 125, \ |
140 | .cache_nice_tries = 1, \ | 155 | .cache_nice_tries = 1, \ |
141 | .busy_idx = 2, \ | 156 | .busy_idx = 2, \ |
142 | .idle_idx = 1, \ | 157 | .idle_idx = 1, \ |
143 | .newidle_idx = 2, \ | 158 | .newidle_idx = 2, \ |
144 | .wake_idx = 1, \ | 159 | .wake_idx = 1, \ |
145 | .forkexec_idx = 1, \ | 160 | .forkexec_idx = 1, \ |
146 | .flags = SD_LOAD_BALANCE \ | 161 | \ |
147 | | SD_BALANCE_EXEC \ | 162 | .flags = 1*SD_LOAD_BALANCE \ |
148 | | SD_BALANCE_FORK \ | 163 | | 0*SD_BALANCE_NEWIDLE \ |
149 | | SD_WAKE_AFFINE \ | 164 | | 1*SD_BALANCE_EXEC \ |
150 | | SD_WAKE_BALANCE \ | 165 | | 1*SD_BALANCE_FORK \ |
151 | | sd_balance_for_package_power()\ | 166 | | 0*SD_WAKE_IDLE \ |
152 | | sd_power_saving_flags(),\ | 167 | | 0*SD_WAKE_AFFINE \ |
153 | .last_balance = jiffies, \ | 168 | | 1*SD_WAKE_BALANCE \ |
154 | .balance_interval = 1, \ | 169 | | 0*SD_SHARE_CPUPOWER \ |
170 | | 0*SD_SHARE_PKG_RESOURCES \ | ||
171 | | 0*SD_SERIALIZE \ | ||
172 | | 0*SD_WAKE_IDLE_FAR \ | ||
173 | | sd_balance_for_package_power() \ | ||
174 | | sd_power_saving_flags() \ | ||
175 | , \ | ||
176 | .last_balance = jiffies, \ | ||
177 | .balance_interval = 1, \ | ||
155 | } | 178 | } |
156 | #endif | 179 | #endif |
157 | 180 | ||
158 | /* sched_domains SD_ALLNODES_INIT for NUMA machines */ | 181 | /* sched_domains SD_ALLNODES_INIT for NUMA machines */ |
159 | #define SD_ALLNODES_INIT (struct sched_domain) { \ | 182 | #define SD_ALLNODES_INIT (struct sched_domain) { \ |
160 | .min_interval = 64, \ | 183 | .min_interval = 64, \ |
161 | .max_interval = 64*num_online_cpus(), \ | 184 | .max_interval = 64*num_online_cpus(), \ |
162 | .busy_factor = 128, \ | 185 | .busy_factor = 128, \ |
163 | .imbalance_pct = 133, \ | 186 | .imbalance_pct = 133, \ |
164 | .cache_nice_tries = 1, \ | 187 | .cache_nice_tries = 1, \ |
165 | .busy_idx = 3, \ | 188 | .busy_idx = 3, \ |
166 | .idle_idx = 3, \ | 189 | .idle_idx = 3, \ |
167 | .flags = SD_LOAD_BALANCE \ | 190 | .flags = 1*SD_LOAD_BALANCE \ |
168 | | SD_BALANCE_NEWIDLE \ | 191 | | 1*SD_BALANCE_NEWIDLE \ |
169 | | SD_WAKE_AFFINE \ | 192 | | 0*SD_BALANCE_EXEC \ |
170 | | SD_SERIALIZE, \ | 193 | | 0*SD_BALANCE_FORK \ |
171 | .last_balance = jiffies, \ | 194 | | 0*SD_WAKE_IDLE \ |
172 | .balance_interval = 64, \ | 195 | | 1*SD_WAKE_AFFINE \ |
196 | | 0*SD_WAKE_BALANCE \ | ||
197 | | 0*SD_SHARE_CPUPOWER \ | ||
198 | | 0*SD_POWERSAVINGS_BALANCE \ | ||
199 | | 0*SD_SHARE_PKG_RESOURCES \ | ||
200 | | 1*SD_SERIALIZE \ | ||
201 | | 0*SD_WAKE_IDLE_FAR \ | ||
202 | | 0*SD_PREFER_SIBLING \ | ||
203 | , \ | ||
204 | .last_balance = jiffies, \ | ||
205 | .balance_interval = 64, \ | ||
173 | } | 206 | } |
174 | 207 | ||
175 | #ifdef CONFIG_NUMA | 208 | #ifdef CONFIG_NUMA |