diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-03 06:29:43 -0400 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-03 06:29:43 -0400 |
commit | f94f3cb37a1c4d44dd2070cc4a6165689bda9c92 (patch) | |
tree | 21bbdeacbc1b9895cf917231d1675eaaa63b9229 /include/linux/ssb/ssb_regs.h | |
parent | e27808df97ff7b43b4927aadf410705f33313523 (diff) | |
parent | 1b4610ebf37a05a65e9f29cdf4d87c207573104d (diff) |
Merge branch 'for-2.6.39' into for-2.6.40
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 489f7b6d61c5..402955ae48ce 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -85,6 +85,8 @@ | |||
85 | #define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */ | 85 | #define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */ |
86 | #define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */ | 86 | #define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */ |
87 | #define SSB_IMSTATE_TO 0x00040000 /* Timeout */ | 87 | #define SSB_IMSTATE_TO 0x00040000 /* Timeout */ |
88 | #define SSB_IMSTATE_BUSY 0x01800000 /* Busy (Backplane rev >= 2.3 only) */ | ||
89 | #define SSB_IMSTATE_REJECT 0x02000000 /* Reject (Backplane rev >= 2.3 only) */ | ||
88 | #define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */ | 90 | #define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */ |
89 | #define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */ | 91 | #define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */ |
90 | #define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */ | 92 | #define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */ |
@@ -97,7 +99,6 @@ | |||
97 | #define SSB_TMSLOW_RESET 0x00000001 /* Reset */ | 99 | #define SSB_TMSLOW_RESET 0x00000001 /* Reset */ |
98 | #define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */ | 100 | #define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */ |
99 | #define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ | 101 | #define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ |
100 | #define SSB_TMSLOW_PHYCLK 0x00000010 /* MAC PHY Clock Control Enable */ | ||
101 | #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ | 102 | #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ |
102 | #define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ | 103 | #define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ |
103 | #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */ | 104 | #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */ |
@@ -268,6 +269,8 @@ | |||
268 | /* SPROM Revision 4 */ | 269 | /* SPROM Revision 4 */ |
269 | #define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */ | 270 | #define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */ |
270 | #define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */ | 271 | #define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */ |
272 | #define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */ | ||
273 | #define SSB_SPROM4_BFL2HI 0x004A /* Board flags 2 Hi */ | ||
271 | #define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */ | 274 | #define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */ |
272 | #define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */ | 275 | #define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */ |
273 | #define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */ | 276 | #define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */ |
@@ -358,6 +361,8 @@ | |||
358 | #define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */ | 361 | #define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */ |
359 | #define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */ | 362 | #define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */ |
360 | #define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */ | 363 | #define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */ |
364 | #define SSB_SPROM5_BFL2LO 0x004E /* Board flags 2 (low 16 bits) */ | ||
365 | #define SSB_SPROM5_BFL2HI 0x0050 /* Board flags 2 Hi */ | ||
361 | #define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */ | 366 | #define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */ |
362 | #define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */ | 367 | #define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */ |
363 | #define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */ | 368 | #define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */ |