Merge tag 'v3.9-rc3' into drm-intel-next-queued

Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in

commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <imre.deak@intel.com>
Date:   Wed Feb 27 17:02:56 2013 -0800

    lib/scatterlist: add simple page iterator

The merge itself is just two trivial conflicts:

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

3 files changed, 61 insertions, 100 deletions

diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h
index c73d1445c77e..82d5111cd0c2 100644
--- a/include/linux/spi/pxa2xx_spi.h
+++ b/include/linux/spi/pxa2xx_spi.h
@@ -28,6 +28,15 @@ struct pxa2xx_spi_master {
         u32 clock_enable;
         u16 num_chipselect;
         u8 enable_dma;
+
+        /* DMA engine specific config */
+        int rx_chan_id;
+        int tx_chan_id;
+        int rx_slave_id;
+        int tx_slave_id;
+
+        /* For non-PXA arches */
+        struct ssp_device ssp;
 };
 
 /* spi_board_info.controller_data for SPI slave devices,
@@ -35,6 +44,7 @@ struct pxa2xx_spi_master {
  */
 struct pxa2xx_spi_chip {
         u8 tx_threshold;
+        u8 tx_hi_threshold;
         u8 rx_threshold;
         u8 dma_burst_size;
         u32 timeout;
@@ -50,103 +60,5 @@ struct pxa2xx_spi_chip {
 
 extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
 
-#else
-/*
- * This is the implemtation for CE4100 on x86. ARM defines them in mach/ or
- * plat/ include path.
- * The CE4100 does not provide DMA support. This bits are here to let the driver
- * compile and will never be used. Maybe we get DMA support at a later point in
- * time.
- */
-
-#define DCSR(n)         (n)
-#define DSADR(n)        (n)
-#define DTADR(n)        (n)
-#define DCMD(n)         (n)
-#define DRCMR(n)        (n)
-
-#define DCSR_RUN        (1 << 31)       /* Run Bit */
-#define DCSR_NODESC     (1 << 30)       /* No-Descriptor Fetch */
-#define DCSR_STOPIRQEN  (1 << 29)       /* Stop Interrupt Enable */
-#define DCSR_REQPEND    (1 << 8)        /* Request Pending (read-only) */
-#define DCSR_STOPSTATE  (1 << 3)        /* Stop State (read-only) */
-#define DCSR_ENDINTR    (1 << 2)        /* End Interrupt */
-#define DCSR_STARTINTR  (1 << 1)        /* Start Interrupt */
-#define DCSR_BUSERR     (1 << 0)        /* Bus Error Interrupt */
-
-#define DCSR_EORIRQEN   (1 << 28)       /* End of Receive Interrupt Enable */
-#define DCSR_EORJMPEN   (1 << 27)       /* Jump to next descriptor on EOR */
-#define DCSR_EORSTOPEN  (1 << 26)       /* STOP on an EOR */
-#define DCSR_SETCMPST   (1 << 25)       /* Set Descriptor Compare Status */
-#define DCSR_CLRCMPST   (1 << 24)       /* Clear Descriptor Compare Status */
-#define DCSR_CMPST      (1 << 10)       /* The Descriptor Compare Status */
-#define DCSR_EORINTR    (1 << 9)        /* The end of Receive */
-
-#define DRCMR_MAPVLD    (1 << 7)        /* Map Valid */
-#define DRCMR_CHLNUM    0x1f            /* mask for Channel Number */
-
-#define DDADR_DESCADDR  0xfffffff0      /* Address of next descriptor */
-#define DDADR_STOP      (1 << 0)        /* Stop */
-
-#define DCMD_INCSRCADDR (1 << 31)       /* Source Address Increment Setting. */
-#define DCMD_INCTRGADDR (1 << 30)       /* Target Address Increment Setting. */
-#define DCMD_FLOWSRC    (1 << 29)       /* Flow Control by the source. */
-#define DCMD_FLOWTRG    (1 << 28)       /* Flow Control by the target. */
-#define DCMD_STARTIRQEN (1 << 22)       /* Start Interrupt Enable */
-#define DCMD_ENDIRQEN   (1 << 21)       /* End Interrupt Enable */
-#define DCMD_ENDIAN     (1 << 18)       /* Device Endian-ness. */
-#define DCMD_BURST8     (1 << 16)       /* 8 byte burst */
-#define DCMD_BURST16    (2 << 16)       /* 16 byte burst */
-#define DCMD_BURST32    (3 << 16)       /* 32 byte burst */
-#define DCMD_WIDTH1     (1 << 14)       /* 1 byte width */
-#define DCMD_WIDTH2     (2 << 14)       /* 2 byte width (HalfWord) */
-#define DCMD_WIDTH4     (3 << 14)       /* 4 byte width (Word) */
-#define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
-
-/*
- * Descriptor structure for PXA's DMA engine
- * Note: this structure must always be aligned to a 16-byte boundary.
- */
-
-typedef enum {
-        DMA_PRIO_HIGH = 0,
-        DMA_PRIO_MEDIUM = 1,
-        DMA_PRIO_LOW = 2
-} pxa_dma_prio;
-
-/*
- * DMA registration
- */
-
-static inline int pxa_request_dma(char *name,
-                pxa_dma_prio prio,
-                void (*irq_handler)(int, void *),
-                void *data)
-{
-        return -ENODEV;
-}
-
-static inline void pxa_free_dma(int dma_ch)
-{
-}
-
-/*
- * The CE4100 does not have the clk framework implemented and SPI clock can
- * not be switched on/off or the divider changed.
- */
-static inline void clk_disable(struct clk *clk)
-{
-}
-
-static inline int clk_enable(struct clk *clk)
-{
-        return 0;
-}
-
-static inline unsigned long clk_get_rate(struct clk *clk)
-{
-        return 3686400;
-}
-
 #endif
 #endif
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index f62918946d86..38c2b925923d 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -57,6 +57,8 @@ extern struct bus_type spi_bus_type;
  * @modalias: Name of the driver to use with this device, or an alias
  *      for that name.  This appears in the sysfs "modalias" attribute
  *      for driver coldplugging, and in uevents used for hotplugging
+ * @cs_gpio: gpio number of the chipselect line (optional, -EINVAL when
+ *      when not using a GPIO line)
  *
  * A @spi_device is used to interchange data between an SPI slave
  * (usually a discrete chip) and CPU memory.
@@ -258,6 +260,9 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
  * @unprepare_transfer_hardware: there are currently no more messages on the
  *      queue so the subsystem notifies the driver that it may relax the
  *      hardware by issuing this call
+ * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
+ *      number. Any individual value may be -EINVAL for CS lines that
+ *      are not GPIOs (driven by the SPI controller itself).
  *
  * Each SPI master controller can communicate with one or more @spi_device
  * children.  These make a small bus, sharing MOSI, MISO and SCK signals
@@ -591,6 +596,26 @@ spi_transfer_del(struct spi_transfer *t)
         list_del(&t->transfer_list);
 }
 
+/**
+ * spi_message_init_with_transfers - Initialize spi_message and append transfers
+ * @m: spi_message to be initialized
+ * @xfers: An array of spi transfers
+ * @num_xfers: Number of items in the xfer array
+ *
+ * This function initializes the given spi_message and adds each spi_transfer in
+ * the given array to the message.
+ */
+static inline void
+spi_message_init_with_transfers(struct spi_message *m,
+struct spi_transfer *xfers, unsigned int num_xfers)
+{
+        unsigned int i;
+
+        spi_message_init(m);
+        for (i = 0; i < num_xfers; ++i)
+                spi_message_add_tail(&xfers[i], m);
+}
+
 /* It's fine to embed message and transaction structures in other data
  * structures so long as you don't free them while they're in use.
  */
@@ -683,6 +708,30 @@ spi_read(struct spi_device *spi, void *buf, size_t len)
         return spi_sync(spi, &m);
 }
 
+/**
+ * spi_sync_transfer - synchronous SPI data transfer
+ * @spi: device with which data will be exchanged
+ * @xfers: An array of spi_transfers
+ * @num_xfers: Number of items in the xfer array
+ * Context: can sleep
+ *
+ * Does a synchronous SPI data transfer of the given spi_transfer array.
+ *
+ * For more specific semantics see spi_sync().
+ *
+ * It returns zero on success, else a negative error code.
+ */
+static inline int
+spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
+        unsigned int num_xfers)
+{
+        struct spi_message msg;
+
+        spi_message_init_with_transfers(&msg, xfers, num_xfers);
+
+        return spi_sync(spi, &msg);
+}
+
 /* this copies txbuf and rxbuf data; for small transfers only! */
 extern int spi_write_then_read(struct spi_device *spi,
                 const void *txbuf, unsigned n_tx,
diff --git a/include/linux/spi/spi_gpio.h b/include/linux/spi/spi_gpio.h
index 369b3d7d5b95..1634ce31c06d 100644
--- a/include/linux/spi/spi_gpio.h
+++ b/include/linux/spi/spi_gpio.h
@@ -62,8 +62,8 @@
  */
 struct spi_gpio_platform_data {
         unsigned        sck;
-        unsigned        mosi;
-        unsigned        miso;
+        unsigned long   mosi;
+        unsigned long   miso;
 
         u16             num_chipselect;
 };