Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

11 files changed, 262 insertions, 265 deletions

diff --git a/include/linux/spi/74x164.h b/include/linux/spi/74x164.h
new file mode 100644
index 000000000000..d85c52f294a0
--- /dev/null
+++ b/include/linux/spi/74x164.h
@@ -0,0 +1,11 @@
+#ifndef LINUX_SPI_74X164_H
+#define LINUX_SPI_74X164_H
+
+#define GEN_74X164_DRIVER_NAME "74x164"
+
+struct gen_74x164_chip_platform_data {
+        /* number assigned to the first GPIO */
+        unsigned        base;
+};
+
+#endif
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 92bd0839d5b4..c64de9dd7631 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -14,7 +14,8 @@ enum ads7846_filter {
 struct ads7846_platform_data {
         u16     model;                  /* 7843, 7845, 7846, 7873. */
         u16     vref_delay_usecs;       /* 0 for external vref; etc */
-        u16     vref_mv;                /* external vref value, milliVolts */
+        u16     vref_mv;                /* external vref value, milliVolts
+                                         * ads7846: if 0, use internal vref */
         bool    keep_vref_on;           /* set to keep vref on for differential
                                          * measurements as well */
         bool    swap_xy;                /* swap x and y axes */
diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
deleted file mode 100644
index c91302f3a257..000000000000
--- a/include/linux/spi/dw_spi.h
+++ /dev/null
@@ -1,219 +0,0 @@
-#ifndef DW_SPI_HEADER_H
-#define DW_SPI_HEADER_H
-#include <linux/io.h>
-
-/* Bit fields in CTRLR0 */
-#define SPI_DFS_OFFSET                  0
-
-#define SPI_FRF_OFFSET                  4
-#define SPI_FRF_SPI                     0x0
-#define SPI_FRF_SSP                     0x1
-#define SPI_FRF_MICROWIRE               0x2
-#define SPI_FRF_RESV                    0x3
-
-#define SPI_MODE_OFFSET                 6
-#define SPI_SCPH_OFFSET                 6
-#define SPI_SCOL_OFFSET                 7
-
-#define SPI_TMOD_OFFSET                 8
-#define SPI_TMOD_MASK                   (0x3 << SPI_TMOD_OFFSET)
-#define SPI_TMOD_TR                     0x0             /* xmit & recv */
-#define SPI_TMOD_TO                     0x1             /* xmit only */
-#define SPI_TMOD_RO                     0x2             /* recv only */
-#define SPI_TMOD_EPROMREAD              0x3             /* eeprom read mode */
-
-#define SPI_SLVOE_OFFSET                10
-#define SPI_SRL_OFFSET                  11
-#define SPI_CFS_OFFSET                  12
-
-/* Bit fields in SR, 7 bits */
-#define SR_MASK                         0x7f            /* cover 7 bits */
-#define SR_BUSY                         (1 << 0)
-#define SR_TF_NOT_FULL                  (1 << 1)
-#define SR_TF_EMPT                      (1 << 2)
-#define SR_RF_NOT_EMPT                  (1 << 3)
-#define SR_RF_FULL                      (1 << 4)
-#define SR_TX_ERR                       (1 << 5)
-#define SR_DCOL                         (1 << 6)
-
-/* Bit fields in ISR, IMR, RISR, 7 bits */
-#define SPI_INT_TXEI                    (1 << 0)
-#define SPI_INT_TXOI                    (1 << 1)
-#define SPI_INT_RXUI                    (1 << 2)
-#define SPI_INT_RXOI                    (1 << 3)
-#define SPI_INT_RXFI                    (1 << 4)
-#define SPI_INT_MSTI                    (1 << 5)
-
-/* TX RX interrupt level threshhold, max can be 256 */
-#define SPI_INT_THRESHOLD               32
-
-enum dw_ssi_type {
-        SSI_MOTO_SPI = 0,
-        SSI_TI_SSP,
-        SSI_NS_MICROWIRE,
-};
-
-struct dw_spi_reg {
-        u32     ctrl0;
-        u32     ctrl1;
-        u32     ssienr;
-        u32     mwcr;
-        u32     ser;
-        u32     baudr;
-        u32     txfltr;
-        u32     rxfltr;
-        u32     txflr;
-        u32     rxflr;
-        u32     sr;
-        u32     imr;
-        u32     isr;
-        u32     risr;
-        u32     txoicr;
-        u32     rxoicr;
-        u32     rxuicr;
-        u32     msticr;
-        u32     icr;
-        u32     dmacr;
-        u32     dmatdlr;
-        u32     dmardlr;
-        u32     idr;
-        u32     version;
-        u32     dr;             /* Currently oper as 32 bits,
-                                though only low 16 bits matters */
-} __packed;
-
-struct dw_spi {
-        struct spi_master       *master;
-        struct spi_device       *cur_dev;
-        struct device           *parent_dev;
-        enum dw_ssi_type        type;
-
-        void __iomem            *regs;
-        unsigned long           paddr;
-        u32                     iolen;
-        int                     irq;
-        u32                     fifo_len;       /* depth of the FIFO buffer */
-        u32                     max_freq;       /* max bus freq supported */
-
-        u16                     bus_num;
-        u16                     num_cs;         /* supported slave numbers */
-
-        /* Driver message queue */
-        struct workqueue_struct *workqueue;
-        struct work_struct      pump_messages;
-        spinlock_t              lock;
-        struct list_head        queue;
-        int                     busy;
-        int                     run;
-
-        /* Message Transfer pump */
-        struct tasklet_struct   pump_transfers;
-
-        /* Current message transfer state info */
-        struct spi_message      *cur_msg;
-        struct spi_transfer     *cur_transfer;
-        struct chip_data        *cur_chip;
-        struct chip_data        *prev_chip;
-        size_t                  len;
-        void                    *tx;
-        void                    *tx_end;
-        void                    *rx;
-        void                    *rx_end;
-        int                     dma_mapped;
-        dma_addr_t              rx_dma;
-        dma_addr_t              tx_dma;
-        size_t                  rx_map_len;
-        size_t                  tx_map_len;
-        u8                      n_bytes;        /* current is a 1/2 bytes op */
-        u8                      max_bits_per_word;      /* maxim is 16b */
-        u32                     dma_width;
-        int                     cs_change;
-        int                     (*write)(struct dw_spi *dws);
-        int                     (*read)(struct dw_spi *dws);
-        irqreturn_t             (*transfer_handler)(struct dw_spi *dws);
-        void                    (*cs_control)(u32 command);
-
-        /* Dma info */
-        int                     dma_inited;
-        struct dma_chan         *txchan;
-        struct dma_chan         *rxchan;
-        int                     txdma_done;
-        int                     rxdma_done;
-        u64                     tx_param;
-        u64                     rx_param;
-        struct device           *dma_dev;
-        dma_addr_t              dma_addr;
-
-        /* Bus interface info */
-        void                    *priv;
-#ifdef CONFIG_DEBUG_FS
-        struct dentry *debugfs;
-#endif
-};
-
-#define dw_readl(dw, name) \
-        __raw_readl(&(((struct dw_spi_reg *)dw->regs)->name))
-#define dw_writel(dw, name, val) \
-        __raw_writel((val), &(((struct dw_spi_reg *)dw->regs)->name))
-#define dw_readw(dw, name) \
-        __raw_readw(&(((struct dw_spi_reg *)dw->regs)->name))
-#define dw_writew(dw, name, val) \
-        __raw_writew((val), &(((struct dw_spi_reg *)dw->regs)->name))
-
-static inline void spi_enable_chip(struct dw_spi *dws, int enable)
-{
-        dw_writel(dws, ssienr, (enable ? 1 : 0));
-}
-
-static inline void spi_set_clk(struct dw_spi *dws, u16 div)
-{
-        dw_writel(dws, baudr, div);
-}
-
-static inline void spi_chip_sel(struct dw_spi *dws, u16 cs)
-{
-        if (cs > dws->num_cs)
-                return;
-
-        if (dws->cs_control)
-                dws->cs_control(1);
-
-        dw_writel(dws, ser, 1 << cs);
-}
-
-/* Disable IRQ bits */
-static inline void spi_mask_intr(struct dw_spi *dws, u32 mask)
-{
-        u32 new_mask;
-
-        new_mask = dw_readl(dws, imr) & ~mask;
-        dw_writel(dws, imr, new_mask);
-}
-
-/* Enable IRQ bits */
-static inline void spi_umask_intr(struct dw_spi *dws, u32 mask)
-{
-        u32 new_mask;
-
-        new_mask = dw_readl(dws, imr) | mask;
-        dw_writel(dws, imr, new_mask);
-}
-
-/*
- * Each SPI slave device to work with dw_api controller should
- * has such a structure claiming its working mode (PIO/DMA etc),
- * which can be save in the "controller_data" member of the
- * struct spi_device
- */
-struct dw_spi_chip {
-        u8 poll_mode;   /* 0 for contoller polling mode */
-        u8 type;        /* SPI/SSP/Micrwire */
-        u8 enable_dma;
-        void (*cs_control)(u32 command);
-};
-
-extern int dw_spi_add_host(struct dw_spi *dws);
-extern void dw_spi_remove_host(struct dw_spi *dws);
-extern int dw_spi_suspend_host(struct dw_spi *dws);
-extern int dw_spi_resume_host(struct dw_spi *dws);
-#endif /* DW_SPI_HEADER_H */
diff --git a/include/linux/spi/ifx_modem.h b/include/linux/spi/ifx_modem.h
new file mode 100644
index 000000000000..394fec9e7722
--- /dev/null
+++ b/include/linux/spi/ifx_modem.h
@@ -0,0 +1,19 @@
+#ifndef LINUX_IFX_MODEM_H
+#define LINUX_IFX_MODEM_H
+
+struct ifx_modem_platform_data {
+        unsigned short rst_out;         /* modem reset out */
+        unsigned short pwr_on;          /* power on */
+        unsigned short rst_pmu;         /* reset modem */
+        unsigned short tx_pwr;          /* modem power threshold */
+        unsigned short srdy;            /* SRDY */
+        unsigned short mrdy;            /* MRDY */
+        unsigned char modem_type;       /* Modem type */
+        unsigned long max_hz;           /* max SPI frequency */
+        unsigned short use_dma:1;       /* spi protocol driver supplies
+                                           dma-able addrs */
+};
+#define IFX_MODEM_6160  1
+#define IFX_MODEM_6260  2
+
+#endif
diff --git a/include/linux/spi/mcp23s08.h b/include/linux/spi/mcp23s08.h
index 22ef107d7704..c42cff8ca191 100644
--- a/include/linux/spi/mcp23s08.h
+++ b/include/linux/spi/mcp23s08.h
@@ -2,21 +2,24 @@
 /* FIXME driver should be able to handle IRQs...  */
 
 struct mcp23s08_chip_info {
-        bool    is_present;             /* true iff populated */
-        u8      pullups;                /* BIT(x) means enable pullup x */
+        bool            is_present;     /* true if populated */
+        unsigned        pullups;        /* BIT(x) means enable pullup x */
 };
 
 struct mcp23s08_platform_data {
-        /* Four slaves (numbered 0..3) can share one SPI chipselect, and
-         * will provide 8..32 GPIOs using 1..4 gpio_chip instances.
+        /* For mcp23s08, up to 4 slaves (numbered 0..3) can share one SPI
+         * chipselect, each providing 1 gpio_chip instance with 8 gpios.
+         * For mpc23s17, up to 8 slaves (numbered 0..7) can share one SPI
+         * chipselect, each providing 1 gpio_chip (port A + port B) with
+         * 16 gpios.
          */
-        struct mcp23s08_chip_info       chip[4];
+        struct mcp23s08_chip_info       chip[8];
 
         /* "base" is the number of the first GPIO.  Dynamic assignment is
          * not currently supported, and even if there are gaps in chip
          * addressing the GPIO numbers are sequential .. so for example
          * if only slaves 0 and 3 are present, their GPIOs range from
-         * base to base+15.
+         * base to base+15 (or base+31 for s17 variant).
          */
         unsigned        base;
 
diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h
new file mode 100644
index 000000000000..d3e1075f7b60
--- /dev/null
+++ b/include/linux/spi/pxa2xx_spi.h
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __linux_pxa2xx_spi_h
+#define __linux_pxa2xx_spi_h
+
+#include <linux/pxa2xx_ssp.h>
+
+#define PXA2XX_CS_ASSERT (0x01)
+#define PXA2XX_CS_DEASSERT (0x02)
+
+/* device.platform_data for SSP controller devices */
+struct pxa2xx_spi_master {
+        u32 clock_enable;
+        u16 num_chipselect;
+        u8 enable_dma;
+};
+
+/* spi_board_info.controller_data for SPI slave devices,
+ * copied to spi_device.platform_data ... mostly for dma tuning
+ */
+struct pxa2xx_spi_chip {
+        u8 tx_threshold;
+        u8 rx_threshold;
+        u8 dma_burst_size;
+        u32 timeout;
+        u8 enable_loopback;
+        int gpio_cs;
+        void (*cs_control)(u32 command);
+};
+
+#ifdef CONFIG_ARCH_PXA
+
+#include <linux/clk.h>
+#include <mach/dma.h>
+
+extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
+
+#else
+/*
+ * This is the implemtation for CE4100 on x86. ARM defines them in mach/ or
+ * plat/ include path.
+ * The CE4100 does not provide DMA support. This bits are here to let the driver
+ * compile and will never be used. Maybe we get DMA support at a later point in
+ * time.
+ */
+
+#define DCSR(n)         (n)
+#define DSADR(n)        (n)
+#define DTADR(n)        (n)
+#define DCMD(n)         (n)
+#define DRCMR(n)        (n)
+
+#define DCSR_RUN        (1 << 31)       /* Run Bit */
+#define DCSR_NODESC     (1 << 30)       /* No-Descriptor Fetch */
+#define DCSR_STOPIRQEN  (1 << 29)       /* Stop Interrupt Enable */
+#define DCSR_REQPEND    (1 << 8)        /* Request Pending (read-only) */
+#define DCSR_STOPSTATE  (1 << 3)        /* Stop State (read-only) */
+#define DCSR_ENDINTR    (1 << 2)        /* End Interrupt */
+#define DCSR_STARTINTR  (1 << 1)        /* Start Interrupt */
+#define DCSR_BUSERR     (1 << 0)        /* Bus Error Interrupt */
+
+#define DCSR_EORIRQEN   (1 << 28)       /* End of Receive Interrupt Enable */
+#define DCSR_EORJMPEN   (1 << 27)       /* Jump to next descriptor on EOR */
+#define DCSR_EORSTOPEN  (1 << 26)       /* STOP on an EOR */
+#define DCSR_SETCMPST   (1 << 25)       /* Set Descriptor Compare Status */
+#define DCSR_CLRCMPST   (1 << 24)       /* Clear Descriptor Compare Status */
+#define DCSR_CMPST      (1 << 10)       /* The Descriptor Compare Status */
+#define DCSR_EORINTR    (1 << 9)        /* The end of Receive */
+
+#define DRCMR_MAPVLD    (1 << 7)        /* Map Valid */
+#define DRCMR_CHLNUM    0x1f            /* mask for Channel Number */
+
+#define DDADR_DESCADDR  0xfffffff0      /* Address of next descriptor */
+#define DDADR_STOP      (1 << 0)        /* Stop */
+
+#define DCMD_INCSRCADDR (1 << 31)       /* Source Address Increment Setting. */
+#define DCMD_INCTRGADDR (1 << 30)       /* Target Address Increment Setting. */
+#define DCMD_FLOWSRC    (1 << 29)       /* Flow Control by the source. */
+#define DCMD_FLOWTRG    (1 << 28)       /* Flow Control by the target. */
+#define DCMD_STARTIRQEN (1 << 22)       /* Start Interrupt Enable */
+#define DCMD_ENDIRQEN   (1 << 21)       /* End Interrupt Enable */
+#define DCMD_ENDIAN     (1 << 18)       /* Device Endian-ness. */
+#define DCMD_BURST8     (1 << 16)       /* 8 byte burst */
+#define DCMD_BURST16    (2 << 16)       /* 16 byte burst */
+#define DCMD_BURST32    (3 << 16)       /* 32 byte burst */
+#define DCMD_WIDTH1     (1 << 14)       /* 1 byte width */
+#define DCMD_WIDTH2     (2 << 14)       /* 2 byte width (HalfWord) */
+#define DCMD_WIDTH4     (3 << 14)       /* 4 byte width (Word) */
+#define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
+
+/*
+ * Descriptor structure for PXA's DMA engine
+ * Note: this structure must always be aligned to a 16-byte boundary.
+ */
+
+typedef enum {
+        DMA_PRIO_HIGH = 0,
+        DMA_PRIO_MEDIUM = 1,
+        DMA_PRIO_LOW = 2
+} pxa_dma_prio;
+
+/*
+ * DMA registration
+ */
+
+static inline int pxa_request_dma(char *name,
+                pxa_dma_prio prio,
+                void (*irq_handler)(int, void *),
+                void *data)
+{
+        return -ENODEV;
+}
+
+static inline void pxa_free_dma(int dma_ch)
+{
+}
+
+/*
+ * The CE4100 does not have the clk framework implemented and SPI clock can
+ * not be switched on/off or the divider changed.
+ */
+static inline void clk_disable(struct clk *clk)
+{
+}
+
+static inline int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+
+static inline unsigned long clk_get_rate(struct clk *clk)
+{
+        return 3686400;
+}
+
+#endif
+#endif
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 92e52a1e6af3..bb4f5fbbbd8e 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -204,6 +204,7 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
 /**
  * struct spi_master - interface to SPI master controller
  * @dev: device interface to this driver
+ * @list: link with the global spi_master list
  * @bus_num: board-specific (and often SOC-specific) identifier for a
  *      given SPI controller.
  * @num_chipselect: chipselects are used to distinguish individual
@@ -238,6 +239,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
 struct spi_master {
         struct device   dev;
 
+        struct list_head list;
+
         /* other than negative (== assign one dynamically), bus_num is fully
          * board-specific.  usually that simplifies to being SOC-specific.
          * example:  one SOC has three SPI controllers, numbered 0..2,
@@ -578,7 +581,7 @@ extern int spi_bus_unlock(struct spi_master *master);
  * Callable only from contexts that can sleep.
  */
 static inline int
-spi_write(struct spi_device *spi, const u8 *buf, size_t len)
+spi_write(struct spi_device *spi, const void *buf, size_t len)
 {
         struct spi_transfer     t = {
                         .tx_buf         = buf,
@@ -602,7 +605,7 @@ spi_write(struct spi_device *spi, const u8 *buf, size_t len)
  * Callable only from contexts that can sleep.
  */
 static inline int
-spi_read(struct spi_device *spi, u8 *buf, size_t len)
+spi_read(struct spi_device *spi, void *buf, size_t len)
 {
         struct spi_transfer     t = {
                         .rx_buf         = buf,
@@ -617,8 +620,8 @@ spi_read(struct spi_device *spi, u8 *buf, size_t len)
 
 /* this copies txbuf and rxbuf data; for small transfers only! */
 extern int spi_write_then_read(struct spi_device *spi,
-                const u8 *txbuf, unsigned n_tx,
-                u8 *rxbuf, unsigned n_rx);
+                const void *txbuf, unsigned n_tx,
+                void *rxbuf, unsigned n_rx);
 
 /**
  * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
diff --git a/include/linux/spi/spi_oc_tiny.h b/include/linux/spi/spi_oc_tiny.h
new file mode 100644
index 000000000000..1ac529cf4f06
--- /dev/null
+++ b/include/linux/spi/spi_oc_tiny.h
@@ -0,0 +1,20 @@
+#ifndef _LINUX_SPI_SPI_OC_TINY_H
+#define _LINUX_SPI_SPI_OC_TINY_H
+
+/**
+ * struct tiny_spi_platform_data - platform data of the OpenCores tiny SPI
+ * @freq:       input clock freq to the core.
+ * @baudwidth:  baud rate divider width of the core.
+ * @gpio_cs_count:      number of gpio pins used for chipselect.
+ * @gpio_cs:    array of gpio pins used for chipselect.
+ *
+ * freq and baudwidth are used only if the divider is programmable.
+ */
+struct tiny_spi_platform_data {
+        unsigned int freq;
+        unsigned int baudwidth;
+        unsigned int gpio_cs_count;
+        int *gpio_cs;
+};
+
+#endif /* _LINUX_SPI_SPI_OC_TINY_H */
diff --git a/include/linux/spi/spidev.h b/include/linux/spi/spidev.h
index bf0570a84f7a..52d9ed01855f 100644
--- a/include/linux/spi/spidev.h
+++ b/include/linux/spi/spidev.h
@@ -66,7 +66,7 @@
  * are in a different address space (and may be of different sizes in some
  * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel).
  * Zero-initialize the structure, including currently unused fields, to
- * accomodate potential future updates.
+ * accommodate potential future updates.
  *
  * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync().
  * Pass it an array of related transfers, they'll execute together.
diff --git a/include/linux/spi/tsc2005.h b/include/linux/spi/tsc2005.h
new file mode 100644
index 000000000000..d9b0c84220c7
--- /dev/null
+++ b/include/linux/spi/tsc2005.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of TSC2005 touchscreen driver
+ *
+ * Copyright (C) 2009-2010 Nokia Corporation
+ *
+ * Contact: Aaro Koskinen <aaro.koskinen@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef _LINUX_SPI_TSC2005_H
+#define _LINUX_SPI_TSC2005_H
+
+#include <linux/types.h>
+
+struct tsc2005_platform_data {
+        int             ts_pressure_max;
+        int             ts_pressure_fudge;
+        int             ts_x_max;
+        int             ts_x_fudge;
+        int             ts_y_max;
+        int             ts_y_fudge;
+        int             ts_x_plate_ohm;
+        unsigned int    esd_timeout_ms;
+        void            (*set_reset)(bool enable);
+};
+
+#endif
diff --git a/include/linux/spi/wl12xx.h b/include/linux/spi/wl12xx.h
deleted file mode 100644
index a223ecbc71ef..000000000000
--- a/include/linux/spi/wl12xx.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of wl12xx
- *
- * Copyright (C) 2009 Nokia Corporation
- *
- * Contact: Kalle Valo <kalle.valo@nokia.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- *
- */
-
-#ifndef _LINUX_SPI_WL12XX_H
-#define _LINUX_SPI_WL12XX_H
-
-struct wl12xx_platform_data {
-        void (*set_power)(bool enable);
-        /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
-        int irq;
-        bool use_eeprom;
-};
-
-#endif