diff options
author | Andrei Emeltchenko <andrei.emeltchenko@nokia.com> | 2010-11-30 17:11:49 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-11-30 17:11:49 -0500 |
commit | 662b083a87a3489f3f19c6e0651c1b99b0de5df0 (patch) | |
tree | 67c7ba4784a1099f404c42ba1496c3078fa4af71 /include/linux/serial_reg.h | |
parent | 498cb95175c29ed96bf32f30df2d11ec1c7f3879 (diff) |
omap: Serial: Define register access modes in LCR
Access to some registers depends on register access mode
Three different modes are available for OMAP (at least)
• Operational mode LCR_REG[7] = 0x0
• Configuration mode A LCR_REG[7] = 0x1 and LCR_REG[7:0]! = 0xBF
• Configuration mode B LCR_REG[7] = 0x1 and LCR_REG[7:0] = 0xBF
Define access modes and remove redefinitions and magic numbers
in serial drivers (and later in bluetooth driver).
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@nokia.com>
Acked-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/linux/serial_reg.h')
-rw-r--r-- | include/linux/serial_reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index 6f3823474e6c..3ecb71a9e505 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h | |||
@@ -99,6 +99,13 @@ | |||
99 | #define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ | 99 | #define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ |
100 | #define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ | 100 | #define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ |
101 | 101 | ||
102 | /* | ||
103 | * Access to some registers depends on register access / configuration | ||
104 | * mode. | ||
105 | */ | ||
106 | #define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configutation mode A */ | ||
107 | #define UART_LCR_CONF_MODE_B 0xBF /* Configutation mode B */ | ||
108 | |||
102 | #define UART_MCR 4 /* Out: Modem Control Register */ | 109 | #define UART_MCR 4 /* Out: Modem Control Register */ |
103 | #define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ | 110 | #define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ |
104 | #define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ | 111 | #define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ |