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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-30 21:57:33 -0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 10:26:23 -0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /include/linux/pxa2xx_ssp.h
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'include/linux/pxa2xx_ssp.h')
-rw-r--r--include/linux/pxa2xx_ssp.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 2f691e4e6222..44835fb39793 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -122,7 +122,7 @@
122#define SSCR1_TSRE (1 << 21) /* Transmit Service Request Enable */ 122#define SSCR1_TSRE (1 << 21) /* Transmit Service Request Enable */
123#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */ 123#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */
124#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */ 124#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */
125#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interupt Enable */ 125#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interrupt Enable */
126#define SSCR1_IFS (1 << 16) /* Invert Frame Signal */ 126#define SSCR1_IFS (1 << 16) /* Invert Frame Signal */
127#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */ 127#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */
128#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */ 128#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */