mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes

OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
	1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
	1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
	1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
	to ROM code.

This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
	1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
	ecc-layout.

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

1 files changed, 1 insertions, 6 deletions

diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index e4128f1510bf..4da5bfa2147f 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -23,13 +23,8 @@ enum nand_io {
 };
 
 enum omap_ecc {
-                /* 1-bit ecc: stored at end of spare area */
-        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
-        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
-                /* 1-bit ecc: stored at beginning of spare area as romcode */
-        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
         /* 1-bit  ECC calculation by GPMC, Error detection by Software */
-        OMAP_ECC_HAM1_CODE_HW,
+        OMAP_ECC_HAM1_CODE_HW = 0,
         /* 4-bit  ECC calculation by GPMC, Error detection by Software */
         OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
         /* 4-bit  ECC calculation by GPMC, Error detection by ELM */